LINER LTC1380 Single-ended 8-channel/ differential 4-channel analog multiplexer with smbus interface Datasheet

LTC1380/LTC1393
Single-Ended 8-Channel/
Differential 4-Channel Analog
Multiplexer with SMBus Interface
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FEATURES
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DESCRIPTION
Micropower Operation: Supply Current = 20µA Max
2-Wire SMBus Interface
Single 2.7V to ±5V Supply Operation
Expandable to 32 Single or 16 Differential Channels
Guaranteed Break-Before-Make
Low RON: 35Ω Single Ended/70Ω Differential
Low Charge Injection: 20pC Max
Low Leakage: ±5nA Max
Available in 16-Lead SO and GN Packages
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APPLICATIONS
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Data Acquisition Systems
Process Control
Laptop Computers
Signal Multiplexing/Demultiplexing
Analog-to-Digital Conversion Systems
The LTC®1380/LTC1393 are CMOS analog multiplexers with
SMBus® compatible digital interfaces. The LTC1380 is a
single-ended 8-channel multiplexer, while the LTC1393 is a
differential 4-channel multiplexer. The SMBus digital interface requires only two wires (SCL and SDA). Both the
LTC1380 and the LTC1393 have four hard-wired SMBus
addresses, selectable with two external address pins. This
allows four devices, each with a unique SMBus address, to
coexist on one system and for four devices to be synchronized with one stop bit.
The supply current is typically 10µA. Both digital interface
pins are SMBus compatible over the full operating supply
voltage range. The LTC1380 analog switches feature a
typical RON of 35Ω (±5V supplies), typical switch leakage of
20pA and guaranteed break-before-make operation. Charge
injection is ±1pC typical.
The LTC1380/LTC1393 are available in 16-lead SO and GN
packages. Operation is fully specified over the commercial
and industrial temperature ranges.
, LTC and LT are registered trademarks of Linear Technology Corporation.
SMBus is a registered trademark of Intel Corporation.
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TYPICAL APPLICATION
On Resistance vs VS
LTC1380 Single-Ended 8-Channel Multiplexer
5V
250
225
2
3
4
8 ANALOG
INPUTS
5
6
7
8
S0
VCC
S1
SCL
S2
SDA
S3
S4
S5
LTC1380
A0
A1
GND
S6
VEE
S7
DO
16
0.1µF
15k
15k
15
SMBus
HOST
SCL
14
SDA
13
12
11
0.1µF
10
9
1380/93 TA01
VCC = 2.7V
VEE = 0V
175
150
125
VCC = 5V
VEE = 0V
100
75
50
– 5V
ANALOG OUTPUT
200
ON RESISTANCE (Ω)
1
TA = 25°C
ID = 1mA
VCC = 5V
VEE = – 5V
25
0
–5 –4 –3 –2 –1
0 1
VS (V)
2
3
4
5
1167 G15
1
LTC1380/LTC1393
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ABSOLUTE MAXIMUM RATINGS
(Note 1)
Total Supply Voltage
LTC1380 (VCC to VEE) ......................................... 15V
LTC1393 (VCC to GND) ....................................... 15V
Analog Input Voltage
LTC1380 ............................. VEE – 0.3V to VCC + 0.3V
LTC1393 ................................... – 0.3V to VCC + 0.3V
Digital Inputs .............................................– 0.3V to 15V
LTC1380 (VCC TO VEE) .... (VEE – 0.3V) to (VEE + 15V)
LTC1393 (VCC to GND) .......................... – 0.3V to 15V
Maximum Switch-On Current .............................. 65mA
Power Dissipation ............................................. 500mW
Operating Ambient Temperature Range
LTC1380C/LTC1393C ....................... 0°C ≤ TA ≤ 70°C
LTC1380I/LTC1393I .................... – 40°C ≤ TA ≤ 85°C
Junction Temperature ........................................... 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
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PACKAGE/ORDER INFORMATION
TOP VIEW
S0 1
16 VCC
S1 2
15 SCL
S2 3
14 SDA
S3 4
13 A0
S4 5
12 A1
S5 6
11 GND
S6 7
S7 8
ORDER PART
NUMBER
LTC1380CGN
LTC1380CS
LTC1380IGN
LTC1380IS
S0 + 1
16 VCC
S0 –
2
15 SCL
S1+ 3
14 SDA
S1– 4
13 A0
S2+
12 A1
5
S2– 6
11 GND
10 VEE
S3+ 7
10 DO–
9
S3– 8
9
DO
GN PACKAGE
S PACKAGE
16-LEAD PLASTIC SSOP 16-LEAD PLASTIC SO
ORDER PART
NUMBER
TOP VIEW
LTC1393CGN
LTC1393CS
LTC1393IGN
LTC1393IS
DO+
GN PACKAGE
S PACKAGE
16-LEAD PLASTIC SSOP 16-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 130°C/ W (GN)
TJMAX = 125°C, θJA = 100°C/ W (S)
TJMAX = 125°C, θJA = 130°C/ W (GN)
TJMAX = 125°C, θJA = 100°C/ W (S)
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
(Notes 2, 4)
SYMBOL
PARAMETER
CONDITIONS
MAX
UNITS
VANALOG
Analog Signal Range
LTC1380
●
VEE
VCC
V
LTC1393
●
0
VCC
V
LT1380: VCC = 5V, VEE = – 5V,
VEE ≤ (VS, VD) ≤ VCC, ID = ±1mA
35
●
70
120
Ω
Ω
LT1393: VCC = 5V,
0V ≤ (VS, VD) ≤ V CC, ID = ±1mA
70
●
140
200
Ω
Ω
LT1380/LTC1393: VCC = 2.7V, VEE = 0V,
0V ≤ (VS, VD) ≤ VCC, ID = ±1mA
210
●
400
600
Ω
Ω
RON
ILEAK
2
On Resistance
∆RON vs VS
VEE ≤ (VS, VD) ≤ VCC, VCC = 5V
RON vs Temperature
VCC = 5V
Off-Channel or On-Channel
Switch Leakage
LTC1380: (VEE + 0.5V) ≤ (VS, VD) ≤ (VCC – 0.5V)
LTC1393: 0.5V ≤ (VS, VD) ≤ (VCC – 0.5V)
MIN
TYP
20
%
0.5
±0.05
●
%/°C
±5
±50
nA
nA
LTC1380/LTC1393
ELECTRICAL CHARACTERISTICS
(Notes 2, 4)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIH
SCL, SDA Input High Voltage
●
VIL
SCL, SDA Input Low Voltage
●
0.6
V
VOL
SDA Output Low Voltage
ISDA = 3mA
●
0.4
V
VAH
Address Input High Voltage
VCC = 5V
●
VAL
Address Input Low Voltage
VCC = 5V
●
IIN
SCL, SDA, Address Input Current
0V ≤ VIN ≤ VCC
ICC
Positive Supply Current
VCC = 5V, All Digital Inputs at 5V
●
10
20
µA
IEE
Negative Supply Current
LTC1380: VCC = 5V, VEE = – 5V, All Digital Inputs at 5V
●
– 0.1
–5
µA
CS
Input Off Capacitance
(Note 3)
3
pF
CD
Output Off Capacitance
(Note 3) LTC1380
LTC1393
26
18
pF
pF
tON
Switch Turn-On Time from
Stop Condition
Figure 1 LTC1380: VCC = 5V, VEE = – 5V
LTC1393: VCC = 5V
LTC1380/LTC1393: VCC = 2.7V, VEE = 0V
●
●
●
850
850
1130
1500
1500
2000
ns
ns
ns
tOFF
Switch Turn-Off Time from
Stop Condition
Figure 1 LTC1380: VCC = 5V, VEE = – 5V
LTC1393: VCC = 5V
LTC1380/LTC1393: VCC = 2.7V, VEE = 0V
●
●
●
640
650
670
1200
1200
1200
ns
ns
ns
tOPEN
Break-Before-Make Interval
tON – tOFF
●
OIRR
Off-Channel Isolation
Figure 2, VS = 200mVP-P, RL = 1k, f = 100kHz (Note 3)
QINJ
Charge Injection
Figure 3, CL = 1000pF (Note 3)
1.4
V
2
75
V
V
±1
µA
210
ns
– 65
dB
±1
●
0.8
±20
pC
100
kHz
SMBus Timing (Note 6)
fSMB
SMBus Operating Frequency
●
tBUF
Bus Free Time Between Stop/Start
●
4.7
µs
tHD:STA
Hold Time After (Repeated) Start
●
4.0
µs
tSU:STA
Repeated Start Setup Time
●
4.7
µs
tSU:STO
Stop Condition Setup Time
●
4.0
µs
tHD:DAT
Data Hold Time
●
300
ns
tSU:DAT
Data Setup Time
●
250
ns
tLOW
Clock Low Period
●
4.7
µs
tHIGH
Clock High Period
●
4.0
µs
tf
SCL/SDA Fall Time
Time Interval Between 0.9VDD and (VILMAX – 0.15)
●
300
ns
tr
SCL/SDA Rise Time
Time Interval Between (VILMAX – 0.15)
and (VIHMIN + 0.15)
●
1000
ns
The ● denotes specifications which apply over the full operating
temperature range.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All current into device pins is positive; all current out of device
pins is negative. All voltages are referenced to ground unless otherwise
specified. All typicals are given for TA = 25°C, VCC = 5V (for both LTC1380
and LTC1393) and VEE = – 5V (LTC1380).
Note 3: These typical parameters are based on bench measurements and
are not production tested.
Note 4: Both SCL and SDA assume an external 15k pull-up resistor to a
typical SMBus host power supply VDD of 5V.
Note 5: Typical curves with VEE = – 5V apply to the LTC1380. Curves with
VEE = 0V apply to both the LTC1380 and the LTC1393.
Note 6: These parameters are guaranteed by design and are not tested in
production.
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LTC1380/LTC1393
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TYPICAL PERFOR A CE CHARACTERISTICS
On Resistance vs Temperature
0.0018
150
125
VCC = 5V
VEE = – 5V
VS = 0V
IS LEAKAGE (nA)
VCC = 5V
VEE = 0V
VS = 2.5V
0.008
0.0012
VCC = 2.7V
VEE = 0V
0.0010
VCC = 5V
VEE = 0V
0.0008
0.0006
0.0002
– 0.008
100
0
– 4.5 – 3.5 – 2.5 –1.5 – 0.5 0.5 1.5 2.5 3.5 4.5
VS (V)
125
1380/93 G03
Off-Channel Input Leakage
vs Temperature
0.010
0.006
0.006
0.004
0.004
VCC = 5V
VEE = – 5V
VCC = 2.7V
VEE = 0V
0
– 0.002
– 0.004
– 0.006
10
TA = 25°C
VCC = 5V
VEE = – 5V
0.002
0
VCC = 2.7V
VEE = 0V
– 0.002
– 0.010
– 4.5 – 3.5 – 2.5 –1.5 – 0.5 0.5 1.5 2.5 3.5 4.5
VD (V)
IS LEAKAGE (nA)
0.1
100
VCC = 5V
VEE = 0V
VD = 2.5V
0.1
0.001
0.001
50
25
75
0
TEMPERATURE (°C)
100
125
1380/93 G07
0.0001
– 50 – 25
VCC = 2.7V
VEE = 0V
VD = 1.35V
100
VCC = 5V
VEE = – 5V
VS = 0V
1
0.01
125
1000
VCC = 5V
VEE = 0V
VS = 2.5V
10
0.01
0.0001
– 50 – 25
100
On-Channel Output Leakage
vs Temperature
1000
VCC = 5V
VEE = – 5V
VD = 0V
VCC = 2.7V
VEE = 0V
VD = 1.35V
50
0
75
25
TEMPERATURE (°C)
1380/93 G06
On-Channel Input Leakage
vs Temperature
1000
1
0.0001
–50 –25
1380/93 G05
Off-Channel Output Leakage
vs Temperature
10
VCC = 5V
VEE = – 5V
VS = 0V
0.001
1380/93 G04
100
0.01
VCC = 5V
VEE = 0V
– 0.008
– 0.010
– 4.5 – 3.5 – 2.5 –1.5 – 0.5 0.5 1.5 2.5 3.5 4.5
VS (V)
VCC = 5V
VEE = 0V
VS = 2.5V
0.1
– 0.004
– 0.006
VCC = 5V
VEE = 0V
– 0.008
VCC = 2.7V
VEE = 0V
VS = 1.35V
1
IS LEAKAGE (nA)
0.008
ID LEAKAGE (nA)
IS LEAKAGE (nA)
– 0.010
– 4.5 – 3.5 – 2.5 –1.5 – 0.5 0.5 1.5 2.5 3.5 4.5
VD (V)
On-Channel Output Leakage vs VD
TA = 25°C
0.002
VCC = 2.7V
VEE = 0V
1380/93 G02
0.010
0.008
VCC = 5V
VEE = 0V
– 0.004
25
On-Channel Input Leakage vs VS
ID LEAKAGE (nA)
0
– 0.002
– 0.006
50
25
0
75
TEMPERATURE (°C)
VCC = 5V
VEE = – 5V
0.002
0.0004
1380/93 G01
4
0.004
50
0
– 50 –25
TA = 25°C
0.006
VCC = 5V
VEE = – 5V
0.0014
VCC = 2.7V
VEE = 0V
VS = 1.35V
ID LEAKAGE (nA)
ON RESISTANCE (Ω)
TA = 25°C
0.0016
VCC = 2.7V
VEE = 0V
VS = 1.35V
175
75
0.010
ID LEAKAGE (nA)
ID = 1mA
200
100
Off-Channel Output Leakage vs VD
Off-Channel Input Leakage vs VS
0.0020
250
225
(Note 5)
10
1
0.1
0.01
VCC = 5V
VEE = 0V
VD = 2.5V
VCC = 5V
VEE = – 5V
VD = 0V
0.001
50
25
75
0
TEMPERATURE (°C)
100
125
1380/93 G08
0.0001
– 50 – 25
50
25
75
0
TEMPERATURE (°C)
100
125
1380/93 G09
LTC1380/LTC1393
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TYPICAL PERFOR A CE CHARACTERISTICS
Off Time vs Temperature
500
VCC = 2.7V
VEE = 0V
VS = 1.35V
1400
VCC = 2.7V
VEE = 0V
VS = 1.35V
1200
VCC = 5V
VEE = – 5V
VS = 0V
VCC = 5V
VEE = 0V
VS = 2.5V
400
300
VCC = 5V
VEE = – 5V
VS = 0V
4.5
VCC = 5V
VEE = 0V
VS = 2.5V
600
100
200
VCC = 5V
VEE = – 5V
3.5
800
400
TA = 25°C
4.0
1000
200
3.0
2.5
2.0
VCC = 5V
VEE = 0V
1.5
1.0
0
50
75
25
TEMPERATURE (°C)
100
0
– 50 – 25
125
VCC = 2.7V
VEE = 0V
0.5
0
50
75
25
TEMPERATURE (°C)
1380/93 G10
100
0
125
– 5 – 4 – 3 – 2 –1
3
4
5
1380/93 G12
– 75
VCC = 5V
VEE = – 5V
VS = 0V
1.8
1.6
– 74
– 71
OIRR (dB)
– 72
1.2
1.0
VCC = 5V
VEE = 0V
VS = 2.5V
0.8
0.6
0.2
0
–50 –25
VCC = 5V
VEE = – 5V
– 70
– 69
– 67
– 66
– 65
50
25
0
75
TEMPERATURE (°C)
VCC = 2.7V
VEE = 0V
– 68
VCC = 2.7V
VEE = 0V
VS = 1.35V
0.4
VCC = 5V
VEE = 0V
– 73
1.4
100
TA = 25°C
VS = 200mVP-P, 100kHz
RL = 1k
– 5 – 4 – 3 –2 –1
125
0 1
VC (V)
2
3
4
5
1380/93 G14
1380/93 G13
ICC vs Temperature
IEE vs Temperature
10
0
VCC = 5V
VEE = – 5V
9
–10
8
–20
VCC = 2.7V
VEE = 0V
– 30
VCC = 5V
VEE = 0V
IEE (nA)
6
2
Off-Channel Isolation vs Input
Common Mode Voltage (Figure 2)
2.0
7
0 1
VC (V)
1380/93 G11
QINJ vs Temperature (Figure 3)
QINJ(pC)
0
– 50 – 25
ICC (µA)
OFF TIME (ns)
600
QINJ vs VC (Figure 3)
5.0
QINJ (pC)
700
On Time vs Temperature
1600
ON TIME (ns)
800
(Note 5)
5
4
– 40
– 50
– 60
3
–70
2
– 80
1
0
–50 –25
VCC = 5V
VEE = – 5V
VS = 0V
– 90
50
25
0
75
TEMPERATURE (°C)
100
125
1380/93 G15
–100
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
1380/93 G16
5
LTC1380/LTC1393
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PIN FUNCTIONS
S0 to S7/S0 ± to S3 ± (Pin 1 to Pin 8): Single-Ended Analog
Multiplexer Inputs (S0 to S7) for the LTC1380. Differential
Analog Multiplexer Inputs (S0 ± to S3 ±) for the LTC1393.
A1, AO (Pin 12, Pin 13): Address Selection Pins. Tie these
two pins to either VCC or GND to select one of four possible
addresses to which the LTC1380/LTC1393 will respond.
DO/DO+ (Pin 9): Analog Multiplexer Output for the LTC1380.
Positive Differential Analog Multiplexer Output for the
LTC1393.
SDA (Pin 14): SMBus Bidirectional Digital Input/Output
Pin. This pin has an open-drain output and requires a pullup resistor or current source to the positive supply for
normal operation. Data is shifted into and acknowledged
by the LTC1380/LTC1393 using this pin.
VEE/DO – (Pin 10): Negative Supply Pin for the LTC1380.
Negative Differential Multiplexer Output for the LTC1393.
For the LTC1380, VEE should be bypassed to GND with a
0.1µF ceramic capacitor when operating from split supplies or connected to GND for single supply operation.
GND (Pin 11): Ground Pin.
SCL (Pin 15): SMBus Clock Input. SDA data is shifted in
at rising edges of this clock during data transfer.
VCC (Pin 16): Positive Supply Pin. This pin should be
bypassed to GND with a 0.1µF ceramic capacitor.
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BLOCK DIAGRA
ANALOG INPUTS
(LTC1380: S0 TO S7)
(LTC1393: S0 ± TO S3 ±)
ANALOG OUTPUT(S)
(LTC1380: DO)
(LTC1393: DO±)
MULTIPLEXER
SWITCHES
4-BIT LATCH
AND DECODER
SHIFT REGISTER
A0
A1
SDA
SCL
6
HOLD
ADDRESS
COMPARATOR
SMBus STATE
MACHINE
STOP
1380/93 BD
LTC1380/LTC1393
TEST CIRCUITS
SCL
SDA
SCL
SDA
SCL
LTC1380
S
D
CL
35pF
RL
1k
1V
VD
SDA
VC
1/2 • (VCC + VEE)
VD
STOP CONDITION
WITH EN = 1
STOP CONDITION
WITH EN = 0
1V
1V
1.5V
0.4V
1.5V
0.4V
tOFF
tON
20%
tr < 20ns, tf < 20ns
VC
80%
1380/93 F01
Figure 1. Switch tON /tOFF Propagation Delay from SMBus STOP Condition
SCL
SDA
SCL
SDA
LTC1380
S
VD
D
VS
200mVP-P
100kHz
VC1
1/2 • (VCC + VEE)
OIRR = 20LOG10 (VD / VS)
WHERE VS AND VD ARE THE
AC VOLTAGE COMPONENTS
AT S AND D
RL
1k
VC2
1/2 • (VCC + VEE)
1380/93 F02
Figure 2. Off-Channel Isolation (OIRR) Test
SCL
SDA
SCL
SDA
CHARGE INJECTION
∆Q = ∆VD • CL
LTC1380
S
VC
D
VD
CL
1000pF
STOP CONDITION
WITH EN = 1
SCL
SDA
VD
STOP CONDITION
WITH EN = 0
1.5V
0.4V
1.5V
0.4V
VC
∆VD
∆VD
1380/93 F03
Figure 3. Charge Injection Test
7
LTC1380/LTC1393
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TI I G DIAGRA
ADDRESS BYTE
tr
tHIGH
S
COMMAND BYTE
tf
S
P
SCL
tHD:STA
SDA FROM
HOST
1
tLOW
0
0
1
tBUF
*
A1
A0
tSU:DAT
0
X
tSU:STA
tHD:DAT
X
X
X
EN
C2
C1
tSU:STO
C0
*0 FOR LTC1380, 1 FOR LTC1393
SDA FROM
LTC1380/LTC1393
tOFF
tON
tOPEN
DO
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APPLICATIONS INFORMATION
Theory of Operation
The LTC1380/LTC1393 are analog input multiplexers with
an SMBus digital interface. The LTC1380 is a single-ended
8-to-1 multiplexer; the LTC1393 is a differential 4-to-1
mulitplexer. The LTC1380 operates on either bipolar or
unipolar supplies, the LTC1393 operates on a single
supply. The minimum VCC supply for the LTC1380/LTC1393
is 2.7V. The maximum supply voltage (VCC to VEE for the
LTC1380, VCC for the LTC1393) should not exceed 14V.
The multiplexer switches operate within the entire power
supply range. The LTC1380 VCC and VEE supplies can be
offset such as 2.7V/–11V and 11V/– 3V.
Serial Interface
The LTC1380/LTC1393 serial interface supports SMBus
send byte protocol as shown below with two interface
signals, SCL and SDA.
LTC1380 Send Byte Protocol
S
1
0
0
1
0
A1 A0 W
A
X
X
X
X EN C2 C1 C0 A
P
A
X
X
X
X EN C2 C1 C0 A
P
LTC1393 Send Byte Protocol
S
1
0
0
1
1
A1 A0 W
ADDRESS BYTE
COMMAND BYTE
S = SMBus START BIT
P = SMBus STOP BIT (THE FIRST STOP BIT AFTER A SUCCESSFUL COMMAND BYTE
UPDATES THE MULTIPLEXER CONTROL LATCH)
A = ACKNOWLEDGE BIT FROM LTC1380/LTC1393
W = WRITE COMMAND BIT
A1, A0 = ADDRESS BITS
EN, C2, C1, C0 = MULTIPLEXER CONTROL BITS
8
A send byte protocol is initiated by the SMBus host with a
start bit followed by a 7-bit address code and a write bit.
Each slave compares the address code with its address.
The send byte write bit is Low. The selected slaves then
reply with an acknowledge bit by pulling the SDA line Low.
Next, the host sends an 8-bit command byte. When the
selected slave receives the whole command byte, it acknowledges and retains the command byte in the shift
register. The host can terminate the serial transfer with a
stop bit or communicate with another slave device with a
repeat start. When a repeat start occurs but the slave is not
selected, the command byte data is kept in the shift
register but the multiplexer control is not updated. The
multiplexer control latches the new command from the
shift register on the first stop bit after a successful command byte transfer. This allows the host to synchronize
several slave devices with a single stop bit. A1 and A0
select one of the four possible LTC1380/LTC1393 addresses as shown in Table 1. This allows up to four similar
devices to share the same SMBus, expanding the multiplexer to 32 single-ended channels with the LTC1380; 16
differential channels with the LTC1393. The first stop bit
after a successful send byte transfer will latch in the
multiplexer control bits (EN, C2, C1 and C0) and initiate a
break-before-make sequence.
LTC1380/LTC1393
U
W
U
U
APPLICATIONS INFORMATION
Table 1. LTC1380/LTC1393 Address Selection
A1
A0
LTC1380
0
0
90H
98H
0
1
92H
9AH
1
0
94H
9CH
1
1
96H
9EH
Both the LTC1380 and LTC1393 are compatible with the
Philips/Signetics I2C Bus interface. This 1V threshold for
SCA and SDA should not pose an operational problem
with I2C applications.
LTC1393
SCL is the synchronizing clock generated by the host. SDA
is the bidirectional data transfer between the host and the
slave. The host initiates a start bit by dropping the SDA line
from High to Low while the SCL is High. The stop bit is
initiated by changing the SDA line from Low to High while
SCL is High. All address, command and acknowledge
signals must be valid and should not change while SCL is
High. The acknowledge bit signals to the host the acceptance of a correct address byte or the command byte.
At VCC supply above 2.7V, the SCL and SDA input threshold is typically 1V with an input hysteresis of 100mV. The
typical SCL and SDA lines have either a resistive or current
source pull-up at the host. The LTC1380/LTC1393 have an
open-drain NMOS transistor at the SDA pin to sink 3mA
below 0.4V during the slave acknowledge sequence. The
address selection input A1 and A0 are TTL compatible at
VCC = 5V.
The multiplexer switches are selected as shown in Table 2.
Both the LTC1380 and the LTC1393 have an enable bit
(EN). A Low disables all switches while a High enables the
selected switch as programmed by bits C2, C1 and C0. A
stop bit after a successful send byte sequence for LTC1380/
LTC1393 will disable all switches before the new selected
switch is connected.
Table 2. Multiplexer Control Bits Truth Table
EN
C2
C1
C0
LTC1380 DO
CHANNEL STATUS
LTC1393 DO+, DO–
CHANNEL STATUS
0
X
X
X
All Off
All Off
1
0
0
0
S0
S0 +, S0 –
1
0
0
1
S1
1
0
1
0
S2
1
0
1
1
S3
1
1
0
0
S4
1
1
0
1
S5
1
1
1
0
S6
1
1
1
1
S7
15k
15k
S1 +, S1 –
S2 +, S2 –
S3 +, S3 –
U
TYPICAL APPLICATIONS
Simplified LTC1393 Application
5V
1
4 DIFFERENTIAL
ANALOG INPUTS
S0 +
VCC
2
S0 –
SCL
3
S1+
SDA
4
S1–
A0
5
S2+
6
S2–
GND
7
S3+
8
DO–
S3–
DO+
LTC1393
A1
16
15
14
0.1µF
SMBus
HOST
SCL
SDA
13
12
11
10
9
DIFFERENTIAL
ANALOG OUTPUTS
1380/93 TA03
9
LTC1380/LTC1393
U
TYPICAL APPLICATIONS
16-Channel Multiplexer with Buffer
5V
1
2
3
4
5
6
7
8
16
ANALOG
INPUTS
1
2
3
4
5
6
7
8
S0
VCC
S1
SCL
S2
SDA
S3
S4
A0
LTC1380
A1
S5
GND
S6
VEE
S7
DO
S0
VCC
S1
SCL
S2
SDA
S3
S4
A0
LTC1380
A1
S5
GND
S6
VEE
S7
DO
16
0.1µF
15k
SMBus
HOST
15k
15
SCL
14
SDA
13
12
11
10
9
16
15
14
13
12
–
11
10
– 5V
+
9
VOUT
LT1351
0.1µF
1380/93 TA04
Programmable Gain Amplifier
5V
R0
1
R1
2
R2
3
R3
4
R4
5
R5
6
R6
7
R7
8
S0
VCC
S1
SCL
S2
S3
SDA
LTC1380
A0
S4
A1
S5
GND
S6
S7
VEE
DO
16
0.1µF
15k
SMBus
HOST
15k
15
SCL
14
SDA
13
12
11
0.1µF
10
– 5V
9
RF
–
LT1055
ANALOG INPUT
VOUT
+
1380/93 TA05
10
LTC1380/LTC1393
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
GN Package
16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.189 – 0.196*
(4.801 – 4.978)
16 15 14 13 12 11 10 9
0.229 – 0.244
(5.817 – 6.198)
0.150 – 0.157**
(3.810 – 3.988)
1
0.015 ± 0.004
× 45°
(0.38 ± 0.10)
0.007 – 0.0098
(0.178 – 0.249)
4
2 3
5 6
0.053 – 0.068
(1.351 – 1.727)
7
8
0.004 – 0.0098
(0.102 – 0.249)
0° – 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.025
(0.635)
BSC
0.008 – 0.012
(0.203 – 0.305)
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
GN16 (SSOP) 1197
S Package
16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.386 – 0.394*
(9.804 – 10.008)
16
15
14
13
12
11
10
9
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
2
3
4
5
6
7
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0° – 8° TYP
0.016 – 0.050
0.406 – 1.270
0.014 – 0.019
(0.355 – 0.483)
8
0.050
(1.270)
TYP
S16 0695
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC1380/LTC1393
U
TYPICAL APPLICATION
8 Differential Channel Multiplexer with A/D Converter
5V
1
S0 +
2
VCC
S0 –
SCL
3
S1+
SDA
4
S1–
A0
5
S2+
6
S2–
GND
7
S3+
8
DO–
S3–
DO+
1
S0 +
2
VCC
S0 –
SCL
3
S1+
SDA
4
S1–
5
S2+
6
S2–
GND
7
S3+
8
DO–
S3–
DO+
LTC1393
A1
16
0.1µF
15k
15k
15
SMBus
HOST
SCL
14
SDA
13
12
11
10
9
8 DIFFERENTIAL
ANALOG INPUTS
A0
LTC1393
A1
16
15
14
4.7µF
13
12
11
10
9
LTC1286
8
VCC
VREF
7
2
+ IN
CLK
3
6
– IN
DOUT
5
4
GND CS/SHDN
1
SERIAL CLOCK IN
SERIAL CLOCK OUT
CS
1380/93 TA06
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC201A/LTC202/
LTC203
Micropower, Low Charge Injection, Quad CMOS
Analog Switches with Data Latches
Each Channel is Independently Controlled
LTC221/LTC222
Micropower, Low Charge Injection, Quad CMOS Analog Switches
Parallel Controlled with Data Latches
LTC1390/LTC1391
8-Channel, Analog Multiplexer with Serial Interface
3V to ±5V in 16-Pin SO and PDIP
LTC1623
High Side Switch with SMBus Interface
Regulated On-Board Charge Pump Drives
External N-Channel MOSFETS
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417 ● (408) 432-1900
FAX: (408) 434-0507 ● TELEX: 499-3977 ● www.linear-tech.com
138093f LT/GP 0398 4K • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 1998
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