LINER LTC4362-2 1.2a overvoltage/ overcurrent protector Datasheet

LTC4362-1/LTC4362-2
1.2A Overvoltage/
Overcurrent Protector
FEATURES
DESCRIPTION
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The LTC®4362 monolithic overvoltage/overcurrent protector safeguards 2.5V to 5.5V systems from power supply
overvoltage. It is designed for portable devices with multiple
power supply options including wall adaptors, car battery
adaptors and USB ports.
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2.5V to 5.5V Operation
Overvoltage Protection Up to 28V
Internal 40mΩ N-Channel MOSFET and 31mΩ RSENSE
Avalanche Rated MOSFET Requires No Input
Capacitor or TVS for Most Applications
<1μs Overvoltage Turn-Off, Gentle Shutdown
2% Accurate 5.8V Overvoltage Threshold
20% Accurate 1.5A Overcurrent Threshold
Input Withstands Up to ±25kV HBM ESD with 1μF COUT
Controlled Power-Up dV/dt Limits Inrush Current
Reverse Voltage Protection Driver
Low Current Shutdown
Latchoff (LTC4362-1) or Auto-Retry (LTC4362-2)
After Overcurrent
Available in 8-Lead DFN 2mm × 3mm Package
APPLICATIONS
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USB Protection
Handheld Computers
Cell/Smart Phones
MP3/MP4 Players
Digital Cameras
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
ThinSOT, PowerPath and Hot Swap are trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
The LTC4362 controls an internal 40mΩ N-channel MOSFET
in series with the input power supply. During overvoltage
transients, the LTC4362 turns off the MOSFET within 1μs,
isolating downstream components from the input supply.
In most applications, the LTC4362 rides through inductive cable transients without requiring transient voltage
suppressors or other external components. An internal
current sense resistor is used to implement overcurrent
protection.
The LTC4362 has a delayed start-up at plug-in and controlled dV/dt ramp-up for inrush current limiting. A PWRGD
pin provides power good monitoring for VIN. The LTC4362
features a soft-shutdown controlled by the ON pin and
drives an optional external P-channel MOSFET for negative
voltage protection. Following an overvoltage condition, the
LTC4362 automatically restarts with a 130ms delay. After
an overcurrent fault, the LTC4362-1 remains off while the
LTC4362-2 automatically restarts after a 130ms delay.
TYPICAL APPLICATION
Protection from Overvoltage and Overcurrent
VIN
5V
IN
OUT
LTC4362
ON
COUT
Output Protected from Overvoltage at Input
VOUT
5V
0.5A
VIN
PWRGD
GND
VOUT
436212 TA01a
VIN, VOUT
5V/DIV
0.2μs/DIV
436212 TA01b
COUT = 10μF
436212f
1
LTC4362-1/LTC4362-2
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Notes 1 and 2)
Bias Supply Voltage
IN to OUT (Note 3) ................................. –0.3V to 28V
Input Voltages
SENSE to OUT (Notes 3 and 4) .............. –0.3V to 28V
ON ........................................................... –0.3V to 9V
Output Voltages
OUT, PWRGD ........................................... –0.3V to 9V
IN to GATEP ........................................... –0.3V to 10V
Operating Temperature Range
LTC4362C ................................................ 0°C to 70°C
LTC4362I .............................................–40°C to 85°C
Storage Temperature Range ................. –65°C to 150°C
TOP VIEW
8 OUT
GATEP 1
IN 2
GND 3
SENSE 4
9
SENSE
7 OUT
6 ON
5 PWRGD
DCB PACKAGE
8-LEAD (2mm s 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 64°C/W
ORDER INFORMATION
Lead Free Finish
TAPE AND REEL (MINI)
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4362CDCB-1#TRMPBF LTC4362CDCB-1#TRPBF
TAPE AND REEL
LFNC
8-Lead Plastic DFN
0°C to 70°C
LTC4362CDCB-2#TRMPBF LTC4362CDCB-2#TRPBF
LFJN
8-Lead Plastic DFN
0°C to 70°C
LTC4362IDCB-1#TRMPBF
LFNC
8-Lead Plastic DFN
–40°C to 85°C
LTC4362IDCB-2#TRMPBF LTC4362IDCB-2#TRPBF
LFJN
8-Lead Plastic DFN
TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
–40°C to 85°C
LTC4362IDCB-1#TRPBF
436212f
2
LTC4362-1/LTC4362-2
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VON = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
28
V
2.1
2.45
V
220
1.5
400
10
μA
μA
V
Supplies
l
2.5
VIN Rising
l
1.8
Input Supply Current
VON = 0V
VON = 2.5V
l
l
VIN(OV)
IN Pin Overvoltage Threshold
VIN Rising
l
5.684
5.8
5.916
ΔVOV
Overvoltage Hysteresis
l
25
100
200
mV
VON(TH)
ON Input Threshold
l
0.4
1.5
V
ION
ON Pull-Down Current
VON = 2.5V
l
2.5
5
10
μA
VOUT(UP)
OUT Turn-On Ramp-Rate
VOUT = 0.5V to 4V
l
1.5
3
4.5
V/ms
VON = 2.5V, VOUT = 5V
l
0
±3
μA
l
5
5.8
7.5
V
0.8
2
3.2
MΩ
0.23
0.4
V
500
800
kΩ
40
70
mΩ
1.5
1.8
A
VIN
Input Voltage Range
VIN(UVL)
Input Undervoltage Lockout
IIN
Thresholds
Input Pins
Output Pins
IOUT
OUT Leakage Current
VGATEP(CLP)
IN to GATEP Clamp Voltage
RGATEP
GATEP Pull-Down Resistance
VGATEP = 3V
l
VPWRGD(OL)
PWRGD Output Low Voltage
VIN = 5V, IPWRGD = 3mA
l
RPWRGD
PWRGD Pull-Up Resistance to OUT
VIN = 6.5V, VPWRGD = 1V
l
IOUT = 0.5A
l
250
Internal N-Channel MOSFET
RON
On Resistance
ITRIP
Overcurrent Threshold
IAS
Peak Avalanche Current
L = 0.1mH (Note 5)
10
A
EAS
Single Pulse Avalanche Energy
IAS = 10A, L = 0.1mH (Note 5)
10
mJ
tON
Turn-On Delay
VIN High to VOUT = 0.5V, ROUT = 1kΩ
l
tOFF(OV)
Turn-Off Delay for Overvoltage
VIN = 5V
l
tOFF(OC)
Turn-Off Delay for Overcurrent
IOUT = 0.5A
tPWRGD(LH)
PWRGD Rising Delay
VIN = 5V
tPWRGD(HL)
PWRGD Falling Delay
VIN = 0V 5V, VOUT = 0.5V to PWRGD Pull Low,
ROUT = 1kΩ
l
tON(OFF)
ON High to N-channel MOSFET Off
VON = 0V
l
ESD Protection for IN to GND
COUT = 1μF, Human Body Model
l
1.2
Delay
6.5V to VOUT = 4.5V, ROUT = 1kΩ
3A to VOUT = 4.5V
l
50
5
l
6.5V
2.5V
25
130
200
ms
0.45
1
μs
10
20
μs
0.3
1
μs
65
100
ms
40
100
μs
ESD Protection
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to GND unless otherwise
specified.
±25
kV
Note 3: The minimum drain-source breakdown voltage of the internal
MOSFET is 28V. Driving the IN and SENSE pins more than 28V above OUT
may damage the device if the EAS capability of the MOSFET is exceeded.
Note 4: An internal current sense resistor ties IN and SENSE. Driving
SENSE relative to IN may damage the resistor.
Note 5: The IAS and EAS typical values are based on characterization and
are not production tested.
436212f
3
LTC4362-1/LTC4362-2
TYPICAL PERFORMANCE CHARACTERISTICS
Specifications are at TA = 25°C, VIN = 5V, VON = 0V unless otherwise noted.
Input Supply Current
vs Input Voltage
Overvoltage Threshold
vs Temperature
1000
PWRGD Voltage vs PWRGD Current
500
5.84
VON = 0V
400
100
5.82
10
1
0.1
VPWRGD(OL) (mV)
VIN(0V) (V)
IIN (μA)
VON = 2.5V
5.80
5.78
1
10
VIN (V)
0
–25
0
25
50
TEMPERATURE (°C)
436212 G01
100
1.60
50
35
1.55
VIN = 5V
30
20
–50
–25
0
25
50
TEMPERATURE (°C)
75
ITRIP (A)
40
VIN = 3V
30
25
20
–50
100
14
VIN = STEP 5V TO 6.5V
0.8
–25
0
25
50
TEMPERATURE (°C)
0
–50
75
1.40
–50
100
8
IOUT = STEP 0.5A TO 3A
75
100
436212 G07
75
10
6
–50
100
VIN = STEP 5V TO (VIN(OV) + VOVDRV)
6
tOFF(OV) (μs)
tOFF(OC) (μs)
0
25
50
TEMPERATURE (°C)
0
25
50
TEMPERATURE (°C)
Overvoltage Turn-Off Delay
vs Overdrive (VOVDRV)
8
–25
–25
436212 G06
12
0.2
5
1.50
Overcurrent Turn-Off Delay
vs Temperature
0.4
4
436212 G05
Overvoltage Turn-Off Delay
vs Temperature
0.6
2
3
IPWRGD (mA)
1.45
436212 G04
1.0
1
Overcurrent Threshold
vs Temperature
60
40
0
436212 G03
Internal RSENSE vs Temperature
INTERNAL RSENSE (mΩ)
RON (mΩ)
75
436212 G02
Internal MOSFET On Resistance
vs Temperature
tOFF(OV) (μs)
200
100
5.76
–50
100
300
4
2
–25
0
25
50
TEMPERATURE (°C)
75
100
436212 G08
0
0
0.5
1
1.5
VOVDRV (V)
2
2.5
436212 G09
436212f
4
LTC4362-1/LTC4362-2
TYPICAL PERFORMANCE CHARACTERISTICS
Specifications are at TA = 25°C, VIN = 5V, VON = 0V unless otherwise noted.
Normal Start-Up Sequence
Turn-On Ramp-Up
VIN
5V/DIV
VIN
5V/DIV
VOUT
5V/DIV
VOUT
5V/DIV
ICABLE
0.5A/DIV
ICABLE
0.5A/DIV
20ms/DIV
FIGURE 4 CIRCUIT
RIN = 150mΩ, LIN = 0.7μH
LOAD = 10Ω, COUT = 10μF
Entering Sleep Mode
VIN
5V/DIV
VOUT
5V/DIV
VON
5V/DIV
ICABLE
0.5A/DIV
436212 G10
1ms/DIV
FIGURE 4 CIRCUIT
RIN = 150mΩ, LIN = 0.7μH
LOAD = 10Ω, COUT = 10μF
436212 G11
50μs/DIV
436212 G12
FIGURE 4 CIRCUIT
RIN = 150mΩ, LIN = 0.7μH
LOAD = 10Ω, COUT = 10μF
PIN FUNCTIONS
GATEP: Gate Drive for External P-channel MOSFET. GATEP
connects to the gate of an optional external P-channel
MOSFET to protect against negative voltages at IN. Internally clamped to 5.8V below VIN. An internal 2M resistor
connects this pin to ground. Connect to IN if unused.
GND: Device Ground.
IN: Supply Voltage Input. Connect this pin to the input
power supply. This pin has an overvoltage threshold of
5.8V. After an overvoltage event, this pin must fall below
VIN(OV) – ΔVOV to release the overvoltage lockout. During
lockout, the internal N-channel MOSFET remains off and
the PWRGD pull-down releases.
ON: On Control Input. A logic low at ON enables the
LTC4362. A logic high at ON activates a low current pulldown on the gate of the internal N-channel MOSFET and
causes the LTC4362 to enter a low current sleep mode. An
internal 5μA current pulls ON down to ground. Connect
to ground or leave open if unused.
OUT: Source of Internal N-Channel MOSFET. Connect to
load.
PWRGD: Power Good Status. Open-drain output with
internal 500k resistive pull-up to OUT. Pulls low 65ms
after the MOSFET gate ramps above its internal gate high
threshold.
SENSE, Exposed Pad: Current Sense Node and Internal
N-Channel MOSFET Drain. An internal sense resistor
between IN and SENSE is used to implement the 1.5A
overcurrent threshold. The exposed pad is connected to
SENSE and must be soldered to an electrically isolated
printed circuit board trace to properly transfer the heat
out of the package. To disable the overcurrent function,
connect SENSE and the exposed pad to IN.
436212f
5
LTC4362-1/LTC4362-2
BLOCK DIAGRAM
SENSE
SENSE
RESISTOR
31mΩ
IN
GATEP 200k
5.8V
CHARGE
PUMP
5.8V
10μA
1.8M
ON
1V
OUT
+
–
+
–
GATE HIGH
COMPARATOR
500k
GATE HIGH
THRESHOLD
PWRGD
5μA
CONTROL
+
–
+
–
OVERCURRENT
COMPARATOR
+–
47mV
OVERVOLTAGE
COMPARATOR
5.8V
5.7V
GND
436212 BD
OPERATION
Mobile devices like cell phones and MP3/MP4 players
have highly integrated subsystems fabricated from deep
submicron CMOS processes. The small form factor is
accompanied by low absolute maximum voltage ratings.
The sensitive electronics are susceptible to damage from
transient or DC overvoltage conditions from the power
supply.
Failures or faults in the power adaptor can cause an overvoltage event. So can hot-plugging an AC adaptor into the
power input of the mobile device (see Application Note
88). Today’s mobile devices derive their power supply or
recharge their internal batteries from multiple alternative
inputs like AC wall adaptors, car battery adaptors and USB
ports. A user might unknowingly plug in the wrong adaptor, damaging the device with a high or even a negative
power supply voltage.
The LTC4362 protects low voltage electronics from these
overvoltage conditions by controlling an internal N-channel MOSFET configured as a pass transistor. At power-up
(VIN > 2.1V), a start-up delay cycle begins. Any overvoltage condition causes the delay cycle to continue until a
safe voltage is present. When the delay cycle completes,
an internal high-side switch driver slowly ramps up the
MOSFET gate, powering up the output at a controlled rate
and limiting the inrush current to the output capacitor.
436212f
6
LTC4362-1/LTC4362-2
OPERATION
If the voltage at the IN pin exceeds 5.8V (VIN(OV)), the
internal N-channel MOSFET is turned off quickly to protect
the load. The incoming power supply must remain below
5.7V (VOUT(OV) – ΔVOV) for the duration of the start-up
delay to restart the OUT ramp-up.
An internal sense resistor is used to implement an
overcurrent protection with a 1.5A current trip threshold and a 10μs glitch filter. After an overcurrent, the
LTC4362-1 latches off while the LTC4362-2 restarts following a 130ms delay.
The LTC4362 has a CMOS compatible ON input. When
driven low, the part is enabled. When driven high, the
internal N-channel MOSFET is turned off and the supply current of the LTC4362 drops to 1.5μA. The PWRGD
pull-down releases during this low current sleep mode,
UVLO, overvoltage, overcurrent or thermal shutdown and
the subsequent 130ms start-up delay. After the start-up
delay, the internal MOSFET gate starts its 3V/ms ramp-up.
It trips an internal gate high threshold to trigger a 65ms
delay. When that completes, PWRGD pulls low. The output
pull-down device is capable of sinking up to 3mA allowing it to drive an optional LED. The LTC4362 has a GATEP
pin that drives an optional external P-channel MOSFET to
provide protection against negative voltages at IN.
APPLICATIONS INFORMATION
The typical LTC4362 application protects 2.5V to 5.5V systems in portable devices from power supply overvoltage.
The basic application circuit is shown in Figure 1. Device
operation and external component selection is discussed
in detail in the following sections.
VIN
5V
IN
OUT
LTC4362
5V
VIO
VOUT
5V
COUT 0.5A
10μF
PWRGD
GND
An internal charge pump enhances the internal N-channel
MOSFET with the OUT ramp-rate limited to 3V/ms. This results in an inrush current into the load capacitor COUT of:
IINRUSH = COUT •
dVOUT
= COUT • 3[mA/µF ]
dt
Overvoltage
R1
1k
ON
OUT Control
D1
LN1351CTR
436212 F01
Figure 1. Protection from Overvoltage and Overcurrent
Start-Up
When VIN is less than the undervoltage lockout level of
2.1V, the internal N-channel MOSFET is held off and the
PWRGD pull-down is high impedance. When VIN rises
above 2.1V and ON is held low, a 130ms delay cycle
starts. Any undervoltage or overvoltage event at IN (VIN
< 2.1V or VIN > 5.7V) restarts the delay cycle. This delay
allows the MOSFET to isolate the output from any input
transients that occur at start-up. When the delay cycle
completes, the MOSFET is turned on and OUT starts its
slow ramp-up.
When power is first applied, VIN must remain below 5.7V
(VIN(OV) – ΔVOV) for more than 130ms before the output is
turned on. If VIN then rises above 5.8V (VIN(OV)), the overvoltage comparator turns off the internal MOSFET within
1μs. After an overvoltage condition, the MOSFET is held
off until VIN once again remains below 5.7V for 130ms.
Overcurrent
The overcurrent comparator protects the internal MOSFET
from excessive current. It trips when IOUT > 1.5A for more
than 10μs. When the overcurrent comparator trips, the
internal MOSFET is turned off quickly and the PWRGD pulldown releases. The LTC4362-2 automatically tries to apply
power again after a 130ms start-up delay. The LTC4362-1
has an internal latch that maintains this off state until it is
reset. To reset this latch, cycle IN below 2.1V (VIN(UVL))
436212f
7
LTC4362-1/LTC4362-2
APPLICATIONS INFORMATION
or ON above 1.5V (VON(TH)) for more than 500μs. After
reset, the LTC4362-1 goes through the start-up cycle. In
applications not requiring the overcurrent protection, tie
SENSE and the exposed pad to the IN pin.
PWRGD Output
PWRGD is an active low output with a MOSFET pull-down
to ground and a 500k resistive pull-up to OUT. The PWRGD
pin pull-down releases during the low current sleep mode
(invoked by ON high), UVLO, overvoltage, overcurrent or
thermal shutdown and the subsequent 130ms start-up
delay. After the start-up delay, the internal MOSFET gate
starts its 3V/ms ramp-up and control of the PWRGD
pull-down passes on to the internal gate high comparator. When the internal gate is higher than the gate high
threshold for more than 65ms, PWRGD asserts low. When
the internal gate goes lower than the gate high threshold,
the PWRGD pull-down releases. The PWRGD pull-down
device is capable of sinking up to 3mA of current allowing
it to drive an optional LED. To interface PWRGD to another
I/O rail, connect a resistor from PWRGD to that I/O rail
with a resistance low enough to override the internal 500k
pull-up to OUT. Figure 2 details PWRGD behavior for a
LTC4362-2 with 1k pull-up to 5V at PWRGD.
START-UP
FROM UVLO
OV
RESTART
FROM OV
ON Input
ON is a CMOS compatible, active low enable input. It has
a default 5μA pull-down to ground. Connect this pin to
ground or leave open to enable normal device operation.
If it is driven high while the MOSFET is turned on, the
MOSFET is turned off gradually with an internal 40μA
gate pull-down, minimizing input voltage transients. The
LTC4362 then goes into a low current sleep mode, drawing only 1.5μA at IN. When ON goes back low, the part
restarts with a 130ms delay cycle.
GATEP Control
GATEP has a 2M resistive pull-down to ground and a
5.8V Zener clamp in series with a 200k resistor to IN.
It controls the gate of an optional external P-channel
MOSFET to provide negative voltage protection. The 2M
pull-down turns on the external P-channel MOSFET once
VIN is more than the P-channel MOSFET gate threshold
voltage. The IN to GATEP Zener protects the external Pchannel MOSFET from gate overvoltage by clamping its
VGS to 5.8V when VIN goes high.
ON
OC RESTART
FROM OC
RESTART
FROM ON
OC
THRESHOLD
ICABLE
VIN(OV)
VIN(OV) – ΔVOV
VIN(UVL)
IN
OUT
INTERNAL GATE HIGH
MOSFET THRESHOLD
GATE
GATE HIGH
THRESHOLD
GATE HIGH
THRESHOLD
GATE HIGH
THRESHOLD
GATE HIGH
THRESHOLD
ON
PWRGD
130ms 65ms
130ms
65ms
130ms 65ms
10μs
(NOT TO SCALE)
130ms 65ms
436212 F02
Figure 2. PWRGD Behavior
436212f
8
LTC4362-1/LTC4362-2
APPLICATIONS INFORMATION
WALL ADAPTOR
AC/DC
RIN
+
LIN
MOBILE DEVICE
IN
ICABLE
VIN
10V/DIV
COUT
CABLE
LOAD
ICABLE
20A/DIV
436212 F03a
5μs/DIV
436212 F03b
RIN = 150mΩ, LIN = 0.7μH
LOAD = 10Ω, COUT = 10μF
Figure 3. 20V Hot-Plug Into a 10μF Capacitor
WALL ADAPTOR
AC/DC
RIN
+
LIN
IN
OUT
MOBILE DEVICE
IN OUT
ICABLE
LT4362
COUT
CABLE
LOAD
VIN
10V/DIV
GND
436212 F04a
VOUT
1V/DIV
ICABLE
1A/DIV
5μs/DIV
436212 F04b
RIN = 150mΩ, LIN = 0.7μH
LOAD = 10Ω, COUT = 10μF
Figure 4. 20V Hot-Plug Into the LTC4362
Thermal Shutdown
The internal N-channel MOSFET is protected by a thermal
shutdown circuit. If its temperature reaches 150°C, it will
shut off immediately and the PWRGD pull-down releases.
It will turn on again after its temperature drops below
140°C.
Input Transients
Figure 3 shows a typical setup when an AC wall adaptor
charges a mobile device. The inductor LIN represents the
lumped equivalent inductance of the cable and the EMI filter
found in some wall adaptors. RIN is the lumped equivalent
resistance of the cable, adaptor output capacitor ESR and
the connector contact resistance.
LIN and RIN form an LC tank circuit with any capacitance
at IN. If the wall adaptor is powered-up first, plugging the
wall adaptor output to IN does the equivalent of applying
a voltage step to this LC circuit. The resultant voltage
overshoot at IN can rise to twice the DC output voltage of
the wall adaptor (or more if ceramic capacitors with large
voltage coefficients are used) as shown in Figure 3. Figure 4
shows the 20V adaptor output applied to the LTC4362.
Due to the low capacitance at the IN pin, the plug-in transient
has been brought down to a manageable level.
Input transients also occur when the current through
the cable inductance changes abruptly. This can happen when the LTC4362 turns off its internal N-channel
MOSFET quickly in an overvoltage or overcurrent event.
436212f
9
LTC4362-1/LTC4362-2
APPLICATIONS INFORMATION
Figure 5 shows an input transient after an overcurrent.
The current in LIN will cause VIN to overshoot and avalanche
the internal N-channel MOSFET to COUT.
adaptor is mistakenly hot-plugged into the 5V device with
the USB input already live. As shown in Figure 7, a large
current can build up in LIN to charge up COUT. When the
internal MOSFET shuts off, this current is dumped into
COUT, causing a large 40V transient. The LTC4362 limits
this to a 1V rise in the output voltage.
TURN-OFF
VIN
10V/DIV
ICABLE
10A/DIV
VOUT
5V/DIV
OVERCURRENT
ICABLE
2A/DIV
VOUT
2V/DIV
436212 F05
2μs/DIV
FIGURE 4 CIRCUIT
RIN = 150mΩ, LIN = 0.7μH
LOAD = 10Ω, COUT = 10μF
VIN
10V/DIV
1μs/DIV
Figure 5. Input Transient After Overcurrent
Typically, IN will be clamped to a voltage of VOUT + 1.3•(30V
BVDSS of Internal MOSFET) = 45V. The single, nonrepetitive, pulse of energy (EAS) absorbed by the MOSFET during this avalanche breakdown with a peak current IAS is
approximated by the formula:
1
E AS = • LIN •IAS 2
2
For LIN = 0.7μH and IAS = 3A, then EAS = 3.15μJ. This is
within the IAS and EAS capabilities of the internal MOSFET.
So in most instances, the LTC4362 can ride through such
transients without a bypass capacitor, transient voltage
suppressor or other external components at IN.
Figure 6 shows a particularly bad situation which can occur in a mobile device with dual power inputs. A 20V wall
RIN
20V
WALL
ADAPTOR
+
–
ICABLE
Figure 7. Overvoltage Protection Waveforms
When 20V Plugged into 5V System
If the voltage rise at VOUT due to the discharge of the energy
in LIN into COUT is not acceptable or the avalanche capability
of the MOSFET is exceeded, an additional external clamp
Z1 such as the SMAJ24A can be placed between IN and
GND. Figure 8 shows the resulting waveform.
ICABLE
10A/DIV
VOUT
2V/DIV
VIN
10V/DIV
IN
OUT
B160
LT4362
1μs/DIV
COUT
LOAD
+
–
RIN = 150mΩ, LIN = 2μH
LOAD = 10Ω
COUT = 10μF (16V, SIZE 1210)
LIN
IN OUT
5V
USB
436212 F07
GND
436212 F06
436212 F08
RIN = 150mΩ, LIN = 0.7μH
LOAD = 10Ω
COUT = 10μF (16V, SIZE 1210)
Figure 8. Overvoltage Protection Waveforms When
20V Plugged into 5V System with External IN Clamp
Figure 6. Setup for Testing 20V Plugged into 5V System
436212f
10
LTC4362-1/LTC4362-2
APPLICATIONS INFORMATION
COUT is the decoupling capacitor of the protected circuit
and its value is largely determined by the circuit requirements. Using a larger COUT works with LIN to slow down
the dV/dt at OUT, allowing time for the LTC4362 to shut
off its MOSFET before VOUT overshoots to a dangerous
voltage. A larger COUT also helps to lower the ΔVOUT due
to the discharge of energy in LIN if the MOSFET BVDSS is
used as an input clamp.
MOSFET wide and short. The PCB traces associated with
the power path through the internal N-channel MOSFET
should have low resistance.
SUPPLY
6
4
8
1
1
2
LTC4362
2
Si1471DH
Layout Considerations
Figure 9 shows an example PCB layout for the LTC4362
with an external P-channel MOSFET for negative voltage
protection. Keep the traces to the internal N-channel
5
7
9
3
6
4
5
OUT
3
GND
436212 F08
Figure 9. Layout for External P-channel MOSFET Configuration
PACKAGE DESCRIPTION
DC Package
8-Lead Plastic DFN (2mm × 3mm)
(Reference LTC DWG # 05-08-1718 Rev A)
R = 0.115
TYP
R = 0.05
5
TYP
2.00 p0.10
(2 SIDES)
0.70 p0.05
3.50 p0.05
2.10 p0.05
0.40 p 0.10
8
1.35 p0.10
1.35 p0.05
1.65 p 0.05
1.65 p 0.10
3.00 p0.10
(2 SIDES)
PACKAGE
OUTLINE
PIN 1 NOTCH
R = 0.20 OR 0.25
s 45o CHAMFER
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
(DCB8) DFN 0106 REV A
4
0.25 p 0.05
0.45 BSC
0.200 REF
0.23 p 0.05
0.45 BSC
0.75 p0.05
1.35 REF
1.35 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
1
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
436212f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC4362-1/LTC4362-2
TYPICAL APPLICATION
5V System Protected from ±24V Power Supplies and Overcurrent
VIN
5V
M1
Si1471DH
IN
Z1
OPTIONAL
OUT
COUT
10μF
LTC4362
VOUT
5V
0.5A
5V
VIO
GATEP
Z1: SMAJ24A
R1
1k
D1
LN1351CTR
PWRGD
ON
GND
436212 TA02
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436212f
12 Linear Technology Corporation
LT 0610 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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