LINER LTC4440 High speed, high voltage high side gate driver Datasheet

Final Electrical Specifications
LTC4440
High Speed, High Voltage
High Side Gate Driver
October 2003
U
FEATURES
■
■
■
■
■
■
■
■
■
■
■
DESCRIPTION
Wide Operating VIN Range: Up to 80V
Rugged Architecture Tolerant of 100V VIN
Transients
Powerful 1.5Ω Driver Pull-Down
Powerful 2.4A Peak Current Driver Pull-Up
7ns Fall Time Driving 1000pF Load
10ns Rise Time Driving 1000pF Load
Drives Standard Threshold MOSFETs
TTL/CMOS Compatible Inputs with Hysteresis
Input Thresholds are Independent of Supply
Undervoltage Lockout
Low Profile (1mm) SOT-23 (ThinSOT)TM or Thermally
Enhanced 8-Pin MSOP Packages
U
APPLICATIO S
■
■
■
■
The LTC®4440 is a high frequency high side N-channel
MOSFET gate driver that is designed to operate in applications with VIN voltages up to 80V. The LTC4440 can also
withstand and continue to function during 100V VIN transients. The powerful driver capability reduces switching
losses in MOSFETs with high gate capacitances. The
LTC4440’s pull-up has a peak output current of 2.4A and
its pull-down has an output impedance of 1.5Ω.
The LTC4440 features supply independent TTL/CMOS
compatible input thresholds with 350mV of hysteresis.
The input logic signal is internally level-shifted to the
bootstrapped supply, which may function at up to 115V
above ground.
The LTC4440 contains both high side and low side undervoltage lockout circuits that disable the external MOSFET
when activated.
Telecommunications Power Systems
Distributed Power Architectures
Server Power Supplies
High Density Power Modules
The LTC4440 is available in the low profile (1mm) SOT-23
or a thermally enhanced 8-lead MSOP package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
ThinSOT is a trademark of Linear Technology Corporation.
U
TYPICAL APPLICATIO
Synchronous Phase-Modulated Full-Bridge Converter
VIN
36V TO 72V
100V PEAK TRANSIENT
(ABS MAX)
VCC
8V TO 15V
LTC4440 Driving a 1000pF
Capacitive Load
LTC4440
INPUT
(INP)
2V/DIV
VCC BOOST
INP
TG
GND
TS
OUTPUT
(TG – TS)
5V/DIV
LTC4440
VCC
LTC3722-1
VCC BOOST
INP
TG
GND
TS
•
•
10ns/DIV
4440 F02
4440 TA01
4440i
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
1
LTC4440
U
W W
W
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltage
VCC ....................................................... – 0.3V to 15V
BOOST – TS ......................................... – 0.3V to 15V
INP Voltage ............................................... – 0.3V to 15V
BOOST Voltage (Continuous) ................... – 0.3V to 95V
BOOST Voltage (100ms) ........................ – 0.3V to 115V
TS Voltage (Continuous) ............................. – 5V to 80V
TS Voltage (100ms) ................................... – 5V to 100V
Peak Output Current < 1µs (TG) ............................... 4A
Driver Output TG (with Respect to TS) ..... – 0.3V to 15V
Operating Ambient Temperature Range
(Note 2) .............................................. – 40°C to 85°C
Junction Temperature (Note 3) ............................ 150°C
Storage Ambient Temperature Range ... – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
W
U
U
PACKAGE/ORDER INFORMATION
ORDER PART
NUMBER
TOP VIEW
INP
GND
VCC
GND
1
2
3
4
9
8
7
6
5
TS
TG
BOOST
NC
MS8E PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 40°C/W (NOTE 4)
EXPOSED PAD IS GND (PIN 9)
MUST BE SOLDERED TO PCB
LTC4440EMS8E
MS8E
PART MARKING
LTF9
ORDER PART
NUMBER
TOP VIEW
VCC 1
LTC4440ES6
6 BOOST
GND 2
5 TG
INP 3
4 TS
S6
PART MARKING
S6 PACKAGE
6-LEAD PLASTIC SOT-23
TJMAX = 150°C, θJA = 230°C/W
LTZY
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = VBOOST = 12V, VTS = GND = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
250
25
400
80
µA
µA
6.5
6.2
300
7.3
7.0
V
V
mV
110
86
180
170
µA
µA
7.4
6.9
500
7.95
7.60
V
V
mV
Main Supply (VCC)
IVCC
UVLO
DC Supply Current
Normal Operation
UVLO
Undervoltage Lockout Threshold
INP = 0V
VIN < UVLO Threshold – 0.1V
VCC Rising
VCC Falling
Hysteresis
●
●
5.7
5.4
Bootstrapped Supply (BOOST – TS)
IBOOST
UVLOHS
DC Supply Current
Normal Operation
UVLO
Undervoltage Lockout Threshold
INP = 0V
VBOOST – VTS < UVLOHS – 0.1V, INP = 0V
VBOOST – VTS Rising
VBOOST – VTS Falling
Hysteresis
●
●
6.75
6.25
Input Signal (INP)
VIH
High Input Threshold
INP Ramping High
●
1.3
1.6
2
V
VIL
Low Input Threshold
INP Ramping Low
●
0.85
1.25
1.6
V
VIH – VIL
Input Voltage Hysteresis
0.350
IINP
Input Pin Bias Current
±0.01
V
±2
µA
4440i
2
LTC4440
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = VBOOST = 12V, VTS = GND = 0V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
220
mV
2.2
Ω
Output Gate Driver (TG)
VOH
High Output Voltage
ITG = –10mA, VOH = VBOOST – VTG
VOL
Low Output Voltage
ITG = 100mA
0.7
IPU
Peak Pull-Up Current
●
RDS
Output Pull-Down Resistance
●
150
●
1.7
V
2.4
1.5
A
Switching Timing
tr
Output Rise Time
10% – 90%, CL = 1nF
10% – 90%, CL = 10nF
10
100
ns
ns
tf
Output Fall Time
10% – 90%, CL = 1nF
10% – 90%, CL = 10nF
7
70
ns
ns
tPLH
Output Low-High Propagation Delay
●
30
65
ns
tPHL
Output High-Low Propagation Delay
●
28
65
ns
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LTC4440 is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
TJ = TA + (PD • θJA°C/W)
Note 4: Failure to solder the exposed back side of the MS8E package to
the PC board will result in a thermal resistance much higher than 40°C/W.
U W
TYPICAL PERFOR A CE CHARACTERISTICS
VCC Supply Quiescent Current
vs Voltage
TA = 25°C
500
INP = 0V
160
TA = 25°C
450
QUIESCENT CURRENT (µA)
250
QUIESCENT CURRENT (µA)
Output Low Voltage (VOL)
vs Supply Voltage
INP = VCC
200
150
100
50
OUTPUT (TG – TS) VOLTAGE (mV)
300
BOOST – TS Supply Quiescent
Current vs Voltage
400
350
INP = VCC
300
250
200
150
INP = 0V
100
ITG = 100mA
TA = 25°C
155
150
145
140
135
50
0
0
0
5
10
VCC SUPPLY VOLTAGE (V)
15
4440 G01
130
0
10
5
BOOST – TS SUPPLY VOLTAGE (V)
15
4440 G02
8
12
14
11
13
9
10
BOOST – TS SUPPLY VOLTAGE (V)
15
4440 G03
4440i
3
LTC4440
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Output High Voltage (VOH)
vs Supply Voltage
TA = 25°C
14
INPUT THRESHOLD (V)
ITG = –1mA
12
ITG = –10mA
11
ITG = –100mA
10
9
380
TA = 25°C
1.8
13
VCC Supply Current
at TTL Input Levels
VCC SUPPLY QUIESCENT CURRENT (µA)
2.0
15
OUTPUT VOLTAGE (TG – TS) (V)
Input Thresholds (INP)
vs Supply Voltage
VIH
(INPUT HIGH THRESHOLD)
1.6
1.4
VIL
(INPUT LOW THRESHOLD)
1.2
1.0
8
0.8
7
13
14
10
12
11
BOOST – TS SUPPLY VOLTAGE (V)
9
8
7
15
9
11
13
VCC SUPPLY VOLTAGE (V)
300
280
INP = 0.8V
260
240
220
200
15
12
10
VCC SUPPLY VOLTAGE (V)
8
VCC Undervoltage Lockout
Thresholds vs Temperature
6.45
VCC SUPPLY VOLTAGE (V)
CURRENT (µA)
6.40
INP = 0V
250
INP = 12V
200
150
100
50
4440 G07
RISING THRESHOLD
6.35
6.30
6.25
6.20
FALLING THRESHOLD
6.15
6.10
0
–60
–30
0
30
60
90
6.05
–60
120
–30
TEMPERATURE (°C)
0
30
60
90
Boost Supply (BOOST – TS)
Undervoltage Lockout Thresholds
vs Temperature
350
300
250
200
150
INP = 0V
100
RISING THRESHOLD
7.5
VIH (VCC = 12V)
1.8
7.4
INPUT THRESHOLD (V)
BOOST – TS SUPPLY VOLTAGE (V)
400
CURRENT (µA)
Input Threshold vs Temperature
2.0
INP = 12V
450
7.3
7.2
7.1
FALLING THRESHOLD
7.0
6.9
1.6
VIH (VCC = 15V)
VIH (VCC = 8V)
VIL (VCC = 12V)
VIL (VCC = 15V)
1.4
1.2
VIL (VCC = 8V)
1.0
6.8
50
0
–60
4440 G09
7.6
500
120
TEMPERATURE (°C)
4440 G08
Boost Supply Current
vs Temperature
14
4440 G06
300
INPUT
(INP)
5V/DIV
250ns/DIV
INP = 2V
320
VCC Supply Current (VCC = 12V)
vs Temperature
2MHz Operation
VCC = 12V
340
4440 G05
4440 G04
OUTPUT
(TG)
5V/DIV
TA = 25°C
360
–30
0
30
60
90
120
TEMPERATURE (°C)
6.7
–60
–30
0
30
60
90
120
–30
0
30
60
90
120
TEMPERATURE (°C)
TEMPERATURE (°C)
4440 G10
0.8
–60
4440 G11
4440 G12
4440i
4
LTC4440
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Peak Driver (TG) Pull-Up Current
vs Temperature
500
3.0
480
2.9
460
2.8
440
PEAK CURRENT (A)
HYSTERESIS (mV)
Input Threshold Hysteresis
vs Temperature
VIH-VIL (VCC = 12V)
420
VIH-VIL (VCC = 15V)
400
380 VIH-VIL (VCC = 8V)
360
2.6
2.5
2.4
2.2
320
2.1
0
–30
30
60
90
BOOST – TS = 12V
2.3
340
300
–60
BOOST – TS = 15V
2.7
2.0
–60
120
–30
TEMPERATURE (°C)
0
30
60
90
120
TEMPERATURE (°C)
4440 G13
4440 G14
Output Driver Pull-Down
Resistance vs Temperature
Propagation Delay vs Temperature
(VCC = BOOST = 12V)
45
3.0
40
BOOST – TS = 12V
2.0
RDS (Ω)
PROPAGATION DELAY (ns)
2.5
BOOST – TS = 8V
1.5
BOOST – TS = 15V
1.0
35
tPLH
30
tPHL
25
20
15
10
0.5
5
0
–60
–30
0
30
60
90
120
0
–60
–30
0
30
60
90
120
TEMPERATURE (°C)
TEMPERATURE (°C)
4440 G15
4440 G16
U
U
U
PI FU CTIO S
SOT-23 Package
VCC (Pin 1): Chip Supply. This pin powers the internal low
side circuitry. A low ESR ceramic bypass capacitor should
be tied between this pin and the GND pin (Pin 2).
GND (Pin 2): Chip Ground.
INP (Pin 3): Input Signal. TTL/CMOS compatible input
referenced to GND (Pin 2).
TS (Pin 4): Top (High Side) Source Connection.
TG (Pin 5): High Current Gate Driver Output (Top Gate).
This pin swings between TS and BOOST – 0.7V.
BOOST (Pin 6): High Side Bootstrapped Supply. An external capacitor should be tied between this pin and TS
(Pin␣ 4). Normally, a bootstrap diode is connected between
VCC (Pin 1) and this pin. Voltage swing at this pin is from
VCC – VD to VIN + VCC – VD, where VD is the forward voltage
drop of the bootstrap diode.
4440i
5
LTC4440
U
U
U
PI FU CTIO S
Exposed Pad MS8E Package
INP (Pin 1): Input Signal. TTL/CMOS compatible input
referenced to GND (Pin 2).
GND (Pins 2, 4): Chip Ground.
VCC (Pin 3): Chip Supply. This pin powers the internal low
side circuitry. A low ESR ceramic bypass capacitor should
be tied between this pin and the GND pin (Pin 2).
NC (Pin 5): No Connect. No connection required. For
convenience, this pin may be tied to Pin 6 (BOOST) on the
application board.
BOOST (Pin 6): High Side Bootstrapped Supply. An external capacitor should be tied between this pin and TS
(Pin␣ 8). Normally, a bootstrap diode is connected between
VCC (Pin 3) and this pin. Voltage swing at this pin is from
VCC – VD to VIN + VCC – VD, where VD is the forward voltage
drop of the bootstrap diode.
TG (Pin 7): High Current Gate Driver Output (Top Gate).
This pin swings between TS and BOOST.
TS (Pin 8): Top (High Side) Source Connection.
Exposed Pad (Pin 9): Ground. Must be electrically connected to Pins 2, 4.
W
BLOCK DIAGRA
BOOST
VCC UNDERVOLTAGE
LOCKOUT
8V TO 15V
HIGH SIDE
UNDERVOLTAGE
LOCKOUT
VIN
UP TO 80V,
TRANSIENT
UP TO 100V
TG
TS
GND
BOOST
INP
LEVEL SHIFTER
GND
4440 BD
TS
WU
W
TI I G DIAGRA
INPUT RISE/FALL TIME < 10ns
INPUT (INP)
VIH
VIL
90%
10%
OUTPUT (TG)
tr
tPLH
tf
tPHL
4440 TD
4440i
6
LTC4440
U
W
U U
APPLICATIO S I FOR ATIO
Overview
The LTC4440 receives a ground-referenced, low voltage
digital input signal to drive a high side N-channel power
MOSFET whose drain can float up to 100V above ground,
eliminating the need for a transformer between the low
voltage control signal and the high side gate driver. The
LTC4440 normally operates in applications with input
supply voltages (VIN) up to 80V, but is able to withstand
and continue to function during 100V, 100ms transients
on the input supply.
The powerful output driver of the LTC4440 reduces the
switching losses of the power MOSFET, which increase
with transition time. The LTC4440 is capable of driving a
1nF load with 10ns rise and 7ns fall times using a
bootstrapped supply voltage VBOOST–TS of 12V.
Input Stage
The LTC4440 employs TTL/CMOS compatible input thresholds that allow a low voltage digital signal to drive standard
power MOSFETs. The LTC4440 contains an internal voltage regulator that biases the input buffer, allowing the
input thresholds (VIH = 1.6V, VIL = 1.25V) to be independent of variations in VCC. The 350mV hysteresis between
VIH and VIL eliminates false triggering due to noise during
switching transitions. However, care should be taken to
keep this pin from any noise pickup, especially in high
frequency, high voltage applications. The LTC4440 input
buffer has a high input impedance and draws negligible
input current, simplifying the drive circuitry required for
the input.
Output Stage
A simplified version of the LTC4440’s output stage is
shown in Figure 3 . The pull-down device is an N-channel
MOSFET (N1) and the pull-up device is an NPN bipolar
junction transistor (Q1). The output swings from the lower
rail (TS) to within an NPN VBE (~ 0.7V) of the positive rail
(BOOST). This large voltage swing is important in driving
external power MOSFETs, whose RDS(ON) is inversely
proportional to its gate overdrive voltage (VGS – VTH).
VIN
UP TO 100V
BOOST
LTC4440
CGD
Q1
TG
POWER
MOSFET
N1
CGS
TS
LOAD
INDUCTOR
V–
4440 F03
Figure 3. Capacitance Seen by TG During Switching
The LTC4440’s peak pull-up (Q1) current is 2.4A while the
pull-down (N1) resistance is 1.6Ω. The low impedance of
N1 is required to discharge the power MOSFET’s gate
capacitance during high-to-low signal transitions. When
the power MOSFET’s gate is pulled low (gate shorted to
source through N1) by the LTC4440, its source (TS) is
pulled low by its load (e.g., an inductor or resistor). The
slew rate of the source/gate voltage causes current to flow
back to the MOSFET’s gate through the gate-to-drain
capacitance (CGD). If the MOSFET driver does not have
sufficient sink current capability (low output impedance),
the current through the power MOSFET’s CGD can momentarily pull the gate high, turning the MOSFET back on.
A similar scenario exists when the LTC4440 is used to
drive a low side MOSFET. When the low side power
MOSFET’s gate is pulled low by the LTC4440, its drain
voltage is pulled high by its load (e.g., inductor or resistor). The slew rate of the drain voltage causes current to
flow back to the MOSFET’s gate through its gate-to-drain
capacitance. If the MOSFET driver does not have sufficient
sink current capability (low output impedance), the current through the power MOSFET’s CGD can momentarily
pull the gate high, turning the MOSFET back on.
4440i
7
LTC4440
U
W
U U
APPLICATIO S I FOR ATIO
Rise/Fall Time
Since the power MOSFET generally accounts for the
majority of the power loss in a converter, it is important to
quickly turn it on or off, thereby minimizing the transition
time in its linear region. The LTC4440 can drive a 1nF load
with a 10ns rise time and 7ns fall time.
The LTC4440’s rise and fall times are determined by the
peak current capabilities of Q1 and N1. The predriver that
drives Q1 and N1 uses a nonoverlapping transition scheme
to minimize cross-conduction currents. N1 is fully turned
off before Q1 is turned on and vice versa.
Power Dissipation
To ensure proper operation and long-term reliability, the
LTC4440 must not operate beyond its maximum temperature rating. Package junction temperature can be calculated by:
TJ = TA + PD (θJA)
where:
TJ = Junction Temperature
TA = Ambient Temperature
PD = Power Dissipation
θJA = Junction-to-Ambient Thermal Resistance
Power dissipation consists of standby and switching
power losses:
PD = PSTDBY + PAC
where:
PSTDBY = Standby Power Losses
PAC = AC Switching Losses
The LTC4440 consumes very little current during standby.
The DC power loss at VCC = 12V and VBOOST–TS = 12V is
only (250µA + 110µA)(12V) = 4.32mW.
AC switching losses are made up of the output capacitive
load losses and the transition state losses. The capacitive
load losses are primarily due to the large AC currents
needed to charge and discharge the load capacitance
during switching. Load losses for the output driver driving
a pure capacitive load COUT would be:
Load Capacitive Power = (COUT)(f)(VBOOST–TS)2
The power MOSFET’s gate capacitance seen by the driver
output varies with its VGS voltage level during switching.
A power MOSFET’s capacitive load power dissipation can
be calculated using its gate charge, QG. The QG value
corresponding to the MOSFET’s VGS value (VCC in this
case) can be readily obtained from the manufacturer’s QG
vs VGS curves:
Load Capacitive Power (MOS) = (VBOOST–TS)(QG)(f)
Transition state power losses are due to both AC currents
required to charge and discharge the driver’s internal
nodal capacitances and cross-conduction currents in the
internal gates.
Undervoltage Lockout (UVLO)
The LTC4440 contains both low side and high side undervoltage lockout detectors that monitor VCC and the
bootstrapped supply VBOOST–TS. When VCC falls below
6.2V, the internal buffer is disabled and the output pin OUT
is pulled down to TS. When VBOOST – TS falls below 6.9V,
OUT is pulled down to TS. When both supplies are undervoltage, OUT is pulled low to TS and the chip enters a low
current mode, drawing approximately 25µA from VCC and
86µA from BOOST.
4440i
8
LTC4440
U
W
U U
APPLICATIO S I FOR ATIO
Bypassing and Grounding
The LTC4440 requires proper bypassing on the VCC and
VBOOST–TS supplies due to its high speed switching (nanoseconds) and large AC currents (Amperes). Careless
component placement and PCB trace routing may cause
excessive ringing and under/overshoot.
To obtain the optimum performance from the LTC4440:
A. Mount the bypass capacitors as close as possible
between the VCC and GND pins and the BOOST and TS
pins. The leads should be shortened as much as possible to reduce lead inductance.
B. Use a low inductance, low impedance ground plane to
reduce any ground drop and stray capacitance. Remember that the LTC4440 switches >2A peak currents
and any significant ground drop will degrade signal
integrity.
C. Plan the power/ground routing carefully. Know where
the large load switching current is coming from and
going to. Maintain separate ground return paths for the
input pin and the output power stage.
D. Keep the copper trace between the driver output pin and
the load short and wide.
E. When using the MS8E package, be sure to solder the
exposed pad on the back side of the LTC4440 package
to the board. Correctly soldered to a 2500mm2 doublesided 1oz copper board, the LTC4440 has a thermal
resistance of approximately 40°C/W. Failure to make
good thermal contact between the exposed back side
and the copper board will result in thermal resistances
far greater than 40°C/W.
4440i
9
10
30.1k
12V
0.1µF
1.5nF
20k
1/4W
182k
VIN
C2
0.82µF
100V
D27
12V
100Ω
MMBT3904
1µF
11
2
9
5VREF
Q10
Q7
12V
2
220pF
8
20
180pF
D24
C
19
0.02Ω
1.5W
499Ω
D
17
ISNS
4
15
+
D
8
CS
OUTE
16
24
10k
13
33k
5
6
22
D26
120k
68nF
23
7
Q35
4
3
2.2nF
330pF
750Ω
5VREF
75k
8
•
1
7
6
5
•4
6
•3
51Ω
2W
8
3
C30
2.2nF
250V
4
MOC207
330pF
4.7k
100k
2
330Ω
1
D12
Si7852DP
×2
D14
5
0.33µF
Si7852DP
×2
D22
0.33µF
51Ω
2W
T5
1(1.5mH):0.5:0.5
L4
1mH
Q16
Q9
12V
0.22µF
0.1µF
ISNS
22Ω
C14
68µF
20V
12V
2
CT SPRG RLEB FB GND PGND SS COMP
LTC3722-1
5.1k
1
21
L2
150nH
Si7852DP
×2
0.02Ω
1.5W
B
3
12V
VCC
LTC4440EMS8E
6
BOOST
1
Si7852DP
7
IN
C
TG
×2
GND GND TS
OUTA OUTB OUTC OUTD OUTF
A
0.22µF
DPRG NC SYNC
150k
14
UVLO V
REF
VIN
B
8
TS
SBUS ADLY PDLY
220pF
4
GND GND
0.47µF
12
18
10
4.99k
20k
D23
VCC
LTC4440EMS8E
6
BOOST
1
7
IN
A
TG
3
C3, C4, C5
0.82µF
100V
×3
12V
VIN
C1-C5: VITRAMON VJ1812Y824KXBAT
C13, C36: SANYO 16SP180M
C14: AVX TPSE686M020R0150
C30: MuRata DE2E3KH222MB3B
D1, D5, D21, D22: MURS120T3
D12, D14, D23, D24: BAS21
D15, D17, D26: BAT54
D16: MMBZ5229B
D20: MMBZ5231B
D27: MMBZ5242B
L1: PA1294.910
L2: PULSE PA0651
L4: COILCRAFT DO1608C-105
L5: SUMIDA CDEP105-1R3MC-50
Q7, Q9, Q25, Q26: ZETEX FMMT619
Q10, Q16-Q18: ZETEX FMMT718
Q35: MMBT3906
T1, T4: PULSE PA0526
T5: PULSE PA0297
36V TO
72V
–VIN
+VIN
L5
1.3µH
•
11
220pF
100Ω
1/4W
D20
5.1V
6
5
7
GNDF GNDS RMID
+
2.49k
9.53k
0.1µF
D5
D1
–VOUT
+VOUT
Q26
1µF
C13, C36
180µF
16V
×2
C1
0.82µF
100V
13k
1/2W
–VOUT
22nF
10k
D16
4.3V
Q18
+VOUT
Si7852DP
×4
VHIGH
820pF
200V
15Ω
1.5W
+VOUT
4440 TA03
2
4
V+ COMP RTOP
LT1431
8
1
COLL
REF
3
2.7k
470Ω
1/4W
7
5
OUT2
OUT1
3 LTC1693-1 6
IN2
VCC2
1
8
IN1
VCC1
2
4
GND2 GND1
–VOUT
Q25
•
L1
0.85µH
VHIGH
Si7852DP
×4
T4
5:5(105µH):1:1 Q17
•7
8
• 10
11
•7
8
• 10
0.047µF
D17
D15
1
6
2•
4
2•
4
T1
5:5(105µH):1:1
D21
LTC3722/LTC4440 420W 36V-72V Input to 12V/35A Isolated Full-Bridge Supply
+VOUT
–VOUT
12V
35A
+VOUT
+VOUT
LTC4440
TYPICAL APPLICATIO
4440i
U
LTC4440
U
PACKAGE DESCRIPTION
MS8E Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1662)
5.23
(.206)
MIN
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.889 ± 0.127
(.035 ± .005)
2.794 ± 0.102
(.110 ± .004)
2.083 ± 0.102 3.20 – 3.45
(.082 ± .004) (.126 – .136)
0.42 ± 0.038
(.0165 ± .0015)
TYP
0.65
(.0256)
BSC
7 6 5
0.52
(.0205)
REF
1
2.06 ± 0.102
(.081 ± .004)
1.83 ± 0.102
(.072 ± .004)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0.254
(.010)
8
0° – 6° TYP
GAUGE
PLANE
1
0.53 ± 0.152
(.021 ± .006)
RECOMMENDED SOLDER PAD LAYOUT
2 3
4
1.10
(.043)
MAX
DETAIL “A”
8
0.86
(.034)
REF
BOTTOM VIEW OF
EXPOSED PAD OPTION
0.18
(.007)
SEATING
NOTE:
PLANE
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.22 – 0.38
(.009 – .015)
TYP
0.127 ± 0.076
(.005 ± .003)
0.65
(.0256)
BSC
MSOP (MS8E) 0603
S6 Package
6-Lead Plastic SOT-23
(Reference LTC DWG # 05-08-1636)
0.62
MAX
2.90 BSC
(NOTE 4)
0.95
REF
1.22 REF
3.85 MAX 2.62 REF
1.4 MIN
2.80 BSC
1.50 – 1.75
(NOTE 4)
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.30 – 0.45
6 PLCS (NOTE 3)
0.95 BSC
0.80 – 0.90
0.20 BSC
0.01 – 0.10
1.00 MAX
DATUM ‘A’
0.30 – 0.50 REF
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
0.09 – 0.20
(NOTE 3)
1.90 BSC
S6 TSOT-23 0302
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
4440i
11
LTC4440
U
TYPICAL APPLICATIO
LTC3723-2/LTC4440 240W 42V-56V Input 94.5% Efficient Unregulated 12V Half-Bridge Converter
L5
0.56µH
VIN
2
+VIN
7
•
1µF
100V
48V
1µF
100V
–VIN
•
9
11V
1µF
100V
D23
1µF
100V
T2
70(980µH):1
8
1
CS+
GND
1µF
Si7852DP 100V
×2
500pF
100V
•
7
3
1
12V
B
L4
1mH
C14
68µF
+
Si7852DP
×2
•
D12
1µF
D8
T1
5T:4T(75µH):
4T:2T:2T
D14
6
Q17
C32
180µF
16V
Si7370DP
×2
Si7370DP
×2
C30
2.2nF
250V
5
0.22µF
4
+
10Ω
1W
•
•
1µF
100V
3
TS
2
+VOUT
11
4
1
VCC
LTC4440ES6
6
BOOST
3
5
A
IN
TG
L6 0.22µH
•
–VOUT
D9
Q18
–VOUT
T3
1.5mH 1:0.5:0.5
•3
1
VIN
12V
22Ω
11V
5
215k
4
2
3
DRVA DRVB
SDRB
SDRA
UVLO DPRG
1µF
1nF
12V
MMBZ5242B
62k
1
9
8
16
5
COMP
VREF RAMP CT SPRG GND CS
12
7
BAT54
0.47µF
10k
MMBT3904
+VOUT
1k
1µF
10
SS
14
11
CS+
B
FB
13
0.22µF
1k
D26
150pF
330pF
5
7
OUT1
OUT2
3 LTC1693-1 6
IN2
VCC2
1
8
IN1
VCC1
2
4
GND2 GND1
MMBZ5240B
10V
–VOUT
LTC3723-2
1µF
15
30.1k
VCC
330pF
8
6
220pF
•4
A
120Ω
100Ω
1/4W
0.1µF
MMBT3904
15k
1/4W
4.7k
6
•
BAT54
470pF
0.47µF
4.7k
2N7002
7.5Ω
D27
7.5Ω
4440 TA04
1µF, 100V: TDK C4532X7R2A105M
C14: AVX TPSE686M020R0150
C30: MuRata DE2E3KH222MB3B
C32: SANYO 16SP180M
D8, D9, D26, D27: MMBD914
D12, D14, D23: BAS21
L4: COILCRAFT DO1608C-105
L5: COILCRAFT DO1813P-561HC
L6: SUMIDA CDEP105-0R2NC-50
Q17, Q18: ZETEX FMMT718
T1: PULSE PA0901-005
T2: PULSE P8207
T3: PULSE PA0297
RELATED PARTS
PART NUMBER
LTC1154
LTC1155
DESCRIPTION
High Side Micropower MOSFET Drivers
Dual Micropower High/Low Side Drivers with
Internal Charge Pump
LT®1161
Quad Protected High Side MOSFET Driver
LTC1163
Triple 1.8V to 6V High Side MOSFET Driver
LT1339
High Power Synchronous DC/DC Controller
LTC1535
Isolated RS485 Transceiver
LTC1693 Family High Speed Dual MOSFET Drivers
LT3010/LT3010-5 50mA, 3V to 80V Low Dropout Micropower Regulators
LT3430
High Voltage, 3A, 200kHz Step-Down Switching Regulator
LTC3722-1/
Synchronous Dual Mode Phase Modulated Full-Bridge
LTC3722-2
Controllers
LT3781/LTC1698 36V to 72V Input Isolated DC/DC Converter Chip Set
COMMENTS
Internal Charge Pump, 4.5V to 48V Supply Range, tON = 80µs, tOFF = 28µs
4.5V to 18V Supply Range
8V to 48V Supply Range, tON = 200µs, tOFF = 28µs
1.8V to 6V Supply Range, tON = 95µs, tOFF = 45µs
Current Mode Operation Up to 60V, Dual N-Channel Synchronous Drive
2500VRMS of Isolation Between Line Transceiver and Logic Level Interface
1.5A Peak Output Current, 4.5V ≤ VIN ≤ 13.2V
Low Quiescent Current (30µA), Stable with Small (1µF) Ceramic Capacitor
Input Voltages Up to 60V, Internal 0.1Ω Power Switch, Current Mode
Architecture, 16-Pin Exposed Pad TSSOP Package
Adaptive Zero Voltage Switching, High Output Power Levels
(Up to Kilowatts)
Synchronous Rectification; Overcurrent, Overvoltage, UVLO Protection;
Power Good Output Signal; Voltage Margining; Compact Solution
4440i
12 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
LT/TP 1003 1K • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 2003