LINER LTM4608 Low vin, 8a dc/dc î¼moduletm with tracking, margining, and frequency synchronization Datasheet

LTM4608
Low VIN, 8A DC/DC
TM
µModule with Tracking, Margining,
and Frequency Synchronization
FEATURES
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DESCRIPTION
Complete Standalone Power Supply
±1.5% Output Voltage Regulation
2.375V to 5.5V Input Voltage Range
8A DC, 10A Peak Output Current
0.6V Up to 5V Output
Output Voltage Tracking and Margining
Power Good Tracks Margining
Multiphase Operation
Parallel Current Sharing
Onboard Frequency Synchronization
Spread Spectrum Frequency Modulation
Overcurrent/Thermal Shutdown Protection
Current Mode Control/Fast Transient Response
Selectable Burst Mode® Operation
Up to 95% Efficiency
Output Overvoltage Protection
Small Surface Mount Footprint, Low Profile
(15mm × 9mm × 2.8mm) LGA Package
APPLICATIONS
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Telecom, Networking and Industrial Equipment
Storage Systems
Point of Load Regulation
The LTM®4608 is a complete 8A switch mode DC/DC power
supply. Included in the package are the switching controller, power FETs, inductor and all support components.
Operating over an input voltage range of 2.375V to 5.5V,
the LTM4608 supports an output voltage range of 0.6V
to 5V, set by a single external resistor. This high efficiency
design delivers up to 8A continuous current (10A peak).
Only bulk input and output capacitors are needed.
The low profile package (2.8mm) enables utilization of
unused space on the back side of PC boards for high
density point-of-load regulation. The high switching
frequency and a current mode architecture enable a very
fast transient response to line and load changes without
sacrificing stability. The device supports frequency synchronization, programmable multiphase and/or spread
spectrum operation, output voltage tracking for supply
rail sequencing and voltage margining.
Fault protection features include overvoltage protection,
overcurrent protection and thermal shutdown. The power
module is offered in a compact and thermally enhanced
15mm × 9mm × 2.8mm LGA package. The LTM4608 is
Pb-free and RoHS compliant .
, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology
Corporation. μModule is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Efficiency vs Load Current
100
3V to 5.5V Input to 1.8V Output DC/DC μModule
95
CLKIN
VIN
CLKIN
VOUT
SVIN
FB
ITH
SW
RUN
VOUT
1.8V
100μF
LTM4608
4.87k
ITHM
PLLLPF
PGOOD
TRACK
MGN
CLKOUT GND SGND
EFFICIENCY (%)
VIN = 3.3V
VIN
3V TO 5.5V
10μF
90
VIN = 5V
85
80
PGOOD
VOUT
4608 TA01a
75
VOUT = 1.8V
70
0
2
4
6
LOAD CURRENT (A)
8
10
4608 TA01b
4608f
1
LTM4608
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
VIN, SVIN ...................................................... –0.3V to 6V
CLKOUT ....................................................... –0.3V to 2V
PGOOD, PLLLPF, CLKIN, PHMODE, MODE...–0.3V to VIN
ITH, ITHM, RUN, FB, TRACK,MGN, BSEL .......–0.3V to VIN
VOUT, VSW .......................................–0.3V to (VIN + 0.3V)
Operating Temperature Range (Note 2).... –40°C to 85°C
Junction Temperature ........................................... 125°C
Storage Temperature Range................... –55°C to 125°C
TOP VIEW
A
B
GND
C
D
E
F
G
CNTRL GND
VIN
1
2
SW
3
4
5
6
CNTRL
7
8
9
10
11
GND
VOUT
LGA PACKAGE
68-PIN (15mm × 9mm × 2.8mm)
TJMAX = 125°C, θJA = 25°C/W, θJP = 7°C/W, θJC = 50°C/W, WEIGHT = 1.0g
ORDER INFORMATION
LEAD FREE FINISH
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE (NOTE 2)
LTM4608EV#PBF
LTM4608V
68-Lead (15mm × 9mm × 2.8mm) LGA
–40°C to 85°C
LTM4608IV#PBF
LTM4608V
68-Lead (15mm × 9mm × 2.8mm) LGA
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise noted. See Figure 18.
SYMBOL
PARAMETER
VIN(DC)
Input DC Voltage
VOUT(DC)
Output Voltage
CONDITIONS
CIN = 10μF × 1, COUT = 100μF Ceramic,
100μF POSCAP, RFB = 6.65k
VIN = 2.375V to 5.5V, VOUT = 1.5V, IOUT = 0A
MIN
●
2.375
●
1.475
1.468
2.05
1.85
TYP
MAX
UNITS
5.5
V
1.49
1.49
1.505
1.512
V
V
2.2
2.0
2.35
2.15
V
V
Input Specifications
VIN(UVLO)
Undervoltage Lockout Threshold
SVIN Rising
SVIN Falling
4608f
2
LTM4608
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise noted. See Figure 18.
SYMBOL
PARAMETER
CONDITIONS
MIN
IQ(VIN)
Input Supply Bias Current
VIN = 3.3V, VOUT = 1.5V, No Switching, Mode = VIN
VIN = 3.3V, VOUT = 1.5V, No Switching, Mode = 0V
VIN = 3.3V, VOUT = 1.5V, Switching Continuous
400
1.15
55
μA
mA
mA
VIN = 5V, VOUT = 1.5V, No Switching, Mode = VIN
VIN = 5V, VOUT = 1.5V, No Switching, Mode = 0V
VIN = 5V, VOUT = 1.5V, Switching Continuous
450
1.3
75
μA
mA
mA
1
μA
3.75
4.5
2.93
A
A
A
Shutdown, RUN = 0, VIN = 5V
IS(VIN)
Input Supply Current
VIN = 2.375V, VOUT = 1.5V, IOUT = 5A
VIN = 3.3V, VOUT = 1.5V, IOUT = 8A
VIN = 5V, VOUT = 1.5V, IOUT = 8A
TYP
MAX
UNITS
Output Specifications
IOUT(DC)
ΔVOUT(LINE)
Output Continuous Current Range VOUT = 1.5V
(See Output Current Derating
VIN = 3.3V, 5.5V
Curves for Different VIN, VOUT
VIN = 2.375V
and TA)
0
0
8
5
A
A
Line Regulation Accuracy
VOUT = 1.5V, VIN from 2.375V to 5.5V, IOUT = 0A
●
0.1
0.2
%/V
Load Regulation Accuracy
VOUT = 1.5V
VIN = 3.3V, 5.5V, ILOAD = 0A to 8A
VIN = 2.375V, ILOAD = 0A to 5A
●
●
0.3
0.3
0.75
0.75
%
%
VOUT
ΔVOUT(LOAD)
VOUT
VOUT(AC)
Output Ripple Voltage
IOUT = 0A, COUT = 100μF/X5R/Ceramic, VIN = 5V,
VOUT = 1.5V
fS
Switching Frequency
IOUT = 8A, VIN = 5V, VOUT = 1.5V
fSYNC
SYNC Capture Range
ΔVOUT(START)
Turn-On Overshoot
tSTART
Turn-On Time
10
1.3
1.5
0.75
mVP-P
1.7
MHz
2.25
MHz
COUT = 100μF, VOUT = 1.5V, IOUT = 0A
VIN = 3.3V
VIN = 5V
10
10
mV
mV
COUT = 100μF, VOUT = 1.5V, IOUT = 1A,
Resistive Load, Track = VIN, VIN = 5V
100
μs
ΔVOUT(LS)
Peak Deviation for Dynamic Load Load: 0% to 50% to 0% of Full Load,
COUT = 100μF Ceramic, 100μF POSCAP,
VIN = 5V, VOUT = 1.5V
15
mV
tSETTLE
Settling Time for Dynamic Load
Step
Load: 0% to 50% to 0% of Full Load, VIN = 5V,
VOUT = 1.5V, COUT = 100μF
10
μs
IOUT(PK)
Output Current Limit
COUT = 100μF
VIN = 2.375V, VOUT = 1.5V
VIN = 3.3V, VOUT = 1.5V
VIN = 5V, VOUT = 1.5V
8
11
13
A
A
A
Control Section
VFB
Voltage at FB Pin
SS Delay
Internal Soft-Start Delay
IOUT = 0A, VOUT = 1.5V, VIN = 2.375V to 5.5V
●
0.592
0.589
IFB
VRUN
RUN Pin On/Off Threshold
RUN Rising
RUN Falling
1.4
1.3
0.596
0.596
0.600
0.603
V
V
90
μs
0.2
μA
1.55
1.4
1.7
1.5
V
V
4608f
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LTM4608
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise noted. See Figure 18.
SYMBOL
PARAMETER
CONDITIONS
TRACK
Tracking Threshold (Rising)
Tracking Threshold (Falling)
Tracking Disable Threshold
RUN = VIN
RUN = 0V
RFBHI
Resistor Between VOUT and FB
Pins
ΔVPGOOD
PGOOD Range
%Margining
Output Voltage Margining
Percentage
MIN
TYP
MAX
0.57
0.18
VIN – 0.5
9.95
10
V
V
V
10.05
±10
MGN = VIN, BSEL = 0V
MGN = VIN, BSEL = VIN
MGN = VIN, BSEL = Float
MGN = 0V, BSEL = 0V
MGN = 0V, BSEL = VIN
MGN = 0V, BSEL = Float
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
4
9
14
–4
–9
–14
5
10
15
–5
–10
–15
UNITS
kΩ
%
6
11
16
–6
–11
–16
%
%
%
%
%
%
Note 2: The LTM4608E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the – 40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTM4608I is guaranteed and tested
over the –40°C to 85°C temperature range.
4608f
4
LTM4608
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load Current
Efficiency vs Load Current
100
CONTINUOUS MODE
Efficiency vs Load Current
100
CONTINUOUS MODE
95
95
90
90
90
85
80
5VIN 1.2VOUT
5VIN 1.5VOUT
5VIN 1.8VOUT
5VIN 2.5VOUT
5VIN 3.3VOUT
75
70
0
2
4
LOAD CURRENT
EFFICIENCY (%)
95
EFFICIENCY (%)
EFFICIENCY (%)
100
per Figure 18 Typcial Application
85
80
3.3VIN 1.2VOUT
3.3VIN 1.5VOUT
3.3VIN 1.8VOUT
3.3VIN 2.5VOUT
75
0
8
2
6
0
8
4.0
3.0
80
VOUT (V)
2.5
VOUT = 1.5V
VOUT = 2.5V
VOUT = 3.3V
40
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
LOAD CURRENT (A)
3.0
2.5
2.0
2.0
1.5
1.5
1.0
1.0
0.5
0.5
0
0
1
2
3
VIN (V)
IOUT = 5A
VOUT = 1.2V
VOUT = 1.5V
VOUT = 1.8V
VOUT = 2.5V
VOUT = 3.3V
3.5
VOUT (V)
90
4
4608 G04
0
5
6
0
1
2
3
VIN (V)
4
5
6
4608 G06
4608 G05
Supply Current vs VIN
7
6
VIN to VOUT Step-Down Ratio
4.0
IOUT = 8A
VOUT = 1.2V
VOUT = 1.5V
VOUT = 1.8V
VOUT = 2.5V
VOUT = 3.3V
3.5
60
4
3
2
5
LOAD CURRENT (A)
1
4608 G03
VIN to VOUT Step-Down Ratio
100
70
2.5VIN 1.0VOUT
2.5VIN 1.5VOUT
2.5VIN 1.8VOUT
4608 G02
Burst Mode Efficiency with
5V Input
EFFICIENCY (%)
80
70
4
LOAD CURRENT
4608 G01
50
85
75
70
6
CONTINUOUS MODE
Load Transient Response
Load Transient Response
1.6
SUPPLY CURRENT (mA)
1.4
1A/DIV
1.2
VO = 1.2V PULSE-SKIPPING MODE
2A/DIV
1
20mV/DIV
0.8
0.6
20mV/DIV
VO = 1.2V BURST MODE
0.4
0.2
0
2.5
3
3.5
4
4.5
INPUT VOLTAGE (V)
5
5.5
VIN = 5V
20μs/DIV
VOUT = 3.3V
2A/μs STEP
COUT = 100μF X5R
C1 = 100pF, C3 = 22pF FROM FIGURE 18
4608 G08
VIN = 5V
20μs/DIV
VOUT = 2.5V
2.5A/μs STEP
COUT = 100μF X5R
C1 = 120pF, C3 = 47pF FROM FIGURE 18
4608 G09
4608 G07
4608f
5
LTM4608
TYPICAL PERFORMANCE CHARACTERISTICS
per Figure 18 Typcial Application
Load Transient Response
Load Transient Response
Load Transient Response
2A/DIV
2A/DIV
2A/DIV
20mV/DIV
20mV/DIV
20mV/DIV
4608 G10
VIN = 5V
20μs/DIV
VOUT = 1.8V
2.5A/μs STEP
COUT = 100μF X5R
C1 = NONE, C3 = NONE FROM FIGURE 18
4608 G11
VIN = 5V
20μs/DIV
VOUT = 1.5V
2.5A/μs STEP
COUT = 100μF X5R
C1 = NONE, C3 = NONE FROM FIGURE 18
4608 G12
VIN = 5V
20μs/DIV
VOUT = 1.2V
2.5A/μs STEP
COUT = 2 × 100μF
C1 = 100pF, C3 = NONE FROM FIGURE 18
VFB vs Temperature
Start-Up
Load Regulation vs Current
0.5
602
FC MODE
VIN = 3.3V
VOUT = 1.8V
0.4
600
VOUT
0.5V/DIV
0.3
VFB (mV)
598
VIN
2V/DIV
LOAD REGULATION (%)
VIN = 5.5V
VIN = 3.3V
596
VIN = 2.375V
594
VIN = 5V
50μs/DIV
VOUT = 1.5V
COUT = 100μF NO LOAD AND 8A LOAD
(DEFAULT 100μs SOFT-START)
4608 G13
0.2
0.1
0
–0.1
–0.2
–0.3
592
–0.4
590
–50
–25
0
50
25
TEMPERATURE (°C)
75
100
–0.5
0
1
2
4608 G14
3
6
4
5
LOAD CURRENT (A)
7
8
4608 G15
Short-Circuit Protection
(2.5V Short, No Load)
2.5V Output Current
Short-Circuit Protection
(2.5V Short, 4A Load)
3.0
2V/DIV
2.5
VIN
5V/DIV
VIN
OUTPUT VOLTAGE (V)
5V/DIV
2V/DIV
2.0
VOUT
VOUT
IOUT LOAD
5A/DIV
5A/DIV
1.5
IOUT
IOUT SHORT
5A/DIV
1.0
VIN = 5V
VOUT = 2.5V
0.5
50μs/DIV
4608 G17
VIN = 5V
VOUT = 2.5V
50μs/DIV
4608 G18
0
0
5
10
15
OUTPUT CURRENT (A)
20
4608 G16
4608f
6
LTM4608
PIN FUNCTIONS
VIN (C1, C8, C9, D1, D3-D5, D7-D9 and E8): Power Input
Pins. Apply input voltage between these pins and GND
pins. Recommend placing input decoupling capacitance
directly between VIN pins and GND pins.
VOUT (C10-C11, D10-D11, E9-E11, F9-F11, G9-G11):
Power Output Pins. Apply output load between these pins
and GND pins. Recommend placing output decoupling
capacitance directly between these pins and GND pins.
See Table 1.
GND (A1-A11, B1, B9-B11, F3, F7-F8, G1-G8): Power
Ground Pins for Both Input and Output Returns.
SVIN (F4): Signal Input Voltage. This pin is internally connected to VIN through a lowpass filter.
SGND (E1): Signal Ground Pin. Return ground path for all
analog and low power circuitry. Tie a single connection to
GND in the application.
MODE (B5): Mode Select Input. Tying this pin high enables
Burst Mode operation. Tying this pin low enables forced
continuous operation. Floating this pin or tying it to VIN/2
enables pulse-skipping operation.
CLKIN (B3): External Synchronization Input to Phase
Detector. This pin is internally terminated to SGND with a
50k resistor. The phase locked loop will force the internal
top power PMOS turn on to be synchronized with the
rising edge of the CLKIN signal. Connect this pin to SVIN
to enable spread spectrum modulation. During external
synchronization, make sure the PLLLPF pin is not tied to
VIN or GND.
PLLLPF (E3): Phase Locked Loop Lowpass Filter. An internal lowpass filter is tied to this pin. In spread spectrum
mode, placing a capacitor here to SGND controls the slew
rate from one frequency to the next. Alternatively, floating this pin allows normal running frequency at 1.5MHz,
tying this pin to SVIN forces the part to run at 1.33 times
its normal frequency (2MHz), tying it to ground forces
the frequency to run at 0.67 times its normal frequency
(1MHz).
PHMODE (B4): Phase Selector Input. This pin determines
the phase relationship between the internal oscillator and
CLKOUT. Tie it high for 2-phase operation, tie it low for
3-phase operation, and float or tie it to VIN/2 for 4-phase
operation.
MGN (B8): Margining Pin. Tie this pin to VOUT to disable
margining. For margining, connect a voltage divider from
VIN to GND with the center point connected to the MGN
pin. Each resistor ≈ 50k. See Applications Information
and Figure 18.
BSEL (B7): Margining Bit Select Pin. Tying BSEL low selects
±5%, tying it high selects ±10%. Floating it or tying it to
VIN/2 selects ±15%.
TRACK (E5): Output Voltage Tracking Pin. Voltage tracking is enabled when the TRACK voltage is below 0.57V.
If tracking is not desired, then connect the TRACK pin to
SVIN. If TRACK is not tied to SVIN, then the TRACK pin’s
voltage needs to be below 0.18V before the chip shuts
down even though RUN is already low. Do not float this
pin. A resistor divider and capacitor can be applied to the
TRACK pin to increase the soft-start time of the regulator.
See Applications Information. Can tie together for parallel
operation and tracking. Load current needs to be present
during track down.
FB (E7): The Negative Input of the Error Amplifier. Internally,
this pin is connected to VOUT with a 10k precision resistor.
Different output voltages can be programmed with an additional resistor between FB and GND pins. In PolyPhase®
operation, tie FB pins together for parallel operation. See
Applications Information for details.
ITH (F6): Current Control Threshold and Error Amplifier
Compensation Point. The current comparator threshold
increases with this control voltage. Tie together in parallel
operation.
ITHM (F5): Negative Input to the Internal ITH Differential
Amplifier. Tie this pin to SGND for single phase operation.
For PolyPhase operation, tie the master’s ITHM to SGND
while connecting all of the ITHM pins together.
PolyPhase is a registered trademark of Linear Technology Corporation.
4608f
7
LTM4608
PIN FUNCTIONS
SW (C3-C5): Switching Node of the Circuit is Used for
Testing Purposes. This can be connected to copper on
the board for improved thermal performance.
PGOOD (C7): Output Voltage Power Good Indicator.
Open-drain logic output that is pulled to ground when the
output voltage is not within ±10% of the regulation point.
Disabled during margining.
CLKOUT (F2): Output Clock Signal for PolyPhase Operation. The phase of CLKOUT is determined by the state of
the PHMODE pin.
RUN (F1): Run Control Pin. A voltage above 1.5V will turn
on the module.
TOP VIEW
A
B
GND
C
D
VIN
E
F
G
CNTRL GND
1
2
SW
3
4
5
6
CNTRL
7
8
9
10
11
GND
VOUT
LGA PACKAGE
68-PIN (15mm × 9mm × 2.8mm)
4608f
8
LTM4608
SIMPLIFIED BLOCK DIAGRAM
SVIN
VIN
INTERNAL
FILTER
TRACK
10μF
10μF
VIN
2.375 TO 5.5V
+
10μF
CIN
MGN
BSEL
SW
M1
PGOOD
MODE
L
POWER
CONTROL
RUN
VOUT
1.5V
8A
VOUT
CLKIN
CLKOUT
M2
22pF
22μF
COUT
PHMODE
GND
ITH
10k
INTERNAL
COMP
PLLLPF
FB
RFB
6.65k
INTERNAL
FILTER
ITHM
SGND
4608 BD
Figure 1. Simplified LTM4608 Block Diagram
Table 1. Decoupling Requirements. TA = 25°C, Block Diagram Configuration.
SYMBOL
PARAMETER
CONDITIONS
CIN
External Input Capacitor Requirement
(VIN = 2.375V to 5.5V, VOUT = 1.5V)
IOUT = 8A
COUT
External Output Capacitor Requirement
(VIN = 2.375V to 5.5V, VOUT = 1.5V)
IOUT = 8A
MIN
TYP
10
MAX
UNITS
μF
100
μF
OPERATION
The LTM4608 is a standalone nonisolated switch mode
DC/DC power supply. It can deliver up to 8A of DC output
current with few external input and output capacitors.
This module provides precisely regulated output voltage
programmable via one external resistor from 0.6V DC to
5.0V DC over a 2.375V to 5.5V input voltage. The typical
application schematic is shown in Figure 18.
The LTM4608 has an integrated constant frequency current
mode regulator and built-in power MOSFET devices with
fast switching speed. The typical switching frequency is
1.5MHz. For switching noise sensitive applications, it can
be externally synchronized from 0.75MHz to 2.25MHz.
Even spread spectrum switching can be implemented in
the design to reduce noise.
With current mode control and internal feedback loop
compensation, the LTM4608 module has sufficient stability margins and good transient performance with a wide
range of output capacitors, even with all ceramic output
capacitors.
4608f
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LTM4608
OPERATION
Current mode control provides cycle-by-cycle fast current
limit and thermal shutdown in an overcurrent condition.
Internal overvoltage and undervoltage comparators pull the
open-drain PGOOD output low if the output feedback voltage exits a ±10% window around the regulation point.
Pulling the RUN pin below 1.3V forces the controller into
its shutdown state, by turning off both M1 and M2 at low
load current. The TRACK pin is used for programming the
output voltage ramp and voltage tracking during start-up.
See Applications Information.
The LTM4608 is internally compensated to be stable over
all operating conditions. Table 3 provides a guideline for
input and output capacitances for several operating conditions. The Linear Technology μModule Power Design
Tool is provided for transient and stability analysis. The
FB pin is used to program the output voltage with a single
external resistor to ground.
Multiphase operation can be easily employed with the
synchronization and phase mode controls. Up to 12 phases
can be cascaded to run simultaneously with respect to each
other by programming the PHMODE pin to different levels.
The LTM4608 has clock in and clock out for poly phasing
multiple devices or frequency synchronization.
High efficiency at light loads can be accomplished with
selectable Burst Mode operation using the MODE pin. These
light load features will accommodate battery operation.
Efficiency graphs are provided for light load operation in
the Typial Performance Characteristics.
Output voltage margining is supported, and can be programed from ±5% to ±15% using the MGN and BSEL pins.
The PGOOD pin is disabled during margining
APPLICATIONS INFORMATION
The typical LTM4608 application circuit is shown in
Figure 18. External component selection is primarily
determined by the maximum load current and output
voltage. Refer to Table 3 for specific external capacitor
requirements for a particular application.
VIN to VOUT Step-Down Ratios
There are restrictions in the maximum VIN to VOUT stepdown ratio that can be achieved for a given input voltage.
The LTM4608 is 100% duty cycle, but the VIN to VOUT
minimum drop out is still shown as a function of its load
current. For 5V input, all outputs can deliver 8A. For 3.3V
input, all outputs can deliver 8A, except 2.5V which is
limited to 6A.
Output Voltage Programming
The PWM controller has an internal 0.596V reference
voltage. As shown in the Block Diagram, a 10kΩ/0.5%
internal feedback resistor connects VOUT and FB pins
together. The output voltage will default to 0.596V with
no feedback resistor. Adding a resistor RFB from FB pin
to GND programs the output voltage:
VOUT = 0.596 V •
10k + RFB
RFB
Table 2. RFB Resistor vs Output Voltage
VOUT
0.596V
1.2V
1.5V
1.8V
2.5V
3.3V
RFB
Open
10k
6.65k
4.87k
3.09k
2.21k
Input Capacitors
The LTM4608 module should be connected to a low AC
impedance DC source. Three 10μF ceramic capacitors
are included inside the module. Additional input capacitors are only needed if a large load step is required up to
the 4A level. A 47μF to 100μF surface mount aluminum
electrolytic bulk capacitor can be used for more input bulk
capacitance. This bulk input capacitor is only needed if
the input source impedance is compromised by long inductive leads, traces or not enough source capacitance.
If low impedance power planes are used, then this 47μF
capacitor is not needed.
For a buck converter, the switching duty-cycle can be
estimated as:
4608f
10
LTM4608
APPLICATIONS INFORMATION
D=
Burst Mode Operation
VOUT
VIN
Without considering the inductor current ripple, the RMS
current of the input capacitor can be estimated as:
ICIN(RMS) =
IOUT(MAX)
η%
• D • (1– D)
In the above equation, η% is the estimated efficiency of
the power module. The bulk capacitor can be a switcherrated electrolytic aluminum capacitor, polymer capacitor
for bulk input capacitance due to high inductance traces
or leads. If a low inductance plane is used to power the
device, then only one 10μF ceramic is required. The three
internal 10μF ceramics are typically rated for 2A of RMS
ripple current, so the ripple current at the worse case for
8A maximum current is 4A or less.
Output Capacitors
The LTM4608 is designed for low output voltage ripple
noise. The bulk output capacitors defined as COUT are
chosen with low enough effective series resistance (ESR)
to meet the output voltage ripple and transient requirements. COUT can be a low ESR tantalum capacitor, a low
ESR polymer capacitor or ceramic capacitor. The typical
output capacitance range is from 47μF to 220μF. Additional
output filtering may be required by the system designer,
if further reduction of output ripple or dynamic transient
spikes is required. Table 3 shows a matrix of different output
voltages and output capacitors to minimize the voltage
droop and overshoot during a 3A/μs transient. The table
optimizes total equivalent ESR and total bulk capacitance
to optimize the transient performance. Stability criteria are
considered in the Table 3 matrix, and the Linear Technology
μModule Power Design Tool will be provided for stability
analysis. Multiphase operation will reduce effective output
ripple as a function of the number of phases. Application
Note 77 discusses this noise reduction versus output
ripple current cancellation, but the output capacitance
will be more a function of stability and transient response.
The Linear Technology μModule Power Design Tool will
calculate the output ripple reduction as the number phases
implemented increases by N times.
The LTM4608 is capable of Burst Mode operation in which
the power MOSFETs operate intermittently based on load
demand, thus saving quiescent current. For applications
where maximizing the efficiency at very light loads is a
high priority, Burst Mode operation should be applied. To
enable Burst Mode operation, simply tie the MODE pin to
VIN. During this operation, the peak current of the inductor
is set to approximately 20% of the maximum peak current
value in normal operation even though the voltage at the
ITH pin indicates a lower value. The voltage at the ITH pin
drops when the inductor’s average current is greater than
the load requirement. As the ITH voltage drops below 0.2V,
the BURST comparator trips, causing the internal sleep
line to go high and turn off both power MOSFETs.
In sleep mode, the internal circuitry is partially turned off, reducing the quiescent current to about 450μA. The load current is now being supplied from the output capacitor. When
the output voltage drops, causing ITH to rise above 0.25V,
the internal sleep line goes low, and the LTM4608 resumes
normal operation. The next oscillator cycle will turn on the
top power MOSFET and the switching cycle repeats.
Pulse-Skipping Mode Operation
In applications where low output ripple and high efficiency
at intermediate currents are desired, pulse-skipping mode
should be used. Pulse-skipping operation allows the
LTM4608 to skip cycles at low output loads, thus increasing
efficiency by reducing switching loss. Floating the MODE
pin or tying it to VIN/2 enables pulse-skipping operation.
This allows discontinuous conduction mode (DCM) operation down to near the limit defined by the chip’s minimum
on-time (about 100ns). Below this output current level,
the converter will begin to skip cycles in order to maintain output regulation. Increasing the output load current
slightly, above the minimum required for discontinuous
conduction mode, allows constant frequency PWM.
Forced Continuous Operation
In applications where fixed frequency operation is more
critical than low current efficiency, and where the lowest
output ripple is desired, forced continuous operation should
be used. Forced continuous operation can be enabled by
4608f
11
LTM4608
APPLICATIONS INFORMATION
Table 3. Output Voltage Response Versus Component Matrix (Refer to Figure 18) 0A to 3A Load Step
TYPICAL MEASURED VALUES
VALUE
COUT1 VENDORS
TDK
22μF, 6.3V
Murata
22μF
TDK
100μF, 6.3V
Murata
100μF, 6.3V
VOUT
(V)
1.0
1.0
1.0
1.0
1.0
1.0
1.2
1.2
1.2
1.2
1.2
1.2
1.5
1.5
1.5
1.5
1.5
1.5
1.8
1.8
CIN
(CERAMIC)
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
10μF
CIN
(BULK)*
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
PART NUMBER
C3216X7S0J226M
GRM31CR61C226KE15L
C4532X5R0J107MZ
GRM32ER60J107M
COUT1
(CERAMIC)
100μF × 2
22μF × 1
100μF × 2
22μF × 1
100μF × 2
22μF × 1
100μF × 2
22μF × 1
100μF × 2
22μF × 1
100μF × 2
22μF × 1
100μF × 2
22μF × 1
100μF × 2
22μF × 1
100μF × 2
22μF × 1
100μF × 1
22μF × 1
COUT2
(BULK)
COUT2 VENDORS
Sanyo POSCAP
CIN (BULK) VENDORS
Sanyo
VALUE
150μF, 10V
VALUE
100μF, 10V
PART NUMBER
10TPD150M
PART NUMBER
10CE100FH
ITH
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
C1
68pF
None
68pF
None
68pF
None
100pF
None
100pF
None
100pF
47pF
100pF
None
100pF
None
100pF
None
47pF
None
C3
None
100pF
None
100pF
None
100pF
None
100pF
None
100pF
None
None
None
47pF
None
47pF
None
None
None
47pF
VIN
(V)
5
5
3.3
3.3
2.5
2.5
5
5
3.3
3.3
2.5
2.5
5
5
3.3
3.3
2.5
2.5
5
5
DROOP
(mV)
13
17
13
17
13
17
16
20
16
20
16
16
18
20
16
20
18
20
22
21
PEAK-TO- PEAK
DEVIATION (mV)
26
34
26
34
26
34
32
41
32
41
32
32
36
41
32
41
36
41
42
42
RECOVERY
TIME (μs)
7
8
7
10
7
8
8
10
8
10
10
8
8
12
10
12
10
12
8
12
LOAD STEP
(A/μs)
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
RFB
(kΩ)
14.7
14.7
14.7
14.7
14.7
14.7
10
10
10
10
10
10
6.65
6.65
6.65
6.65
6.65
6.65
4.87
4.87
1.8
10μF
100μF
100μF × 2
None
1.8
10μF
100μF
22μF × 1
150μF × 2
None
1.8
10μF
100μF
100μF × 2
None
1.8
10μF
100μF
22μF × 1
150μF × 2
None
2.5
10μF
100μF
100μF × 1
None
2.5
10μF
100μF
22μF × 1
150μF × 1
None
2.5
10μF
100μF
100μF × 1
None
2.5
10μF
100μF
22μF × 1
150μF × 1
None
3.3
10μF
100μF
100μF × 1
100pF
3.3
10μF
100μF
22μF × 1
150μF × 1
None
*Bulk capacitance is optional if VIN has very low input impedance.
120pF
None
120pF
None
100pF
22pF
100pF
22pF
22pF
None
None
47pF
None
None
None
None
None
None
None
None
3.3
3.3
2.5
2.5
5
5
3.3
3.3
5
5
21
21
22
21
28
33
30
21
38
39
43
41
44
42
42
60
60
41
74
75
12
12
12
14
10
10
10
10
10
12
3
3
3
3
3
3
3
3
3
3
4.87
4.87
4.87
4.87
3.09
3.09
3.09
3.09
3.09
3.09
150μF × 2
150μF × 2
150μF × 2
150μF × 2
150μF × 2
150μF × 2
150μF × 2
150μF × 2
150μF × 2
150μF × 2
tying the MODE pin to GND. In this mode, inductor current is allowed to reverse during low output loads, the ITH
voltage is in control of the current comparator threshold
throughout, and the top MOSFET always turns on with each
oscillator pulse. During start-up, forced continuous mode is
disabled and inductor current is prevented from reversing
until the LTM4608’s output voltage is in regulation.
Multiphase Operation
For output loads that demand more than 8A of current,
multiple LTM4608s can be cascaded to run out of phase
to provide more output current without increasing input
and output voltage ripples. The CLKIN pin allows the
LTC4608 to synchronize to an external clock (between
0.75MHz and 2.25MHz) and the internal phase locked
4608f
12
LTM4608
APPLICATIONS INFORMATION
loop allows the LTM4608 to lock onto CLKIN’s phase as
well. The CLKOUT signal can be connected to the CLKIN
pin of the following LTM4608 stage to line up both the
frequency and the phase of the entire system. Tying the
PHMODE pin to SVIN, SGND or SVIN/2 (floating) generates
a phase difference (between CLKIN and CLKOUT) of 180°,
120° or 90° respectively, which corresponds to a 2-phase,
3-phase or 4-phase operation. A total of 12 phases can
be cascaded to run simultaneously with respect to each
other by programming the PHMODE pin of each LTM4608
to different levels. For a 6-phase example in Figure 2, the
2nd stage that is 120° out of phase from the 1st stage
can generate a 240° (PHMODE = 0) CLKOUT signal for
the 3rd stage, which then can generate a CLKOUT signal
that’s 420°, or 60° (PHMODE = SVIN) for the 4th stage.
With the 60° CLKIN input, the next two stages can shift
120° (PHMODE = 0) for each to generate a 300° signal for
the 6th stage. Finally, the signal with a 60° phase shift on
0
120
CLKIN CLKOUT
+120
PHMODE
PHASE 1
A multiphase power supply significantly reduces the
amount of ripple current in both the input and output
capacitors. The RMS input ripple current is reduced by,
and the effective ripple frequency is multiplied by, the
number of phases used (assuming that the input voltage
is greater than the number of phases used times the output
voltage). The output ripple amplitude is also reduced by
the number of phases used.
The LTM4608 device is an inherently current mode controlled device. Parallel modules will have very good current
sharing. This will balance the thermals on the design.
Tie the ITH pins of each LTM4608 together to share the
current evenly. To reduce ground potential noise, tie the
ITHM pins of all LTM4608s together and then connect to
(420)
60
240
CLKIN CLKOUT
PHMODE
the 6th stage (PHMODE is floating) goes back to the 1st
stage. Figure 3 shows the configuration for a 12 phase
configuration
+120
SVIN
PHASE 3
CLKIN CLKOUT
+180
PHMODE
180
CLKIN CLKOUT
+120
PHMODE
PHASE 5
300
CLKIN CLKOUT
+120
PHMODE
PHMODE
PHASE 4
PHASE 2
CLKIN CLKOUT
4608 F02
PHASE 6
Figure 2. 6-Phase Operation
0
CLKIN CLKOUT
90
+90
PHMODE
CLKIN CLKOUT
180
+90
PHMODE
CLKIN CLKOUT
+90
PHMODE
CLKIN CLKOUT
PHASE 4
PHASE 7
PHASE 10
120
210
300
(420)
60
CLKIN CLKOUT
PHMODE
CLKIN CLKOUT
PHMODE
PHASE 5
PHASE 8
+90
CLKIN CLKOUT
+120
PHMODE
PHASE 1
+90
(390)
30
270
+120
PHMODE
PHASE 11
CLKIN CLKOUT
PHMODE
PHASE 3
CLKIN CLKOUT
+90
PHMODE
PHASE 2
150
+90
CLKIN CLKOUT
+90
PHMODE
PHASE 6
4608 F03
240
CLKIN CLKOUT
PHMODE
PHASE 9
330
+90
CLKIN CLKOUT
PHMODE
PHASE 12
Figure 3. 12-Phase Operation
4608f
13
LTM4608
APPLICATIONS INFORMATION
the SGND at only one point. Figure 19 shows a schematic
of the parallel design. The FB pins of the parallel module
are tied together. With parallel operation, input and output capacitors may be reduced in part according to the
operating duty cycle.
frequency of operation (fundamental) and multiples of the
operating frequency (harmonics).
Spread Spectrum Operation
To reduce this noise, the LTM4608 can run in spread
spectrum operation by tying the CLKIN pin to SVIN.
In spread spectrum operation, the LTM4608’s internal
oscillator is designed to produce a clock pulse whose
period is random on a cycle-by-cycle basis but fixed
between 70% and 130% of the nominal frequency. This
has the benefit of spreading the switching noise over a
range of frequencies, thus significantly reducing the peak
noise. Spread spectrum operation is disabled if CLKIN is
tied to ground or if it’s driven by an external frequency
synchronization signal. A capacitor value of 0.01μF must
be placed from the PLLLPF pin to ground to control the
slew rate of the spread spectrum frequency change.
Switching regulators can be particularly troublesome where
electromagnetic interference (EMI) is concerned.
Output Voltage Tracking
Switching regulators operate on a cycle-by-cycle basis to
transfer power to an output. In most cases, the frequency
of operation is fixed based on the output load. This method
of conversion creates large components of noise at the
Output voltage tracking can be programmed externally
using the TRACK pin. The output can be tracked up and
down with another regulator. The master regulator’s output
is divided down with an external resistor divider that is the
Input RMS Ripple Current Cancellation
Application Note 77 provides a detailed explanation of
multiphase operation. The input RMS ripple current cancellation mathematical derivations are presented, and a
graph is displayed representing the RMS ripple current
reduction as a function of the number of interleaved phases.
Figure 4 shows this graph.
0.60
1-PHASE
2-PHASE
3-PHASE
4-PHASE
6-PHASE
0.55
0.50
RMS INPUT RIPPLE CURRENT
DC LOAD CURRENT
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
0.1 0.15
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9
DUTY FACTOR (VO/VIN)
4608 F04
Figure 4. Normalized Input RMS Ripple Current vs Duty Factor for One to Six Modules (Phases)
4608f
14
LTM4608
APPLICATIONS INFORMATION
same as the slave regulator’s feedback divider to implement
coincident tracking. The LTM4608 uses an accurate 10k
resistor internally for the top feedback resistor. Figure 5
shows an example of coincident tracking:
The track pin of the master can be controlled by an external
ramp or by RSR and CSR in Figure 5 referenced to VIN. The
RC ramp time can be programmed using equation:
0.596V t = – ln 1–
• RSR • CSR
VIN 10k Slave = 1+
• VTRACK
R FB4
VTRACK is the track ramp applied to the slave’s track pin.
VTRACK has a control range of 0V to 0.596V, or the internal
reference voltage. When the Master’s output is divided down
with the same resistor values used to set the slave’s output,
this resistor divider is connected to the slave’s track pin.
The slave will then coincident track with the master until it
reaches its final value. The master will continue to its final
value from the slave’s regulation point. Voltage tracking is
disabled when VTRACK is more than 0.596V. RFB4 in Figure
5 will be equal to RFB2 for coincident tracking.
OUTPUT VOLTAGE (V)
MASTER OUTPUT
SLAVE OUTPUT
TIME
4608 F06
Figure 6
VIN
5V
CLKIN
VIN
VOUT
C2
100pF
SVIN
TIE TO VIN
FOR DISABLE
AND DEFAULT
100μs SOFT-START
RSR
SW
RUN
TRACK
CSR
LTM4608
RUN
FB
RFB1
2.21k
ITH
PLLLPF
ITHM
TRACK
PGOOD
MODE
BSEL
PHMODE
MGN
APPLY A CONTROL
CLKOUT GND SGND
RAMP WITH RSR AND
CSR TIED TO VIN WHERE
t = –(ln (1 – 0.596/VIN) • RSR • CSR)
OR APPLY AN EXTERNAL TRACKING RAMP
CLKIN
VIN
RFB3
10k
RFB4
6.65k
SW
VOUT
RUN
TRACK
LTM4608
RUN
C3
22pF
3.3V
C1
100μF
SVIN
MASTER
3.3V
MASTER
3.3V
100μF 7A
FB
ITHM
TRACK
PGOOD
MODE
BSEL
PHMODE
MGN
CLKOUT GND SGND
SLAVE
1.5V
C4
8A
100μF
POSCAP
RFB2
6.65k
ITH
PLLLPF
+
1.5V
4608 F05
Figure 5. Dual Outputs (3.3V and 1.5V) with Tracking
4608f
15
LTM4608
APPLICATIONS INFORMATION
Ratiometric tracking can be achieved by a few simple
calculations and the slew rate value applied to the master’s
track pin. As mentioned above, the TRACK pin has a control
range from 0V to 0.596V. The master’s TRACK pin slew
rate is directly equal to the master’s output slew rate in
Volts/Time:
MR
• 10k = RFB3
SR
where MR is the master’s output slew rate and SR is the
slave’s output slew rate in Volts/Time. When coincident
tracking is desired, then MR and SR are equal, thus RFB3
is equal the 10k. RFB4 is derived from equation:
RFB4 =
0.596 V
VFB VFB VTRACK
+
–
10k RFB2
RFB3
where VFB is the feedback voltage reference of the regulator and VTRACK is 0.596V. Since RFB3 is equal to the 10k
top feedback resistor of the slave regulator in equal slew
rate or coincident tracking, then RFB4 is equal to RFB2 with
VFB = VTRACK. Therefore RFB3 = 10k and RFB4 = 6.65k in
Figure 5.
For applications that do not require tracking or sequencing,
simply tie the TRACK pin to SVIN to let RUN control the
turn on/off. Connecting TRACK to SVIN also enables the
~100μs of internal soft-start during start-up. Load current
needs to be present during track down.
Power Good
The PGOOD pin is an open-drain pin that can be used to
monitor valid output voltage regulation. This pin monitors
a ±10% window around the regulation point. As shown
in Figure 20, the sequencing function can be realized in a
dual output application by controlling the RUN pins and the
PGOOD signals from each other. The 1.5V output begins
its soft starting after the PGOOD signal of 3.3V output
becomes high, and 3.3V output starts its shut down after
the PGOOD signal of 1.5V output becomes low. This can
be applied to systems that require voltage sequencing
between the core and sub-power supplies.
Slope Compensation
The module has already been internally compensated for
all output voltages. Table 3 is provided for most application
requirements. A spice model will be provided for other
control loop optimization. For single module operation,
connect ITHM pin to SGND. For parallel operation, tie ITHM
pins together and then connect to SGND at one point. Tie
ITH pins together to share currents evenly for all phases.
4.0
4.0
3.5
3.5
3.0
3.0
POWER LOSS (W)
POWER LOSS (W)
In ratiometric tracking, a different slew rate maybe desired
for the slave regulator. RFB3 can be solved for when SR
is slower than MR. Make sure that the slave supply slew
rate is chosen to be fast enough so that the slave output
voltage will reach it final value before the master output.
For example: MR = 3.3V/ms and SR = 1.5V/ms. Then
RFB3 = 22.1k. Solve for RFB4 to equal to 4.87k.
2.5
2.0
1.5
2.0
1.5
1.0
1.0
0.5
0
2.5
0.5
3.3VIN 1.5VOUT
3.3VIN 2.5VOUT
0
2
4
6
0
8
5VIN 1.5VOUT
5VIN 3.3VOUT
0
2
4
6
8
LOAD CURRENT (A)
LOAD CURRENT (A)
4608 F07
Figure 7. 3.3VIN, 2.5V and 1.5VOUT Power Loss
4608 F08
Figure 8. 5VIN, 3.3V and 1.5VOUT Power Loss
4608f
16
LTM4608
9
9
8
8
7
7
LOAD CURRENT (A)
LOAD CURRENT (A)
APPLICATIONS INFORMATION
6
5
4
3
6
5
4
3
2
2
400LFM
200LFM
0LFM
1
0
40
50
400LFM
200LFM
0LFM
1
0
40
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
50
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4608 F10
4608 F09
Figure 10. BGA Heat Sink with 3.3VIN to 1.5VOUT
9
9
8
8
7
7
LOAD CURRENT (A)
LOAD CURRENT (A)
Figure 9. No Heat Sink with 3.3VIN to 1.5VOUT
6
5
4
3
6
5
4
3
2
2
400LFM
200LFM
0LFM
1
0
40
50
400LFM
200LFM
0LFM
1
0
40
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
50
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4608 F12
4608 F11
Figure 12. BGA Heat Sink with 5VIN to 1.5VOUT
9
9
8
8
7
7
LOAD CURRENT (A)
LOAD CURRENT (A)
Figure 11. No Heat Sink with 5VIN to 1.5VOUT
6
5
4
3
6
5
4
3
2
2
400LFM
200LFM
0LFM
1
0
40
50
400LFM
200LFM
0LFM
1
0
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4608 F13
Figure 13. No Heat Sink with 3.3VIN to 2.5VOUT
40
50
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4608 F14
Figure 14. BGA Heat Sink with 3.3VIN to 2.5VOUT
4608f
17
LTM4608
9
9
8
8
7
7
LOAD CURRENT (A)
LOAD CURRENT (A)
APPLICATIONS INFORMATION
6
5
4
3
2
0
40
50
5
4
3
2
400LFM
200LFM
0LFM
1
6
400LFM
200LFM
0LFM
1
0
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
40
50
60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
4608 F15
4608 F16
Figure 15. No Heat Sink with 5VIN to 3.3VOUT
Figure 16. BGA Heat Sink with 5VIN to 3.3VOUT
Table 4. 1.5V Output
DERATING CURVE
VIN (V)
POWER LOSS CURVE
AIR FLOW (LFM)
HEAT SINK
θJA (°C/W)
Figures 9, 11
3.3, 5
Figures 9, 11
3.3, 5
Figures 7, 8
0
None
25
Figures 7, 8
200
None
21
Figures 9, 11
3.3, 5
Figures 7, 8
400
None
20
Figures 10, 12
3.3, 5
Figures 7, 8
0
BGA Heat Sink
23.5
Figures 10, 12
3.3, 5
Figures 7, 8
200
BGA Heat Sink
22
Figures 10, 12
3.3, 5
Figures 7, 8
400
BGA Heat Sink
22
DERATING CURVE
VIN (V)
POWER LOSS CURVE
AIR FLOW (LFM)
HEAT SINK
θJA (°C/W)
Figure 15
5
Figure 8
0
None
25
Figure 15
5
Figure 8
200
None
21
Table 5. 3.3V Output
Figure 15
5
Figure 8
400
None
20
Figure 16
5
Figure 8
0
BGA Heat Sink
23.5
Figure 16
5
Figure 8
200
BGA Heat Sink
22
Figure 16
5
Figure 8
400
BGA Heat Sink
22
4608f
18
LTM4608
APPLICATIONS INFORMATION
Output Margining
For a convenient system stress test on the LTM4608’s
output, the user can program the LTM4608’s output to
±5%, ±10% or ±15% of its normal operational voltage.
The margin pin with a voltage divider is driven with a small
three-state gate as shown in Figure 18, for the three margin
states (high, low, no margin). When the MGN pin is low, it
forces negative margining in which the output voltage is
below the regulation point. When MGN is high, the output
voltage is forced to above the regulation point. The amount
of output voltage margining is determined by the BSEL
pin. When BSEL is low, it is 5%. When BSEL is high, it is
10%. When BSEL is floating, it is 15%. When margining
is active, the internal output overvoltage and undervoltage
comparators are disabled and PGOOD remains high. Margining is disabled by tying the MGN pin to VOUT.
Thermal Considerations and Output Current Derating
The power loss curves in Figures 7 and 8 can be used
in coordination with the load current derating curves in
Figures 9 to 16 for calculating an approximate θJA for the
module with various heat sinking methods. Thermal models
are derived from several temperature measurements at
the bench, and thermal modeling analysis. Thermal Application Note 103 provides a detailed explanation of the
analysis for the thermal models and the derating curves.
Tables 4 and 5 provide a summary of the equivalent θJA
for the noted conditions. These equivalent θJA parameters
are correlated to the measured values and improve with
air flow. The junction temperature is maintained at 125°C
or below for the derating curves.
electrical and thermal performance, some layout considerations are still necessary.
• Use large PCB copper areas for high current path,
including VIN, GND and VOUT. It helps to minimize the
PCB conduction loss and thermal stress.
• Place high frequency ceramic input and output capacitors next to the VIN, GND and VOUT pins to minimize
high frequency noise.
• Place a dedicated power ground layer underneath the
unit.
• To minimize the via conduction loss and reduce module
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
• Do not put vias directly on the pads, unless they are
capped.
• Use a separated SGND ground copper area for components connected to signal pins. Connect the SGND
to GND underneath the unit.
Figure 17 gives a good example of the recommended
layout.
GND
VOUT
COUT
COUT
GND
COUT
CIN
Safety Considerations
The LTM4608 modules do not provide isolation from VIN to
VOUT. There is no internal fuse. If required, a slow blow fuse
with a rating twice the maximum input current needs to be
provided to protect each unit from catastrophic failure.
Layout Checklist/Example
The high integration of LTM4608 makes the PCB board
layout very simple and easy. However, to optimize its
VIN
CIN
GND
4608 F17
Figure 17. Recommended PCB Layout
4608f
19
LTM4608
APPLICATIONS INFORMATION
CLKIN
VIN
3V TO 5.5V
CLKIN
VIN
CIN
10μF
VOUT
C1
220pF
SVIN
SW
MODE
COUT
100μF
FB
LTM4608
RUN
PHMODE
VOUT
2.5V
8A
8A AT 5V INPUT
6A AT 3.3V INPUT
PLLLPF
ITHM
TRACK
PGOOD
MODE
BSEL
PHMODE
MGN
C3
47pF
RFB
3.09k
ITH
VIN
100k
PGOOD
BSEL
CLKOUT GND SGND
50k
VIN
(HIGH = 10%)
(FLOAT = 15%)
(LOW = 5%)
1
50k
VOUT 4 5
2
U1
U1: PERICON P1745T1G126CEX 3
OR TOSHIBA 7C75Z126AFE
OE
AIN
4608 F18
OE AIN VOUT MGN
H
H
L
H
L
X
H
L
Z
MARGIN VALUE
H + OF BSEL SELECTION
L – OF BSEL SELECTION
NO MARGIN
VIN/2
Figure 18. Typical 3V to 5.5VIN, 2.5V at 8A Design
VIN
3V TO 5.5V
CLKIN
VIN
10μF
TRACK
C4
100pF
SVIN
SW
RUN
VOUT
LTM4608
RUN
FB
3.32k
ITH
PLLLPF
ITHM
TRACK
PGOOD
MODE
BSEL
PHMODE
MGN
VOUT
CLKOUT GND SGND
C2
10μF
CLKIN
VIN
VOUT
LTM4608
RUN
C3
100μF
6.3V
X5R
C1
100μF
6.3V
X5R
SVIN
SW
100μF
6.3V
X5R
VOUT
1.5V
16A
FB
ITH
PLLLPF
ITHM
TRACK
PGOOD
MODE
BSEL
PHMODE
MGN
VOUT
CLKOUT GND SGND
4608 F19
Figure 19. Two LTM4608s in Parallel, 1.5V at 16A Design
4608f
20
LTM4608
APPLICATIONS INFORMATION
CLKIN
VIN
5V
CLKIN
VIN
VOUT
C2
100pF
SVIN
D1
MMSD4148
SW
SHDN
FB
LTM4608
RUN
C3
22pF
ITH
PLLLPF
ITHM
TRACK
PGOOD
MODE
BSEL
PHMODE
MGN
100k
VOUT2
3.3V
7A
RFB1
2.21k
SHDN
3.3V
CLKOUT GND SGND
R1
100k
100μF
6.3V
X5R
3.3V
R2
100k
1.5V
CLKIN
VIN
VOUT
SVIN
D2
MMSD4148
SW
SHDN
FB
RFB2
6.65k
ITH
LTM4608
RUN
C1
100μF
6.3V
X5R
+
ITHM
PLLLPF
C4
100μF
SANYO
POSCAP
10mΩ
VOUT1
1.5V
8A
100k
TRACK
PGOOD
MODE
BSEL
PHMODE
MGN
4608 F20
1.5V
CLKOUT GND SGND
Figure 20. Dual LTM4608 Output Sequencing Application
CLKIN
VIN
2.5V TO 5.5V
CLKIN
VIN
10μF
100pF
SVIN
SW
LTM4608
RUN
MODE
PHMODE
VOUT
FB
C1
100μF
6.3V
X5R
10k
ITH
PLLLPF
ITHM
TRACK
PGOOD
MODE
BSEL
BSEL
PHMODE
MGN
1.2V
CLKOUT GND SGND
C2
100μF
6.3V
X5R
VOUT
1.2V/8A
5A AT
2.5V INPUT
PGOOD
4608 F21
Figure 21. 2.5V to 5.5VIN, 1.2VOUT Design
4608f
21
VIN
5V
22
R5
31.6k
R4
100k
3.3V
TRACK
OR
RAMP
CONTROL
BSEL
MGN
MODE
PHMODE
MGN
PHMODE
VOUT2
VOUT1
C8
47pF
C4
22pF
R2
3.09k
C7
220pF
R10
2.21k
C2
100pF
C1
100μF
6.3V
X5R
VOUT2
2.5V
8A
VOUT1
3.3V
100μF 7A
6.3V
X5R
R7
6.86k
R6
100k
3.3V
R9
49.9k
R8
100k
3.3V
MGN
PHMODE
CLKIN
ITHM
ITH
FB
VOUT
CLKOUT GND SGND
MGN
BSEL
PGOOD
LTM4608
PHMODE
MODE
TRACK
PLLLPF
RUN
SW
SVIN
VIN
CLKOUT GND SGND
BSEL
MODE
ITHM
PGOOD
ITH
FB
VOUT
TRACK
LTM4608
CLKIN
PLLLPF
RUN
SW
SVIN
VIN
Figure 22. 4-Phase, Four Outputs (3.3V, 2.5V, 1.8V and 1.5V) with Tracking
CLKOUT GND SGND
BSEL
MODE
PGOOD
TRACK
ITH
FB
VOUT
ITHM
LTM4608
CLKIN
PLLLPF
RUN
SW
SVIN
VIN
CLKOUT GND SGND
ITHM
PGOOD
ITH
FB
VOUT
TRACK
LTM4608
CLKIN
PLLLPF
RUN
SW
SVIN
VIN
CLKIN
4608 F22
VOUT4
R8
6.65k
VOUT3
R1
4.87k
C8
100pF
C5
100μF
6.3V
X5R
+
C3
100μF
6.3V
X5R
C9
100μF
6.3V
SANYO
POSCAP
10mΩ
VOUT4
1.5V
8A
VOUT3
1.8V
8A
LTM4608
APPLICATIONS INFORMATION
4608f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
3.810
2.540
1.270
0.381
0.000
0.381
1.270
2.540
SUGGESTED PCB LAYOUT
TOP VIEW
1.270
PACKAGE TOP VIEW
0.381
0.000
0.381
5.080
X
9.00
BSC
Y
aaa Z
2.400 – 2.600
DETAIL A
MOLD
CAP
Z
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR A
MARKED FEATURE
4
SYMBOL TOLERANCE
0.15
aaa
0.10
bbb
6. THE TOTAL NUMBER OF PADS: 68
5. PRIMARY DATUM -Z- IS SEATING PLANE
LAND DESIGNATION PER JESD MO-222
3
2. ALL DIMENSIONS ARE IN MILLIMETERS
TRAY PIN 1
BEVEL
COMPONENT
PIN “A1”
3
PADS
SEE NOTES
1.27
BSC
0.737 – 0.787
7.620
BSC
0.290 – 0.350
SUBSTRATE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
DETAIL A
PACKAGE SIDE VIEW
2.69 – 2.95
(Reference LTC DWG # 05-08-1808 Rev A)
bbb Z
aaa Z
3.810
4
1.270
PAD “A1”
CORNER
6.350
15.00
BSC
6.350
5.080
3.810
2.540
2.540
3.810
LGA Package
68-Lead (15mm × 9mm × 2.82mm)
11
10
8
7
6
5
PACKAGE BOTTOM VIEW
4
3
LGA 68 0607 REV A
PACKAGE IN TRAY LOADING ORIENTATION
LTMXXXXXX
μModule
9
12.70
BSC
0.737 – 0.787
2
1
PAD 1
A
B
C
D
E
F
G
LTM4608
PACKAGE DESCRIPTION
4608f
23
LTM4608
PACKAGE DESCRIPTION
Pin Assignment Table
(Arranged by Pin Number)
PIN NAME
PIN NAME
PIN NAME
C1
VIN
PIN NAME
A1
GND
B1
GND
A2
GND
B2
–
C2
–
A3
GND
B3
CLKIN
C3
SW
A4
GND
B4
PHMODE C4
SW
D4
D1
PIN NAME
PIN NAME
PIN NAME
VIN
E1
SGND
F1
RUN
G1
GND
D2
–
E2
–
F2
CLKOUT G2
GND
D3
VIN
E3
PLLLPF
F3
GND
G3
GND
VIN
E4
–
F4
SVIN
G4
GND
A5
GND
B5
MODE
C5
SW
D5
VIN
E5
TRACK
F5
ITHM
G5
GND
A6
GND
B6
–
C6
–
D6
–
E6
–
F6
ITH
G6
GND
A7
GND
B7
BSEL
C7
PGOOD
D7
VIN
E7
FB
F7
GND
G7
GND
A8
GND
B8
MGN
C8
VIN
D8
VIN
E8
VIN
F8
GND
G8
GND
A9
GND
B9
GND
C9
VIN
D9
VIN
E9
VOUT
F9
VOUT
G9
VOUT
A10 GND
B10 GND
C10 VOUT
D10 VOUT
E10 VOUT
F10 VOUT
G10 VOUT
A11 GND
B11 GND
C11 VOUT
D11 VOUT
E11 VOUT
F11 VOUT
G11 VOUT
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PART NUMBER
DESCRIPTION
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Margining and Remote Sensing
Synchronizable, PolyPhase Operation, LTM4601-1/LTM4601A-1 Version has no
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Pin Compatible with the LTM4600, LGA Package
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6A DC/DC μModule with PLL and Outpupt Tracking/ Synchronizable, PolyPhase Operation, LTM4603-1 Version have no Remote
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4608f
24 Linear Technology Corporation
LT 0907 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2007
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