Ordering number : ENA1919 Monolithic Linear IC LV0223CV For Optical Pickups Front Monitor OE-IC Overview The LV0223CV is a front monitor optoelectronic IC for optical pickups that has a built-in photo diode compatible with three waveforms. LV0223CV is small size and type CSP packages. Functions • PIN photodiode compatible with three wavelengths incorporated. • Gain adjustment (-6dB to +6dB in 256 steps) through serial communication. • Amplifier to amplify differential output. Specifications Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Maximum supply voltage VCC 6 Allowable power dissipation Pd Operating temperature Topr -20 to +75 ˚C Storage temperature Tstg -40 to +100 ˚C Glass epoxy both-side substrate 55mm × 45mm × 1.6mm 143 V mW Copper foil area (head: about 90% Tail: about 90%), Ta=75˚C Recommended Operating Conditions at Ta = 25°C Parameter Symbol Ratings Conditions min typ Unit max Operating supply voltage VCC 4.5 5 5.5 V Output load capacitance CO 12 20 33 pF Output load resistance ZO 3 kΩ Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 20911 SY 20110127-S00004 No.A1919-1/8 LV0223CV Electrical Characteristics at Ta = 25°C, VCC = 5V, RL=6kΩ, CL=20pF Parameter Symbol Ratings Conditions min Current dissipation ICC Sleep current Islp 13.3 typ Unit max 17 22.1 mA 0.6 mA Output voltage when shielded VC At shielding Output offset voltage Vofs At shielding, voltage between VOP-VON Temperature dependence of offset voltage *1 Vofs Ta=-10 to +75˚C -60 0 60 Optical output voltage *1 VLC Low Gain, λ=780nm, G=0dB 0.21 0.262 0.31 mV/μW Voltage between VOP-VON VLD Low Gain, λ=650nm, G=0dB 0.22 0.275 0.33 mV/μW VLB Low Gain, λ=405nm, G=0dB 0.14 0.172 0.21 mV/μW VM1C Middle1 Gain, λ=780nm, G=0dB 0.66 0.83 0.99 mV/μW VM1D Middle1 Gain, λ=650nm, G=0dB 0.70 0.87 1.05 mV/μW VM1B Middle1 Gain, λ=405nm, G=0dB 0.43 0.54 0.65 mV/μW VM2C Middle2 Gain, λ=780nm, G=0dB 1.97 2.46 2.95 mV/μW VM2D Middle2 Gain, λ=650nm, G=0dB 2.07 2.58 3.10 mV/μW VM2B Middle2 Gain, λ=405nm, G=0dB 1.29 1.62 1.94 mV/μW VH1C High1 Gain, λ=780nm, G=0dB 3.35 4.19 5.02 mV/μW VH1D High1 Gain, λ=650nm, G=0dB 3.52 4.40 5.28 mV/μW VH1B High1 Gain, λ=405nm, G=0dB 2.20 2.75 3.30 mV/μW VH2C High2 Gain, λ=780nm, G=0dB 5.72 7.15 8.58 mV/μW VH2D High2 Gain, λ=650nm, G=0dB 6.02 7.52 9.02 mV/μW VH2B High2 Gain, λ=405nm, G=0dB 3.76 4.70 5.64 mV/μW 6.5 Light output voltage adjustment range *1 G G=0dB reference, absolute value of adjustment width D range *1 VoD Voltage between VOP-VON Frequency characteristics *1, *2 FcC -3dB(1MHz reference), λ=780nm 1.85 2.0 2.15 -30 0 30 V mV μV/˚C 5.5 6.0 1700 2200 mV dB 60 80 MHz 60 85 MHz 60 80 MHz 60 85 MHz 60 80 MHz Light input = 40μW(DC) + 20μW(AC) FcD1 -3dB(1MHz reference), λ=650nm Light input = 40μW(DC) + 20μW(AC) Low/Middle1/2 Gain FcD2 -3dB(1MHz reference), λ=650nm Light input = 40μW(DC) + 20μW(AC) High1/2 Gain FcB1 -3dB(1MHz reference), λ=405nm Light input = 40μW(DC) + 20μW(AC) Low/Middle1/2 Gain FcB2 -3dB(1MHz reference), λ=405nm Light input = 40μW(DC) + 20μW(AC) High1/2 Gain Settling time *1 Tset Response time *1 Tr, Tf Vo=0.9Vp-p, output level 10 to 90% 10 15 ns 4 10 ns 15 % fc=10MHz, duty=50% Overshoot *1 Ovst Vo=0.9Vp-p, G=0dB Undershoot *1 Unst Vo=0.9Vp-p, G=0dB Linearity *1 Lin At output voltage 0.5V and 1.0V 15 % -1 0 1 % (Between VOP-VON) Light-output voltage temperature dependence TC λ=780nm, 25˚C reference 7 10 13 % Voltage between VOP-VON *1, *3 TD λ=650nm, 25˚C reference -1 2 5 % TB λ=405nm, 25˚C reference -1 2 5 % Item with *1 mark indicate the design reference value. Item with *2 mark indicate the frequency characteristics when VOP and VON are applied individually. The frequency characteristics are for the output voltage adjustment range is -6 to +6dB Item with *3 mark indicates the temperature dependence for the case of High2 / High1 / Middle2 / Middle1 / Low gain and for the case when the temperature is 25 to 75˚C for the output voltage adjustment range of -6 to +6dB [Expression of output voltage] VN = (sensitivity / 2 ) × 5400 / (5400-16 × GCAstep ) × light intensity (μW) No.A1919-2/8 LV0223CV Package Dimensions unit : mm (typ) 3407 TOP VIEW SIDE VIEW 1.45 BOTTOM VIEW 0.5 3 2 1 1 0.5 2 1.45 3 0.2 B C C B A 0.67 MAX A 0.08 (0.52) SIDE VIEW SANYO : ODCSP8(1.45X1.45) Pin Assignment TOP VIEW 3 SEN 2 SCLK 1 SDIO GND Pin No. Pin name 1A SDIO Serial communication Data pin Positive side output pin VCC SSEL Function 1B VOP 1C VON Negative side output pin 2A SCLK Serial communication Clock pin 2C SSEL Register selection pin SSEL = Low : Address 00 to 0Fh used VOP VON SSEL = High : Address 10 to 1Fh used SSEL = Open : Address 70 to 7Fh used A B C 3A SEN Serial communication Enable pin 3B GND GND pin 3C VCC Power supply voltage pin PD assignment 0.725mm 1.45mm 1.45mm Center of PD 0.725mm *PD size for reference to be used for design No.A1919-3/8 LV0223CV Block diagram and Test circuit diagram VCC SEN SCLK SDIO SSEL Control Serial High2 Vref High1 VCC Bias Regulator Middle2 Middle1 Low Vo+ 20pF + + Vref Vo20pF GND Vref Resister table Enable selection of the register group from the SSEL pin. SSEL = Low Address 7 Name Default Value 00h 6 5 4 3 2 GAIN SEL 1 POWER IV GAIN SEL 00 00 00 1 11: Power on *4 00/01: BD *4 00/01/10: Sleep 0 IV GAIN2 0 10: DVD 11: CD Name Default BD GAIN 01h 1 1 1 1 Value Name Default 1 1 1 1 1 1 1 1 1 1 0 DVD GAIN 02h 1 1 1 1 Value 1 00000000 to 11111111 Name Default 1 00000000 to 11111111 CD GAIN 03h 1 1 1 1 Value 1 00000000 to 11111111 Name 0Eh TEST1 (*1) Name 0Fh TEST2 (*1) SSEL = High Address 7 Name Default Value 10h 6 5 4 3 2 POWER IV GAIN SEL GAIN SEL 00 00 00 1 11: Power on *4 00/01: BD *4 00/01/10: Sleep IV GAIN2 0 10: DVD 11: CD Name Default BD GAIN 11h 1 1 1 Value 1 Name Default 1 1 1 1 1 1 1 1 1 DVD GAIN 12h 1 1 1 Value 1 1 00000000 to 11111111 Name Default 1 00000000 to 11111111 CD GAIN 13h Value 1 1 1 1 1 00000000 to 11111111 Name 1Eh TEST1 (*1) Name 1Fh TEST2 (*1) Continued on next page. No.A1919-4/8 LV0223CV Continued from preceding page. SSEL = Open Address 7 Name 6 70h 4 3 2 GAIN SEL 1 IV GAIN SEL 00 00 00 1 11: Power on *4 00/01: BD *4 Default Value 5 POWER 00/01/10: Sleep 0 IV GAIN2 0 10: DVD 11: CD Name Default BD GAIN 71h 1 1 1 Value 1 Name Default 1 1 1 1 1 1 1 1 1 DVD GAIN 72h 1 1 1 Value 1 1 00000000 to 11111111 Name Default 1 00000000 to 11111111 CD GAIN 73h 1 1 1 Value 1 1 00000000 to 11111111 Name 7Eh TEST1 (*1) Name 7Fh TEST2 (*1) *1 TEST1 and TEST2 are either the time when power is applied or “00000000” is set. Do not attempt to change “00000000” during operation. “00000000” is returned when reading is made. *2 No problem in terms of operation occurs even when writing is made to the address 04h to 0Dh and 14h to 1Dh and 74h to 7Dh. “00000000” is returned when this address is read. *3 When I performed address reading except the register group set by an SSEL terminal, I keep Hi-Z without paying a value. *4 Please set the gain setting of the I/V amplifier referring to the table below. I/V amplifier gain setting table 00h/10h/70h Name Default High2 High1 IV GAIN Middle2 Middle1 Low 5 4 IV GAIN1 SET 00 00/01 10/11 00/01 10 11 1 IV GAIN2 1 1 1 0 0 0 No.A1919-5/8 LV0223CV Serial protocol WRITE timing chart (HOST) SEN 1 2 4 3 5 6 7 8 9 10 11 12 13 14 15 16 D6 D5 D4 D3 D2 D1 D0 15 16 (HOST) SCLK MSB A7 (HOST) SDIO A6 A4 A5 A3 A2 LSB MSB A0 D7 A1 LSB Address Mode Data (Output Data from Host) READ timing chart (HOST) SEN 1 2 4 3 5 6 7 8 9 10 11 13 12 14 (HOST) SCLK LSB MSB A7 (HOST) SDIO A6 A4 A5 A3 A2 A1 Address Mode A0 LSB MSB SDIO D7 D6 D5 D4 D3 D2 D1 D0 Data (Output Data from Host) SDIO pin load / CL=20pF (The table below shows the design reference value.) Parameter Symbol Min. Typ. Max. Unit SCL clock frequency Write fSCL 0 10 MHz SCL clock frequency Read fSCL tDSU 0 4 MHz 50 SDIO data setup time SDIO data hold time ns tDHO tDDLY 50 1.6 SEN “L” period tENH tENL 200 ns SCL rise time after SEN rise tSTA 60 ns SEN fall time after final SCL rise tSTO 100 Serial input “H” voltage VIH VIL 2.4 VOH VOL 2.5 0 SDIO output delay SEN “H” period Serial input “L” voltage SDIO output “H” voltage SDIO output “L” voltage WRITE ns 10 80 ns μs ns 3.7 V 0.6 V 2.9 3.3 V 0.3 0.8 V tENH tENL (HOST) SEN tSTA tSTO (HOST) SCLK (HOST) SDIO tDSU tDHO READ (HOST) SEN (HOST) SCLK (HOST) SDIO tDDLY SDIO No.A1919-6/8 LV0223CV Pin SDIO Type Input Equivalent circuit diagram 3V 3V Output VOP Output VON SCLK Input SEN SSEL 3V Input No.A1919-7/8 LV0223CV SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of February, 2011. Specifications and information herein are subject to change without notice. PS No.A1919-8/8