TI LV244AT Octal buffer/driver with 3-state output Datasheet

SN74LV244AT
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES572C – JUNE 2004 – REVISED AUGUST 2005
FEATURES
•
•
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
1
20
2
19
18
3
4
5
17
6
7
15
8
9
13
12
10
11
16
14
VCC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
VCC
RGY PACKAGE
(TOP VIEW)
DB, DGV, DW, NS, OR PW PACKAGE
(TOP VIEW)
1
20
19 2OE
18 1Y1
17 2A4
2
3
4
6
16 1Y2
15 2A3
7
8
14 1Y3
13 2A2
9
12 1Y4
5
10
11
2A1
•
•
1OE
•
Inputs Are TTL-Voltage Compatible
4.5-V to 5.5-V VCC Operation
Typical tpd = 5.4 ns at 5 V
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 5 V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
>2.3 V at VCC = 5 V, TA = 25°C
Supports Mixed-Mode Voltage Operation on
All Ports
GND
•
•
•
•
DESCRIPTION/ORDERING INFORMATION
This octal buffer/driver is designed specifically to improve both the performance and density of 3-state
memory-address drivers, clock drivers, and bus-oriented receivers and transmitters.
The SN74LV244AT is organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When
OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
ORDERING INFORMATION
PACKAGE (1)
TA
QFN – RGY
Tube of 25
SN74LV244ATDW
Reel of 2000
SN74LV244ATDWR
SOP – NS
Reel of 2000
SN74LV244ATNSR
74LV244AT
SSOP – DB
Reel of 2000
SN74LV244ATDBR
LV244AT
Tube of 70
SN74LV244ATPW
Reel of 2000
SN74LV244ATPWR
Reel of 250
SN74LV244ATPWT
Reel of 2000
SN74LV244ATDGVR
TSSOP – PW
TVSOP – DGV
(1)
TOP-SIDE MARKING
SN74LV244ATRGYR
SOIC – DW
–40°C to 85°C
ORDERABLE PART NUMBER
Reel of 1000
VV244
LV244AT
LV244AT
LV244AT
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2005, Texas Instruments Incorporated
SN74LV244AT
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES572C – JUNE 2004 – REVISED AUGUST 2005
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
To ensure the high-impedance state during power up or power down, OE shall be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
FUNCTION TABLE
(EACH 4-BIT BUFFER/DRIVER)
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
LOGIC DIAGRAM (POSITIVE LOGIC)
1OE
1A1
1A2
1A3
1A4
2
1
2OE
2
18
4
16
6
14
8
12
1Y1
2A1
1Y2
2A2
1Y3
2A3
1Y4
2A4
19
11
9
13
7
15
5
17
3
2Y1
2Y2
2Y3
2Y4
SN74LV244AT
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES572C – JUNE 2004 – REVISED AUGUST 2005
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VCC
Supply voltage range
–0.5
7
V
VI
Input voltage range (2)
–0.5
7
V
–0.5
7
V
–0.5
VCC + 0.5
state (2)
UNIT
VO
Voltage range applied to any output in the high-impedance or power-off
VO
Output voltage range applied in the high or low state (2) (3)
IIK
Input clamp current
VI < 0
–20
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
VO = 0 to VCC
±35
mA
±70
mA
Continuous current through VCC or GND
DB
θJA
Package thermal impedance
package (4)
70
DGV package (4)
92
DW package (4)
58
NS package (4)
60
PW package (4)
83
RGY package (5)
Tstg
(1)
(2)
(3)
(4)
(5)
Storage temperature range
V
°C/W
37
–65
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
This value is limited to 5.5 V maximum.
The package thermal impedance is calculated in accordance with JESD 51-7
The package thermal impedance is calculated in accordance with JESD 51-5.
Recommended Operating Conditions (1)
VCC
Supply voltage
VIH
High-level input voltage
VCC = 4.5 V to 5.5 V
VIL
Low-level input voltage
VCC = 4.5 V to 5.5 V
VI
Input voltage
MIN
MAX
4.5
5.5
2
UNIT
V
V
0.8
V
0
5.5
V
High or low state
0
VCC
3-state
0
5.5
VO
Output voltage
IOH
High-level output current
VCC = 4.5 V to 5.5 V
–16
IOL
Low-level output current
VCC = 4.5 V to 5.5 V
16
mA
∆t/∆v
Input transition rise or fall rate
VCC = 4.5 V to 5.5 V
20
ns/V
TA
Operating free-air temperature
85
°C
(1)
–40
V
mA
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
SN74LV244AT
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES572C – JUNE 2004 – REVISED AUGUST 2005
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VOH
VOL
TA = –40°C
to 85°C
TA = 25°C
VCC
MIN
TYP
4.5
IOH = –50 µA
4.5 V
4.4
IOH = –16 mA
4.5 V
3.8
IOL = 50 µA
4.5 V
IOL = 16 mA
4.5 V
MAX
MIN
UNIT
MAX
4.4
V
3.8
0
0.1
0.1
0.55
0.55
V
II
VI = 5.5 V or GND
0 to 5.5 V
±0.1
±1
µA
IOZ
VO = VCC or GND
5.5 V
±0.25
±2.5
µA
ICC
VI = VCC or GND,
IO = 0
5.5 V
2
20
µA
One input at 3.4 V, Other inputs at VCC or GND
5.5 V
1.35
1.5
mA
0
0.5
5
µA
∆ICC
(1)
TEST CONDITIONS
(1)
Ioff
VI or VO = 0 to 5.5 V
Ci
VI = VCC or GND
4.5
pF
This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or VCC.
Switching Characteristics
over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
A or B
B or A
CL = 15 pF
OE
A or B
CL = 15 pF
OE
A or B
CL = 15 pF
A or B
B or A
CL = 50 pF
OE
A or B
CL = 50 pF
OE
A or B
CL = 50 pF
tsk(o)
TA = 25°C
MIN
MIN MAX
TYP MAX
2.6
5/4
7.4
1
8.5
2.4
5.4
7.4
1
8.5
2.2
7.7
10.4
1
12
2.7
7.7
10.4
1
12
2.2
3.9
7.7
1
8
2.5
3.9
7.7
1
8
4
5.9
8.9
1
9.5
4.7
5.9
8.9
1
9.5
3.9
8.2
11.4
1
13
4.9
8.2
11.4
1
13
3.3
8.8
11.4
1
13
3.2
8.8
11.4
1
13
CL = 50 pF
1
1
UNIT
ns
ns
ns
ns
ns
ns
ns
Noise Characteristics (1)
VCC = 5 V, CL = 50 pF
PARAMETER
TA = 25°C
MIN
TYP
MAX
UNIT
VOL(P)
Quiet output, maximum dynamic VOL
0.8
1
V
VOL(V)
Quiet output, minimum dynamic VOL
–0.8
–1
V
VOH(V)
Quiet output, minimum dynamic VOH
4
VIH(D)
High-level dynamic input voltage
VIL(D)
Low-level dynamic input voltage
(1)
4
Characteristics are for surface-mount packages only.
V
2
V
0.8
V
SN74LV244AT
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES572C – JUNE 2004 – REVISED AUGUST 2005
Operating Characteristics
VCC = 5 V, TA = 25°C
PARAMETER
Cpd
Power dissipation capacitance
TEST CONDITIONS
Outputs enabled
CL = 50 pF,
f = 10 MHz
TYP
8
UNIT
pF
5
SN74LV244AT
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES572C – JUNE 2004 – REVISED AUGUST 2005
PARAMETER MEASUREMENT INFORMATION
VCC
From Output
Under Test
Test
Point
RL = 1 kΩ
From Output
Under Test
CL
(see Note A)
S1
Open
TEST
GND
CL
(see Note A)
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
3V
1.5 V
Timing Input
0V
tw
3V
1.5 V
Input
1.5 V
th
tsu
3V
1.5 V
Data Input
1.5 V
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
1.5 V
Input
1.5 V
0V
tPLH
tPHL
VOH
In-Phase
Output
50% VCC
tPHL
Out-of-Phase
Output
50% VCC
VOL
Output
Waveform 1
S1 at VCC
(see Note B)
VOH
50% VCC
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
1.5 V
1.5 V
0V
tPZL
tPLZ
≈VCC
50% VCC
tPZH
tPLH
50% VCC
3V
Output
Control
Output
Waveform 2
S1 at GND
(see Note B)
VOL + 0.3 V
VOL
tPHZ
50% VCC
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time, with one input transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPHL and tPLH are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuits and Voltage Waveforms
6
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN74LV244ATDBR
ACTIVE
SSOP
DB
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV244ATDBRE4
ACTIVE
SSOP
DB
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV244ATDGVR
ACTIVE
TVSOP
DGV
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV244ATDGVRE4
ACTIVE
TVSOP
DGV
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV244ATDW
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV244ATDWE4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV244ATDWR
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV244ATDWRE4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV244ATNSR
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV244ATNSRE4
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV244ATPW
ACTIVE
TSSOP
PW
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV244ATPWE4
ACTIVE
TSSOP
PW
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV244ATPWR
ACTIVE
TSSOP
PW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV244ATPWRE4
ACTIVE
TSSOP
PW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV244ATPWT
ACTIVE
TSSOP
PW
20
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV244ATPWTE4
ACTIVE
TSSOP
PW
20
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV244ATRGYR
ACTIVE
QFN
RGY
20
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
SN74LV244ATRGYRG4
ACTIVE
QFN
RGY
20
TBD
Lead/Ball Finish
Call TI
MSL Peak Temp (3)
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
0,23
0,13
24
13
0,07 M
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–8°
1
0,75
0,50
12
A
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,08
14
16
20
24
38
48
56
A MAX
3,70
3,70
5,10
5,10
7,90
9,80
11,40
A MIN
3,50
3,50
4,90
4,90
7,70
9,60
11,20
DIM
4073251/E 08/00
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Low Power Wireless www.ti.com/lpw
Mailing Address:
Telephony
www.ti.com/telephony
Video & Imaging
www.ti.com/video
Wireless
www.ti.com/wireless
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright  2006, Texas Instruments Incorporated
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