Sanyo LV25400W Bi-cmos lsi dsp tuner front end for automotive application Datasheet

Ordering number : E*NA0633
Bi-CMOS LSI
LV25400W
DSP Tuner Front End for
Automotive Applications
Overview
The LV25400W is a tuner front end IC that supports the Sanyo SDRS400 car radio DSP.
The LV25400W supports worldwide radio standards including the FM bands used in US, Europe, and Japan as well as the
LW, MW, SW, and FM weather bands. It adopts an image canceling mixer for the FM mixer and incorporates a fast PLL
locking function to support RDS. The LV25400W also supports automatic alignment using CCB bus control. It requires
external EEPROM.
The LV25400W can implement a DSP tuner at low cost with a minimal number of external components.
Functions
• AM, FM, FE, IF, and PLL circuits
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Symbol
Maximum supply voltage
VCC 8V
OSC_VCC (2), FE_VCC (58)
VCC 5V
XTAL_VCC (13), VCCD (22), VCCA (40)
CCB bus maximum input voltage
VIN max
Pin 18, 19, 20
-0.3 to +5.0
V
Pin 21
-0.3 to +6.5
V
CCB bus maximum output voltage
Allowable power dissipation
VO
Pd max
Conditions
Ta ≤ 85°C *1
Ratings
Unit
9.0
V
6.0
V
840
mW
Operating temperature
Topr
-40 to +85
°C
Storage temperature
Tstg
-50 to +125
°C
*1 : Ratings vary with characteristics of the circuit board (materials, size, etc.) on which the device is to be mounted.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
51607 MS PC No.A0633-1/42
LV25400W
Recommended Operating Conditions at Ta = 25°C
Parameter
Recommended supply voltage
Operating supply voltage range
Symbol
Conditions
VCC 8V
OSC_VCC (2), FE_VCC (58)
VCC 5V
XTAL_VCC (13), VCCD (22), VCCA (40)
VCC 8Vop
VCC 5Vop
Ratings
Unit
8.0
V
5
V
7.5 to 8.5
V
4.5 to 5.5
V
CCB bus high-level input voltage
VIH
CE, DI, CL
2.5 to 5.0
V
CCB bus low-level input voltage
VIL
CE, DI, CL
0 to 0.8
V
CCB bus high-level input current
IIH
CE, DI, CL ; VI5.5V
10 or less
µA
IIL
CE, DI, CL ; VI0V
CCB bus low-level input current
DO low-level output voltage
VOL
DO high-level output voltage
VOH
Connected to an LC75040.
10 or less
µA
0.38 or less
V
2.1 or more
V
Reception Frequencies
Parameter
FM reception frequencies
FM weather band reception
Symbol
fFM
Conditions
JPN, US, EUR
fFM-WB
Frequency ratings
Unit
76 to 108.1
MHz
162.4 to 162.55
MHz
kHz
frequencies
AM reception frequencies
fAMLW
LW
144 to 288
fAMMW
MW
520 to 1710
kHz
fAMSW
SW
2.94 to 22.0
MHz
No.A0633-2/42
LV25400W
Power on/Power off Timing and the Power on Reset
Recommended Operating Ratings at Ta = 25°C, GND = 0V
Parameter
Symbol
Operating supply voltage
Internal logic voltage
Power application time
(8.0 V → 5.0 V)
Conditions
min
typ
Unit
max
Vcop H
Pin 2, 54, 55, 58
7.5
8.5
V
Vcop L
Pin 13, 22, 40
4.5
5.5
V
VREG3
Pin 23
2.7
3.3
V
VREG4
Pin 24
3.7
4.3
V
10
100
msec
T7
Internal register retention voltage
Ratings
Vhmin3
Pin 23 : Design reference value
2.2
V
Vhmin4
Pin 24 : Design reference value
2.2
V
Internal register reset voltage
Voff
Pin 13, 22, 40 : Design reference value
0
0.2
V
Internal register reset power
tPOR
Pin 13, 22, 40 : Design reference value
0.05
3
msec
10
100
msec
supply rise time
Power application time
(5.0 V → 8.0 V)
T14
Vcop_H
Vcop_L
VREG4
VREG3
Voff
tPOR
T7
T14
No.A0633-3/42
LV25400W
AC Characteristics
Operating Characteristics at Ta = 25°C, VCC = 8.0V, VDD = 5.0V, unless otherwise specified. Ratings for
publications
* : These measurements are made using the Yamaichi Electronics IC51-0644-807 IC socket. An IHF bandpass filter is
used as the audio filter.
FM Characteristics - FM Front End Mixer Input (No dummy)
CCB Command
unit
IN3-2
max
IN3-1
typ
IN2
min
IN1
Pin 64
Conditions
Pin 50
Symbol
Pin 32
Parameter
Pin 25/26
Applied voltage
3
15
13
25
25
38
48
56
mA
3
15
13
25
25
31
40
46
mA
3
15
13
27
25
36
46
51
mA
3
15
13
27
25
23
32
37
mA
V
DC Characteristics
Current drain-8V FM
ICCO-8V FM
No input, FM mode
I2+I54+I55+I58
Current drain-5V FM
ICCO-5V FM
No input, FM mode
I13+I22+I40
Current drain-8V FM
ICCO-8V FM2
No input, FM mode,
IFAGC-Wide = OFF
I2+I54+I55+I58
Current drain-5V FM
ICCO-5V FM2
No input, FM mode
I13+I22+I40
Regulator bias 3V
VREG3V
The pin 23 voltage
3
15
13
25
25
2.7
3
3.3
Regulator bias 4V
VREG4V
The pin 24 voltage
3
15
13
25
25
3.6
4
4.4
V
FM antenna dump
IANTD-F
With 6.0V applied to pin 64
0
15
13
25
25
5
8
12
mA
62
48
25
25
output current
Crystal oscillator
0
6
The pin 63 output current
FXTAL
D2-5, 6, 7 = [110]
3
4.5
MHz
frequency
Crystal oscillator level
VXTAL
D2-5, 6, 7 = [110] (reference value)
3
62
48
25
25
15
Crystal oscillator
VXTAL OSC
D2-5, 6, 7 = [110]
3
62
48
25
25
115
165
buffer level
OUT2
S-meter DC output
VSMFM-1
10dBµV, the pin 38 DC output, no
3
62
50
38 25B
0.65
0.95
1.25
V
3
62
50
38 25B
0.95
1.25
1.55
V
3
62
50
38 25B
2.10
2.15
2.20
V
3
62
50
38 25B
3.1
3.4
3.7
V
3
62
50
38 25B
3.7
4
4.3
V
1.5
62
50
38
25
18.5
21.5
24.5
dB
3
62
50
38
25
4.5
7.5
10.5
dB
3
62
50
38
25
0
62
50
38
25
-3.1
-0.6
1.9
dB
3
62
50
38
25
16.9
21.4
25.9
dB
* : Adjust the shifter
bits with a 50dBµV
30 mVrms
mVrms
modulation
VSMFM-2
input.
30dBµV, the pin 38 DC output, no
modulation
VSMFM-3
50dBµV, the pin 38 DC output, no
modulation
VSMFM-4
70dBµV, the pin 38 DC output, no
modulation
VSMFM-5
90dBµV, the pin 38 DC output, no
modulation
Total gain from mixer
GMXDIV
to DIV IF amplifier
FM_MIX_IN,DIV_OUT_IF (pin 31)
Ratio of the input to output signal
levels
98.1MHz mod = off, 70dBµV-Input
DIV IF amplifier gain
GDIVIF
IF_N_IN1 (pin 45),
DIV_OUT_IF (pin 31)
Ratio of the input to output signal
levels
10.7MHz mod = off, 88dBµV-Input
1dB compression
1DB POINT DIF
point driver IF
IF_N_IN1 (pin 45),
111
dB
DIV_OUT_IF (pin 31)
Ratio of the input to output signal
levels 10.7MHz mod = off
Narrow IF AGC grain
GIFAGCNF1
(FM)
FM_ANALOG_IN (pin 45),
10.7OUTN (pin 29) Ratio of the input
to output signal levels
10.7MHz mod = off 100dBµV-Input
[D32-28 to 25] = 1011,
With 0V applied to pin 26
Narrow IF AGC grain
(FM)
GIFAGCNF2
FM_ANALOG_IN (pin 45),
10.7OUTN (pin 29) Ratio of the input
to output signal levels
10.7MHz mod = off 80dBµV-Input
[D32-28 to 25] = 1011,
With 3V applied to pin 26
Continued on next page.
No.A0633-4/42
LV25400W
Continued from preceding page.
max
unit
IN3-2
64 pin
50 pin
typ
IN3-1
FM_ANALOG_IN (pin 45),
min
IN2
1DB POINT NF
point FM-Narrow
Conditions
CCB Command
IN1
1dB complession
Symbol
32 pin
Parameter
25/26 pin
Applied voltage
0
62
50
38
25
105
0
62
50
38
25
-3.5
-1
1.5
dB
3
62
50
38
25
16.5
21
25.5
dB
0
62
50
38
25
104
dBµV
1.5
62
50
38
25
17
dB
1.5
69
50
38
25
15
dB
dBµV
10.7OUTN (pin 29)
10.7MHz mod = off
[D32-28 to 25] = 1011,
With 0V applied to pin 26
Wide IF AGC grain
GIFAGCWF1
(FM)
FM_HD_IN (pin 48),
HD_OUTN (pin 27) Ratio of the input
to output signal levels
10.7MHz mod = off 100dBµV-Input
[D2-15 to 12] = 1011,
With 0V applied to pin 25
Wide IF AGC grain
GIFAGCWF2
(FM)
FM_HD_IN (pin 48),
HD_OUTN (pin 27) Ratio of the input
to output signal levels
10.7MHz mod = off 80dBµV-Input
[D2-15 to 12] = 1011,
With 3V applied to pin 25
1dB compression
1DB POINT WF
point FM - wide
FM_HD_IN (pin 48),
HD_OUTP (pin 27)
10.7MHz mod = off
[D2-15 to 12] = 1011
Image cancellation
IR US
ratio (US)
Image cancellation
98.1MHz reference, the amount
rejected at +21.4MHz
IR JPN
ratio (JPN)
83MHz reference, the amount
rejected at -21.4MHz
[D1-26, 27] = 01
FM wide AGC on
WAGC ON-F1
sensitivity F1
fr = 102.1MHz
0
0
62
50
38
13
78
85
92
dBµV
0
0
62
50
38
15
92
99
106
dBµV
0
3
62
50
38
16
66.5
73.5
80.5
dBµV
0
3
62
50
38
18
82.5
89.5
96.5
dBµV
3
62
50
38
25
30
0
62
50
38
25
54
FM-Wide AGC-Bit
[D32-3 to 0] = 0000 : minimum
keyed-AGC-Bit
[D32-11 to 8] = 0000 : minimum
FM wide AGC on
WAGC ON-F2
sensitivity F2
fr = 102.1MHz
FM-Wide AGC-Bit
[D32-3 to 0] = 1111 : maximum
keyed-AGC-Bit
[D32-11 to 8] = 0000 : minimum
FM narrow AGC on
NAGC ON-F1
sensitivity F1
fr = 98.1MHz
FM-Narrow AGC-Bit
[D32-7 to 4] = 0000 : minimum
FM narrow AGC on
NAGC ON-F2
sensitivity F2
fr = 98.1MHz
FM-Narrow AGC-Bit
[D32-7 to 4] = 1111 : maximum
Practical sensitivity
S/N-31
Connected to an LA1787 (MPX, left
dB
channel output) *HCC OFF
98.1MHz, 31dBµV, fm = 1kHz,
22.5kHz-mod 61/62pin input
Signal-to-noise ratio
S/N-90
Connected to an LA1787 (MPX, left
57
dB
channel output)
98.1MHz, 90dBµV, fm = 1kHz,
22.5kHz-mod 61/62pin input
No.A0633-5/42
LV25400W
AM Characteristics : AM, AMANT inputs
CCB Command
unit
IN3-2
max
IN3-1
typ
IN2
min
IN1
Pin 64
Conditions
Pin 50
Symbol
Pin 32
Parameter
Pin 25/26
Applied voltage
3
33
15
26
26
32
44
54
mA
3
33
15
26
26
21
28
34
mA
3
33
15
26
26
3.5
6
9
mA
0
33
44
26
26
5.2
6.2
7.2
dB
0
33
44
26
26
-1.6
0.9
3.4
dB
3
33
44
26
26
18
22.9
27
dB
0
33
44
26
26
105
0
33
44
26
26
-2.5
0
2.5
dB
3
33
44
26
26
17.5
22
26.5
dB
0
33
44
26
26
104
3
33
44
26
27
78.5
83.5
88.5
dBµV
3
33
44
26
29
92
97
102
dBµV
DC Characteristics
Current drain-8V AM
ICCO-8V AM
No input, AM mode
I2+I54+I55+I58
Current drain-5V AM
ICCO-5V AM
No input, AM mode
I13+I22+I40
AM antenna dump
IANTD-A
output current
AC Characteristics
First AM amplifier
When pin 50 is connected to ground
The ANT-D (pin 52) output current
GAMP1
gain
FM_N_IN1 (pin 45)
IF_OUT (pin 43), after CF matching,
10.7MHz mod = off 74dBµV = Input
Narrow IF AGC grain
GIFAGCNA1
(AM)
AM_ANALOG_IN (pin 37),
10.7OUTN (pin 29) Ratio of the input
to output signal levels
10.7MHz mod = off 100dBµV-Input
[D32-28 to 25] = 1011,
With 0V applied to pin 26
Narrow IF AGC grain
GIFAGCNA2
(AM)
AM_ANALOG_IN (pin 37),
10.7OUTN (pin 29) Ratio of the input
to output signal levels
10.7MHz mod = off 80dBµV-Input
[D32-28 to 25] = 1011,
With 3V applied to pin 26
1dB compression
1DB POINT NA
point AM - narrow
AM_ANALOG_IN (pin 37),
dBµV
10.7OUTN (pin29)
10.7MHz mod = off
[D32-28 to 25] = 1011,
With 0V applied to pin 26
Wide IF AGC grain
GIFAGCWA1
(AM)
AM_HD_IN (pin 39),
HD_OUTN (pin 27) Ratio of the input
to output signal levels
10.7MHz mod = off 100dBµV-Input
[D2-15 to 12] = 1011,
With 0V applied to pin 25
Wide IF AGC grain
GIFAGCWA2
(AM)
AM_HD_IN (pin 39),
HD_OUTN (pin 27) Ratio of the input
to output signal levels
10.7MHz mod = off 80dBµV-Input
[D2-15 to 12] = 1011,
With 3V applied to pin 25
1dB compression
1DB POINT WA
point AM - wide
AM_HD_IN (pin 39),
dBµV
HD_OUTP (pin 27)
10.7MHz mod = off
[D2-15 to 12] = 1011,
With 0V applied to pin 25
AM wide AGC on
WAGC ON-A1
sensitivity A1
AM-ANT-IN = 1.4MHz, mod = off
The input level such that the ANT_D
(pin 52) level becomes 0.5V.
AM wide AGC sensitivity control
setting (D32-3 to D32-0) : 0000 (the
minimum value)
AM wide AGC on
sensitivity A2
WAGC ON-A2
AM-ANT-IN = 1.4MHz, mod = off
The input level such that the ANT_D
(pin 52) level becomes 0.5V.
AM wide AGC sensitivity control
setting (D32-3 to D32-0) : 1101
Continued on next page.
No.A0633-6/42
LV25400W
Continued from preceding page.
max
unit
IN3-2
Pin 64
Pin 50
typ
IN3-1
AM-ANT-IN = 1MHz, mod = off
min
IN2
NAGC ON-A1
sensitivity A1
Conditions
CCB Command
IN1
AM narrow AGC on
Symbol
Pin 32
Parameter
Pin 25/26
Applied voltage
3
33
44
26
30
60
65
70
dBµV
3
33
44
26
32
75
80
85
dBµV
3
33
44
26
32
33.5
39
44.5
3
33
44
26
32
20
33
44
26
32
0.7
1.2
%
33
44
26
32
0.7
1.2
%
33
44
26
32
The input level such that the ANT_D
(pin 52) level becomes 0.5V.
AM narrow AGC sensitivity control
setting (D32-7 to D32-4) : 0000 (the
minimum value)
AM narrow AGC on
NAGC ON-A2
sensitivity A2
AM-ANT-IN = 1MHz, mod = off
The input level such that the ANT_D
(pin 52) level becomes 0.5V.
AM narrow AGC sensitivity control
setting (D32-7 to D32-4) : 1111 (the
maxim value)
Total AM gain
AMGAIN
1MHz, 60dBµV, mod = off, the ration
dB
of the AM_ANT input and the
10.7OUTN (pin 29) output levels
Practical sensitivity
S/N-33
With an LA1787 connected
dB
With a 1MHz, 33dBµV, fm = 1kHz,
30% modulation ANT input and the
IF AGC voltage = 3V add.
THD-74
With an LA1787 connected
With a 1MHz, 74dBµV, fm = 1kHz,
80% modulation ANT input and the
IF AGC voltage adjusted so that the
Adjusted
THD_1
IFAGCOUT level is 100dBµV.
THD-77
With an LA1787 connected
With a 1MHz, 77dBµV, fm = 1kHz,
80% modulation ANT input and the
IF AGC voltage adjusted so that the
Adjusted
THD_2
IFAGCOUT level is 100dBµV.
S/N-74
With an LA1787 connected
With a 1MHz, 74dBµV, fm = 1kHz,
80% modulation ANT input and the
IF AGC voltage adjusted so that the
52.5
56
dB
Adjusted
Signal-to-noise ratio
IFAGCOUT level is 100dBµV.
No.A0633-7/42
LV25400W
DC Characteristics
Operating Characteristics at Ta = 25°C, VCC = 8.0V, VDD = 5.0, GND = 0, VSS = 0, unless otherwise specified.
Ratings for publications
* : These measurements are made using the Yamaichi Electronics IC51-0644-807 IC socket.
*: Undefined
FM: No input
IN3-2
Conditions
IN3-1
Symbol
IN2
Parameter
IN1
CCB Command
Pin
No.
min
typ
max
unit
1
FE_GND
V1FM
15
13
25
25
2
OSC_VCC
V2FM
15
13
25
25
0
V
3
OSC_B
V3FM
15
13
25
25
4
OSC_C
V4FM
15
13
25
25
5
VT
V5FM
15
13
25
25
0
6
FET_GND
V6FM
15
13
25
25
0
7
PLL-LPF
V7FM
15
13
25
25
*
V
8
FM FET
V8FM
15
13
25
25
*
V
8
2.65
V
V
7.45
V
8
V
V
9
AM FET
V9FM
15
13
25
25
*
V
10
CPAM
V10FM
15
13
25
25
*
V
11
CPFM
V11FM
15
13
25
25
12
GND (Digital)
V12FM
15
13
25
25
13
VCC (X'TAL)
V13FM
15
13
25
25
14
X'tal IN
V14FM
15
13
25
25
2.7
V
15
X'tal OUT
V15FM
15
13
25
25
4.1
V
16
GND (X'TAL)
V16FM
15
13
25
25
17
X'tal-Buffer-OUT
V17FM
15
13
25
25
3.45
V
18
CE
V18FM
15
13
25
25
BUS
V
19
DI
V19FM
15
13
25
25
BUS
V
20
CL
V20FM
15
13
25
25
21
DO
V21FM
15
13
25
25
22
VCC 5V (Digital)
V22FM
15
13
25
25
23
PLL VDD (3V REG)
V23FM
15
13
25
25
3.1
V
24
PLL VDD (4V REG)
V24FM
15
13
25
25
4.15
V
25
AGC-Control-IN (HD)
V25FM
15
13
25
25
Input
V
26
AGC-Control-IN (Analog)
V26FM
15
13
25
25
Input
V
27
IFAGC-OUTN (HD)
V27FM
15
13
25
25
2.75
V
28
IFAGC-OUTP (HD)
V28FM
15
13
25
25
2.75
V
29
IFAGC-OUTN (Analog)
V29FM
15
13
25
25
2.75
V
*
V
0
V
5
0
V
V
BUS
0
V
Note 1
5
V
V
30
IFAGC-OUTP (Analog)
V30FM
15
13
25
25
2.75
V
31
DIV-IF-OUT
V31FM
15
13
25
25
1.95
V
32
VSM-DC
V32FM
15
13
25
25
33
2.7V REG
V33FM
15
13
25
25
2.7
V
34
IFAGC-IN (Analog-Bypass)
V34FM
15
13
25
25
2.45
V
35
IFAGC-IN (HD-Bypass)
V35FM
15
13
25
25
2.45
V
36
GND (Analog)
V36FM
15
13
25
25
0
V
37
IFAGC-IN (Analog)
V37FM
15
13
25
25
2.45
38
VSM-AC
V38FM
15
13
25
25
0
5
0
V
V
5
V
39
IFAGC-IN (HD)
V39FM
15
13
25
25
2.45
V
40
VCC 5V (Analog)
V40FM
15
13
25
25
5
V
41
AM-Narrow-AGC-IN
V41FM
15
13
25
25
*
V
42
Address SW/DAC-Monitor
V42FM
15
13
25
25
3.1
V
43
AM-1st-IF-OUT
V43FM
15
13
25
25
7.5
V
44
4.9V REG
V44FM
15
13
25
25
4.7
V
45
IF-Narrow-IN
V45FM
15
13
25
25
2.6
V
46
IF-Narrow-IN(Bypass)
V46FM
15
13
25
25
2.6
47
AM-Wide-AGC (Bypass)
V47FM
15
13
25
25
V
1.5
V
Continued on next page.
No.A0633-8/42
LV25400W
Continued from preceding page.
Conditions
IN3-2
Symbol
IN3-1
48
Parameter
IN2
Pin
No.
IN1
CCB Command
15
13
25
25
IF-Wide-IN
V48FM
49
IF-Wide-IN (Bypass)
V49FM
15
13
50
AM-RF-AGC
V50FM
15
13
51
AM-RF-AGC (Bypass)
V51FM
15
13
25
25
52
AM-ANT-D
V52FM
15
13
25
25
53
FM-Narrow-AGC-IN
V53FM
15
13
25
54
FM/AM-MIX-OUT
V54FM
15
13
55
FM/AM-MIX-OUT
V55FM
15
13
56
ANT-DAC
V56FM
15
57
RF-DAC
V57FM
58
VCC (8V)
59
60
min
typ
max
2.05
25
25
2.05
25
25
unit
V
V
0
1
V
1
V
0.3
V
25
0.3
V
25
25
8
V
25
25
8
V
13
25
25
0
8
V
15
13
25
25
0
8
V
V58FM
15
13
25
25
8
V
AM-MIX-IN
V59FM
15
13
25
25
0.2
V
AM-MIX-IN
V60FM
15
13
25
25
0.2
V
61
FM-MIX-IN
V61FM
15
13
25
25
3
62
FM-MIX-IN
V62FM
15
13
25
25
3
V
63
FM-RF-AGC
V63FM
15
13
25
25
0.2
V
64
FM-ANT-D
V64FM
15
13
25
25
8
V
V
Note 1 : Pull-up voltage
AM: No input
Conditions
IN3-2
Symbol
IN3-1
Parameter
IN2
Pin
No.
IN1
CCB Command
min
typ
max
unit
1
FE_GND
V1AM
33
15
26
26
2
OSC_VCC
V2AM
33
15
26
26
0
V
3
OSC_B
V3AM
33
15
26
26
2.65
V
4
OSC_C
V4AM
33
15
26
26
7.45
V
5
VT
V5AM
33
15
26
26
0
6
FET_GND
V6AM
33
15
26
26
0
7
PLL-LPF
V7AM
33
15
26
26
8
FM FET
V8AM
33
15
26
26
*
V
9
AM FET
V9AM
33
15
26
26
*
V
10
CPAM
V10AM
33
15
26
26
*
V
11
CPFM
V11AM
33
15
26
26
12
GND (Digital)
V12AM
33
15
26
26
8
8
V
V
V
*
V
*
V
0
V
13
VCC (X'TAL)
V13AM
33
15
26
26
14
X'tal IN
V14AM
33
15
26
26
2.7
5
V
15
X'tal OUT
V15AM
33
15
26
26
4.1
V
16
GND (X'TAL)
V16AM
33
15
26
26
17
X'tal-Buffer-OUT
V17AM
33
15
26
26
3.45
V
18
CE
V18AM
33
15
26
26
BUS
V
19
DI
V19AM
33
15
26
26
BUS
V
20
CL
V20AM
33
15
26
26
21
DO
V21AM
33
15
26
26
22
VCC 5V (Digital)
V22AM
33
15
26
26
23
PLL VDD (3V REG)
V23AM
33
15
26
26
24
PLL VDD (4V REG)
V24AM
33
15
26
26
4.15
V
25
AGC-Control-IN (HD)
V25AM
33
15
26
26
Input
V
26
AGC-Control-IN (Analog)
V26AM
33
15
26
26
Input
V
27
IFAGC-OUTN (HD)
V27AM
33
15
26
26
2.75
0
V
V
BUS
0
V
Note 1
5
3.1
V
V
V
V
Continued on next page.
No.A0633-9/42
LV25400W
Continued from preceding page.
Conditions
V28AM
IN3-2
IFAGC-OUTP (HD)
Symbol
IN3-1
28
Parameter
IN2
Pin
No.
IN1
CCB Command
33
15
26
26
min
typ
max
unit
2.75
V
29
IFAGC-OUTN (Analog)
V29AM
33
15
26
26
2.75
V
30
IFAGC-OUTP (Analog)
V30AM
33
15
26
26
2.75
V
31
DIV-IF-OUT
V31AM
33
15
26
26
32
VSM-DC
V32AM
33
15
26
26
33
2.7V REG
V33AM
33
15
26
26
2.7
V
34
IFAGC-IN (Analog-Bypass)
V34AM
33
15
26
26
2.2
V
35
IFAGC-IN (HD-Bypass)
V35AM
33
15
26
26
2.1
V
36
GND (Analog)
V36AM
33
15
26
26
0
V
37
IFAGC-IN (Analog)
V37AM
33
15
26
26
38
VSM-AC
V38AM
33
15
26
26
1.95
V
0
5
2.2
V
V
0
5
V
39
IFAGC-IN (HD)
V39AM
33
15
26
26
2.1
40
VCC 5V (Analog)
V40AM
33
15
26
26
5
V
V
41
AM-Narrow-AGC-IN
V41AM
33
15
26
26
*
V
42
Address SW/DAC-Monitor
V42AM
33
15
26
26
3.1
V
43
AM-1st-IF-OUT
V43AM
33
15
26
26
4.8
V
44
4.9V REG
V44AM
33
15
26
26
4.7
V
45
IF-Narrow-IN
V45AM
33
15
26
26
2.65
V
46
IF-Narrow-IN (Bypass)
V46AM
33
15
26
26
2.65
V
47
AM-Wide-AGC (Bypass)
V47AM
33
15
26
26
2.25
V
48
IF-Wide-IN
V48AM
33
15
26
26
2.4
V
49
IF-Wide-IN (Bypass)
V49AM
33
15
26
26
2.4
V
50
AM-RF-AGC
V50AM
33
15
26
26
6.45
V
51
AM-RF-AGC (Bypass)
V51AM
33
15
26
26
0.8
V
52
AM-ANT-D
V52AM
33
15
26
26
53
FM-Narrow-AGC-IN
V53AM
33
15
26
26
0.4
V
54
FM/AM-MIX-OUT
V54AM
33
15
26
26
55
FM/AM-MIX-OUT
V55AM
33
15
26
26
56
ANT-DAC
V56AM
33
15
26
26
0
57
RF-DAC
V57AM
33
15
26
26
0
58
VCC (8V)
V58AM
33
15
26
26
59
AM-MIX-IN
V59AM
33
15
26
26
2.65
V
60
AM-MIX-IN
V60AM
33
15
26
26
2.65
V
61
FM-MIX-IN
V61AM
33
15
26
26
1.5
V
62
FM-MIX-IN
V62AM
33
15
26
26
1.5
V
63
FM-RF-AGC
V63AM
33
15
26
26
64
FM-ANT-D
V64AM
33
15
26
26
0
V
8
7
V
8
V
8
V
8
V
8
V
V
0
V
IN3-2
V33
Conditions
IN3-1
TUNER OFF
Symbol
IN2
Parameter
IN1
CCB Command
19
37
25
25
min
typ
0.03
max
unit
V
No.A0633-10/42
LV25400W
IN3-2
Conditions
IN3-1
Symbol
IN2
Parameter
IN1
CCB Command
min
typ
max
unit
ANT-DAC
ALL_OFF (000000000)
DAC560
15
13
1
25
105
285
mV
D10_SETP (100000000)
DAC561
(DAC56_1)-(DAC56_0)
15
13
2
25
3
20
mV
D11_SETP (010000000)
DAC562
(DAC56_2)-(DAC56_0)
15
13
3
25
5
35
mV
D12_SETP (001000000)
DAC563
(DAC56_3)-(DAC56_0)
15
13
5
25
15
65
mV
D13_SETP (000100000)
DAC564
(DAC56_4)-(DAC56_0)
15
13
7
25
35
125
mV
D14_SETP (000010000)
DAC565
(DAC56_5)-(DAC56_0)
15
13
9
25
120
250
mV
D15_SETP (000001000)
DAC566
(DAC56_6)-(DAC56_0)
15
13
11
25
310
490
mV
D16_SETP (000000100)
DAC567
(DAC56_7)-(DAC56_0)
15
13
13
25
730
960
mV
D17_SETP (000000010)
DAC568
(DAC56_8)-(DAC56_0)
15
13
15
25
1.5
1.9
V
D18_SETP (000000001)
DAC569
(DAC56_9)-(DAC56_0)
15
13
17
25
3.05
3.75
V
ALL_ON (111111111)
DAC56A
15
13
18
25
6.25
7.55
V
RF-DAC
ALL_OFF (111111111)
DAC570
15
13
1
25
105
285
mV
D0_SETP (100000000)
DAC571
(DAC57_1)-(DAC57_0)
15
13
2
25
3
20
mV
D1_SETP (010000000)
DAC572
(DAC57_2)-(DAC57_0)
15
13
3
25
5
35
mV
D2_SETP (001000000)
DAC573
(DAC57_3)-(DAC57_0)
15
13
5
25
15
65
mV
D3_SETP (000100000)
DAC574
(DAC57_4)-(DAC57_0)
15
13
7
25
35
125
mV
D4_SETP (000010000)
DAC575
(DAC57_5)-(DAC57_0)
15
13
9
25
120
250
mV
D5_SETP (000001000)
DAC576
(DAC57_6)-(DAC57_0)
15
13
11
25
310
490
mV
D6_SETP (000000100)
DAC577
(DAC57_7)-(DAC57_0)
15
13
13
25
730
960
mV
D7_SETP (000000010)
DAC578
(DAC57_8)-(DAC57_0)
15
13
15
25
1.5
1.9
V
D8_SETP (000000001)
DAC579
(DAC57_9)-(DAC57_0)
15
13
17
25
3.05
3.75
V
ALL_ON (111111111)
DAC57A
15
13
18
25
6.25
7.55
V
Package Dimensions
unit : mm (typ)
3190A
12.0
0.5
10.0
48
33
64
12.0
32
10.0
49
17
1
16
0.5
0.18
0.15
0.1
1.7max
(1.5)
(1.25)
SANYO : SQFP64(10X10)
No.A0633-11/42
LV25400W
Pin Functions
Pin No.
Pin
Pin No.
Pin
1
FE_GND
33
VREG2.7V
2
OSC_VCC
34
AM_ANALOG_IN Bypass
3
OSC_B
35
AM_HD_IN Bypass
4
OSC_C
36
AGND
5
PLL-VT
37
AM ANALOG IN
6
FET_GND
38
VSM_AC
7
PLL-LPF_AM
39
AM HD IN (35k CF)
8
FM_FET_OUT
40
VCCA5V
AM_N-AGC pick-up
9
AM_FET_OUT
41
10
AM_CP
42
Address-SW
11
FM_CP
43
IF_OUT
12
DGND
44
VREG4.9V
13
XTAL_VCC
45
IF-N_IN1 (CF = 180k)
14
XTAL-IN
46
IF-N_IN2 (180k_Bypass)
15
XTAL-OUT
47
AM-W-AGC
16
XTAL_GND
48
IF-W_IN1 (CF = 500k)
17
XTAL_OSC_OUT2
49
IF-W_IN2 (500k_Bypass)
18
CE
50
AM-RF-AGC
19
DI
51
AM RF-AGC (Bypass)
20
CL
52
AM-ANT-D
21
DO
53
FM N-AGC-IN
22
VCCD5V
54
MIX-OUT
23
VREG 3V
55
MIX-OUT
24
VREG 4V
56
ANT-DAC
25
AGC_DAC_I
57
RF-DAC
26
AGC_DAC_S
58
FE_VCC8V
27
HD-Radio out N
59
AM-MIX-IN2 (Bypass)
28
HD-Radio out P
60
AM-MIX-IN1
29
10.7M OUT N
61
FM-MIX-IN1
30
10.7M OUT P
62
FM-MIX-IN2
31
DIV_OUT_IF
63
FM-ANT D
32
VSM_DC
64
FM-RF-AGC
No.A0633-12/42
LV25400W
Functions
AM/FM front-end AGC block
FM Image rejection Mixer (IQ-MIX)
Gain switching : 1 bit
FM IQ-MIX phase adjust (For the Japanese FM band)
2 bit DAC
AM Double balance Mixer
Pin diode drive AGC output (AM/FM)
Wide AGC sensitivity setting (AM/FM)
4 bit DAC
Narrow AGC sensitivity setting (AM/FM)
4 bit DAC
Keyed AGC adjust (FM)
4 bit DAC
AM RF AGC
4 bit DAC
Local oscillator
155MHz to 262MHz
Local osc divider (FM/AM)
Division by 1, 2, or 3
Local osc divider (AM)
Division by 10, 8, 6, or 4
ANT/RF DAC (FM)
9 bit DAC
AM 1st IF AMP block
1st-IF amplifier 10.7M (Narrow)
FM IF block
S-meter shifter
5 bit DAC
IF Limiter Amplifier 6 stage
S-meter (DC for keyed AGC) (FM)
IF output Driver for DSP/iBoc (10.7MHz output)
IF-AGC block
IF AGC Amplifier (control Voltage from DSP)
IF output Driver for DSP/iBoc
10.7MHz IF
IF Buffer Output for Diversity
10.7MHz IF
IF Gain Adjust
4 bit DAC
IF AGC Amp-OFF-Sw
For the analog system and the iBoc system ; 1 bit each
PLL
Fast lock PLL
Filter SW
1 bit SW
other
Tuner off
1 bit SW
2.7V Regurator adjust
2 bit DAC
No.A0633-13/42
L
P
F
Xtal 4.5MHz
5V
L
P
F
Coil
tuning circuit
8V
61
16
15
14
13
17
18
19
20
Computer
Control
Bus
charge
pump
11
XTAL
OSC
POWER ON
RESET
IN 1
IN 2
IN 3-1
IN 3-2
21
59
RF DAC
57
22
5V
23
3V REG
S-Meter
Shifter
AM RFAGC
compalate
Keyed
AGC
25
26
IF gain variation
correction
(wide output)
4V REG
24
55
Wide AGC
56
27
54
MIX
COIL
IF gain variation
correction
(narrow output)
Narrow AGC
RF AGC
ANT-D
FM AGC
ANT DAC
58
8V
TUNER adjustment
AM/FM
W-AGC
AM/FM
N-AGC
FM
keyed-AGC
AM RFAGC Amp
sens
ECL2
1/4,1/6
1/8,1/10
R-CTR
12
60
BPF
AM antenna
circuit
AM RF
amplifier circuit
AM Mixer/
FM IQ-Mixer
ECL1
1/1,1/2
1/3
62
10
P-CTR
swallow
counter
NMOS Tr
PLL
VCO
63
phase
det
9
8
7
6
5
4
3
2
1
64
FM RF
tuning circuit
FM RF
amplifier circuit
52
28
29
49
30
31
32
Analog
IF AGC Buffer
AMP
FM
AMP
FM
AMP
HD
IF AGC
AMP
AM
AMP
AM
AMP
IF AGC AMP
S-METER
(main/sub)
Limitter
AMP
Singal Meter
AM
1st AMP
Narrow AGC
RF AGC
50
Wide AGC
51
ANT-D
AM AGC
53
2.7V
REG
4.9V
REG
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Xtal filter_16kHz
CF10.7MHz_50k
5V
CF10.7MHz_180k
CF10.7MHz_500k
IF
Buffer
LV25400W
Block Diagram
No.A0633-14/42
LV25400W
Equivalent Circuits
Pin No.
Pin
1
FE.GND
2
OSC VCC
Description
Equivalent Circuit
8V GND (F.E.)
Dedicated oscillator system power
8V VCC (VCO.)
supply
3
FM/AM OSC_B
4
FM/AM OSC_C
Oscillator connections
VCC(2pin)
500Ω
500Ω
4
333Ω
3
5kΩ
5kΩ
5
6
Tuning voltage output
FM mode :
Low-pass filter output
A PLL filter is formed on pins 8
FET ground
7
AM filter
8
FM mode FET
VCC
PIN58
through 11. (Pins 9 and 10 are left
VDD
PIN23
3kΩ
open.)
9
AM mode FET
10
AM charge pump
A PLL filter is formed on pins 7, 9, and
11
FM charge pump
10. In this mode, a low-pass filter is
1kΩ
AM mode :
5kΩ
formed by the internal impedance
11
1.3kΩ
tentative
DIGITAL GND
13
XTAL VCC
Dedicated crystal oscillator system
2.2kΩ
2200pF
220pF
12
CPFM
10
CPAM
0.033µF
9
AMFET
1µF
8
FMFET
0.01µF
30kΩ
7
AM-FILTER
6
VT
5
VT
FET-GND
(10kΩ) and an external capacitor.
5V VCC (XTAL)
power supply
14
X'tal-OSC-IN
15
X'tal-OSC-OUT
Connect a 4,5MHz crystal element
between pins 14 and 15.
VCC(PIN13)
ES6
1.5kΩ
35pF
Connect a 10pF capacitor between
1.5kΩ
1.5kΩ
333Ω
1kΩ
pin 14 and ground, and connect a
AMP
150pF capacitor between pin 15 and
ground.
500Ω
1.5kΩ
AMP
5kΩ 500Ω
1.5kΩ 1.5kΩ
500Ω
333Ω
AMP
5kΩ
333Ω
17
1kΩ
20kΩ
ALC
to PLL
8pF 4pF 2pF
14
15
Continued on next page.
No.A0633-15/42
LV25400W
Continued from preceding page.
Pin No.
Pin
16
XTAL GND
17
XTAL OSC2
Description
Equivalent Circuit
Dedicated crystal oscillator system
ground
Crystal oscillator output 2 for use by a
2-tuner clock
500Ω
17
1kΩ
18
CE
Used to enable serial data input (DI)
to the LV25400W or force the output
3V
to the high level during serial data
output.
P-MOS
P-MOS
P-MOS
P-MOS
N-MOS
N-MOS
18
N-MOS
N-MOS
VSS(PIN12)
19
DI
Input for the serial data transferred to
3V
the LV25400W from the controller.
P-MOS
P-MOS
P-MOS
P-MOS
N-MOS
N-MOS
19
N-MOS
N-MOS
VSS(PIN12)
Continued on next page.
No.A0633-16/42
LV25400W
Continued from preceding page.
Pin No.
Pin
Description
20
CL
Clock used for synchronization when
Equivalent Circuit
3V
serial data is input to the LV25400W
(DI) or when serial data is output
(DO).
P-MOS
P-MOS
P-MOS
P-MOS
N-MOS
N-MOS
20
N-MOS
N-MOS
VSS(PIN12)
21
DO
Output for serial data output to the
21
controller by the LV25400W.
500Ω
Note : The pull-up resistor must be in
the range 10kΩ to 50kΩ.
VSS(PIN12)
500Ω
VSS(PIN12)
22
VCCD
23
PLL VREG (VDD) - 3V
Digital system power supply
5V VCC (Digital)
Regulator output for the PLL circuit 3V
VCC(8V)
VCC(22pin)
PLL
VDD
DAC
23
5kΩ
41.7kΩ
Continued on next page.
No.A0633-17/42
LV25400W
Continued from preceding page.
Pin No.
Pin
Description
24
Swallow counter
Regulator output for the PLL swallow
VREG - 4V
counter - 4V
Equivalent Circuit
VCC(8V)
VCC(22pin)
swallow
4V
24
41.7kΩ
25
AGC_DAC_I
IF AGC control bias is supplied from
5.6V
the LC75040 (for iBoc).
200kΩ
25
100kΩ
26
AGC_DAC_S
IF AGC control bias is supplied from
5.6V
the LC75040 (for the analog system).
200kΩ
26
100kΩ
27
HD_OUTN
Wideband IF (10.7MHz) signal
28
HD_OUTP
differential output to the LC75040 for
VCC(40pin) VCC(40pin)
iBoc use.
500Ω
300Ω
200Ω
27
28
300Ω
500Ω
Continued on next page.
No.A0633-18/42
LV25400W
Continued from preceding page.
Pin No.
Pin
29
10.7OUTN
Narrowband IF (10.7MHz) signal
Description
30
10.7OUTP
differential output to the LC75040 for
Equivalent Circuit
VCC(40pin) VCC(40pin)
analog use.
500Ω
300Ω
200Ω
29
30
300Ω
500Ω
31
DIV_OUT_IF
Driver 10.7MHz signal buffer output
VCC(58pin)
200Ω
31
26kΩ
10kΩ
200Ω
32
S-meter (DC)
Current driver S-meter output
VCC(40pin)
AC components are removed with an
external capacitor.
300Ω
38
10kΩ
33
Vref 2.7V
2.7V regulator
VCC(PIN40)
1kΩ
33
333Ω
30kΩ
Continued on next page.
No.A0633-19/42
LV25400W
Continued from preceding page.
Pin No.
Pin
Description
34
AM ANALOG_IN
AM analog signal system related input
Bypass
(AM narrowband 10.7MHz IF signal)
37
AM ANALOG_IN
Equivalent Circuit
VCC(40pin)
37
34
20kΩ
300Ω
35
AM HD_IN Bypass
39
AM HD_IN
300Ω
iBoc and AM analog signal system
VCC(40pin)
related input
(AM narrowband 10.7MHz IF signal)
39
35
20kΩ
300Ω
36
ANALOG GND
38
S-meter AC output pin
300Ω
FM mode: S-meter AC signal output
VCC(PIN40)
38
300Ω
7kΩ
40
VCCA
41
AM Narrow-AGC
Analog system power supply
5V VCC (Analog)
AM narrow AGC detection
Pick-Up
41
500Ω
500Ω
10kΩ
42
Address_SW
When two tuners are used, one of the
two ICs' pin 42 is connected to
ground, need changes the address.
1kΩ
42
Continued on next page.
No.A0633-20/42
LV25400W
Continued from preceding page.
Pin No.
Pin
43
AM 1stIF_AMP_OUT
Description
Equivalent Circuit
First AM IF amplifier output
VCC_58PIN
333kΩ
43
50Ω
44
VREG4.9V
4.9V regulator
VCC(PIN40)
1kΩ
44
34kΩ
1kΩ
50kΩ
15kΩ
45
IF-N_IN1
First AM IF amplifier input
46
IF-N_IN2
Driver 10.7MHz signal buffer input
FM limiter amplifier input
45
46
500Ω
500Ω 500Ω
500Ω
300Ω
2pF
2pF
300Ω
270Ω
500Ω
V
500Ω
500Ω
47
AM W-AGC
Used for wide AGC pickup. There is a
built-in amplifier.
47
1kΩ
10kΩ
1kΩ
Continued on next page.
No.A0633-21/42
LV25400W
Continued from preceding page.
Pin No.
Pin
48
FM IF-W_IN1
49
FM IF-W_IN2
Description
Equivalent Circuit
Wideband FM IF AGC clamp input
VCC(40pin)
48
49
20kΩ
10kΩ
50
AM RF-AGC
RF AGC rectifying capacitor
51
AM RF-AGC-Bypass
Determines the distortion for
10kΩ
VCC(PIN 58)
low-frequency modulation.
Increasing the size of C50 and C 51 :
Distortion → Improves
5KΩ
Response → Becomes slower
1KΩ
15KΩ
Reducing the size of C50 and C 51 :
Distortion → Degrades
1kΩ
1kΩ
Response → Becomes faster
51
C59
1µF
+
750Ω
500Ω
500Ω
100Ω
C64
10µF
52
AM ANT-D
Provides the PIN diode drive current.
I52 = 6mA
500Ω
50
+
VCC_8V
This is the antenna dumping current.
200Ω
52
500Ω
Continued on next page.
No.A0633-22/42
LV25400W
Continued from preceding page.
Pin No.
Pin
Description
53
FM Narrow AGC
Used for narrow AGC pickup. There is
Equivalent Circuit
AGC AMP
a built-in amplifier.
2.5kΩ
53
1kΩ
10kΩ
2.2V
54
AM/FM 1st-MIX OUT
FM/AM mixer output (common)
54
55
55
FM MIX
56
ANT DAC
57
RF DAC
AM MIX
9-bit D/A converter
1kΩ
1kΩ
57
56
1kΩ
58
VCCA
59
AM MIX-IN2 (Bypass)
60
AM MIX-IN1
VCC8V
FM FE/AM
AM mixer input
VCC(PIN58)
Input impedance : 10kΩ
2.5kΩ
59
10kΩ
60
110Ω
110Ω
10kΩ
12kΩ
61
FM MIX-IN1
FM mixer input
62
FM MIX-IN2
FM wide AGC pickup
Input impedance : 10kΩ
FM MIX
AGC AMP
60
61
500Ω
10kΩ
500Ω
10kΩ
2.2V
Continued on next page.
No.A0633-23/42
LV25400W
Continued from preceding page.
Pin No.
Pin
63
FM ANT D
Description
Equivalent Circuit
Pin 63 : The antenna driving current
VCC
flows when the RF AGC voltage
reaches (VCC - Vbe).
75kΩ
300Ω
63
300Ω
64
FM RF AGC
RF AGC voltage
VCC
500Ω
500Ω
500Ω
12kΩ
500Ω
64
30kΩ
No.A0633-24/42
LV25400W
SANYO Serial Bus Data Timing
≈
: Chip enable
: Clock
: Data input
: Data output (pin information only)
VIH
tCH
VIH
VIL
VIH
VIH
≈ ≈ ≈
CL
VIL
VIH
DI
VIL
tEL
tES
VIL
tHD
tSU
VIH
≈
tCL
≈
CE
VIH
tEH
≈ ≈
CE
CL
DI
DO
≈ ≈
≈ ≈
tLC
Internal data
latch
Old
New
≈
〈〈 When CL is stopped at the L level 〉〉
VIH
tCL
VIH
VIL
≈ ≈
VIH
VIH
DI
tSU
tHD
VIL
tEL
tES
tEH
tLC
≈ ≈
VIL
VIH
VIH
≈ ≈
CL
VIL
≈ ≈ ≈
tCH
≈ ≈
CE
Internal data
latch
Old
New
〈〈 When CL is stopped at the H level 〉〉
Parameter
Symbol
Pin
Conditions
min
typ
max
unit
Data setup time
tSU
DI, CL
0.45
µs
Data hold time
tHD
DI, CL
0.45
µs
Clock L-level time
tCL
CL
0.45
µs
Clock H-level time
tCH
CL
0.45
µs
CE wait time
tEL
CE, CL
0.45
µs
CE setup time
tES
CE, CL
0.45
µs
CE hold time
tEH
CE, CL
0.45
Data latch change time
tLC
Data input high-level voltage
VIH
CL, DI, CE
Data input low-level voltage
VIL
CL, DI, CE
µs
0.45
µs
2.5
5.0
V
-0.3
0.8
V
No.A0633-25/42
LV25400W
Serial Data I/O Procedures
The LV25400W uses the SANYO audio IC serial bus format. Data is input and output using a CCB (Computer Control
Bus). The LV25400W adopts an 8-bit address version of the CCB format.
I/O mode
[1]
Address
B0
B1
B2
B3
A0
A1
A2
Contents
A3
IN1
0
0
0
1
0
1
0
0
• Control data input mode. PLL setup
IN1B
0
1
0
1
0
1
0
0
• 32 bits of data are input
IN2
1
0
0
1
0
1
0
0
• Control data input mode. PLL setup
IN2B
1
1
0
1
0
1
0
0
• 32 bits of data are input
IN3
1
0
0
1
0
1
1
0
• The tuner block is set up in control data input (serial data input) mode.
IN3B
0
0
0
1
0
1
1
0
• 32 bits of data are input - There is a sub-address
• IN1B is the 2-tuner mode address (when pin 42 is tied to ground)
[2]
• IN2B is the 2-tuner mode address (when pin 42 is tied to ground)
• IN3B is the 2-tuner mode address (when pin 42 is tied to ground)
≈
I/O mode determined
≈
CE
CL
DI
B0
B1
B2
B3
A0
A1
A2
A3
≈ ≈
[3]
First Data IN1/2
No.A0633-26/42
LV25400W
DVS
AM/FM
Program-CTR Stop
Program-CTR Normal
0
FM
operation
1
AM
0
1
IN1 setting
AM oscillator divisor control
OSD D2 OSD D1
Divisor
0
0
Divisor by 10
1
0
Divisor by 8
0
1
Divisor by 6
1
1
Divisor by 4
A A A A B B B B IN
3 2 1 0 3 2 1 0
0 0 1 0 1 0 0 0
Address Code
D1-14
D1-13
D1-12
D1-11
D1-10
D1-09
D1-08
D1-07
D1-06
D1-05
D1-04
D1-03
D1-02
D1-01
D1-00
P15
P14
P13
P12
P11
P10
P09
P08
P07
P06
P05
P04
P03
P02
P01
P00
L
L
L
L
L H H L H L
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(5)
(4) (3)
LSB
D1-15
R0
OSC D1
R1
OSC D2
D1-20
R2
D1-16
D1-21
R3
D1-17
D1-22
OSC_DIV
DVS
D1-23
WB
L
(6)
AM/FM
D1-24
DELAY_ADJ0
L
(7)
D1-18
D1-25
DELAY_ADJ1
L
(8)
D1-19
D1-26
0
D1-27
0
MODE
D1-29
0
L
D1-28
D1-30
L
MSB
D1-31
L
(2)
(1)
AM/FM/WB oscillator divisor control
OSD DIV
Divisor
WB
Divisor by 2
0
0
Divisor by 3
0
1
Divisor by 1
1
0
Divisor by 1
1
1
*WB : Select 1 for weather band reception
Reference
frequency
setting
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
4.5, 7.2MHz
100kHz
50kHz
25kHz
25kHz
12.5kHz
6.25kHz
3.125kHz
3.125kHz
10kHz
9kHz
5kHz
1kHz
3kHz
30kHz
Illegal value
Illegal value
PLL filter switching
Filter state
Normal
MODE AM/FM AM filter FM filter
0
W-FILTER
1
0000
0
1
0
1
0
0
1
1
ON
ON
OFF
ON
ON
1
0001
1111
0100
Divide by 500
:
1110
1000
Divide by 1000
:
1101
0000
Divide by 2000
:
0101
0101
Divide by 21845
:
1010
1010
Divide by 43690
:
1111
1111
Divide by 65535
:
0000
0011
:
0000
Adjustment
amount
Small
↓
↓
Large
OFF
1
0
Programmable counter divisor setting (from 272 to 65535)
0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 Divide by 272
:
:
0111
:
FM-IQMIX phase_Adjust
DEIAY_ADJ0 DEIAY_ADJ1
0
0101
0101
:
1010
1010
:
1111
1111
No.A0633-27/42
LV25400W
DO pin control data (1)
ULD DT1 DT0
DO pin
0 Low when not locked.
0
0
1
0
0
Monitor 1 (unused)
0
0
1
Monitor 2 (unused)
1
0
1
(See DO control (2))
0
1
0
Open
1
1
0
Monitor 1 (unused)
0
1
1
Monitor 2 (unused)
1
1
1
(See DO control (2))
IN2 setting
A A A A B B B B IN
DO pin control data (2)
IL1 IL0
IN
0
0
Open
0
1 The I3 pin state (unused)
1
0 The I2 pin state (unused)
1
1 The I1 pin state (unused)
3 2 1 0 3 2 1 0
0 0 1 0 1 0 0 1
Address Code
Normal operation
Stopped
Unlock detection switching
UL1 UL0 φE detection width Detection pin output
0
Stopped
0
Open
1
0
0
φE is output directly
0
±0.5µs φE is delayed by 1 to 2 ms.
1
1
±1µs
1
φE is delayed by 1 to 2 ms.
Dead zone control
DZ1 DZ0 Dead zone mode
0
0
DZA
0
1
DZB
1
0
DZC
1
1
DZD
L H L
L
L
LSB
0
1
0
Two-tuner
crystal oscillator
buffer switching
0
L
0 0 0 0 +5dB
0001
↓
Crystal oscillator selection
0010
↓ XS1 XS0
X'tal OSC
0011
↓
0
0
4.5MHz
0100
↓
0
1
7.2MHz
0101
↓
1
0
20.5MHz*
1
1
Illegal value
0110
↓
0111
↓ *Use of a 20.5MHz crystal
↓ requires a separate hardware
↓ modification.
1010
↓
2.7V REG ADJ
1011
↓
0 0 -23mV
↓
1100
0 1 (Center value)
↓
1101
1 0 +23mV
1110
↓
1 1 +64mV
1 1 1 1 -5dB
D2-00
L
(10)
0
X_SW_2
L
(11)
D2-01
D2-07
REG_ADJ0
L H L
(12)
D2-02
D2-08
XS0
REG_ADJ1
L
0
D2-09
XS1
L
0
D2-10
ADJ_W0
L
(13)
D2-03
D2-11
ADJ_W1
L
X_SW_0
D2-12
ADJ_W2
L
D2-04
D2-13
L
(14)
X_SW_1
D2-14
IL0
ADJ_W3
L
D2-05
D2-15
L
D2-06
D2-16
IL1
Normal operation
Stopped
IC test mode
These bits are
normally set to :
TEST0 = 0
TEST1 = 0
TEST2 = 0
L
(15)
IF gain
variation correction
IN2 D15-12
(Wide out side)
Charge pump
control
0
1
DT0
L
D2-17
L
DT1
L
D2-18
UL0
ULD
L
(17) (16)
D2-19
D2-20
L
D2-21
0
L
UL1
0
L
D2-22
D2-24
DZ0
L
TWO_DOFF
D2-25
DZ1
L
(19) (18)
D2-23
D2-26
DLC
TEST0
L
D2-27
TEST1
L
(20)
D2-28
D2-29
TEST2
MSB
D2-30
D2-31
L
(9)
IC internal signals
I/O ports
Control data
0 : input, 1 : output
Normally set to 0.
X'tal OSC ADJ
[When a 4.5MHz oscillator
element is used]
000
Xtal (Center value)
001
↓
010
↓
↓
011
100
↓
↓
101
110
↓
111
+150Hz
No.A0633-28/42
LV25400W
IN3-1 tuner setting 1
Address 69h, Subaddress[0]
FM AGC ON
0
1
Normal
ON
A A A A B B B B IN
3 2 1 0 3 2 1 0
AM AGC ON
0
1
Normal
ON
0
0 1 1 0 1 0 0 1
Sub Address Code
Address Code
D31-29
D31-28
D31-27
D31-26
D31-25
D31-24
D31-23
D31-22
D31-21
D31-20
D31-19
D31-18
D31-17
D31-16
D31-15
D31-14
D31-13
D31-12
D31-11
D31-10
D31-09
D31-08
D31-07
D31-06
D31-05
D31-04
D31-03
D31-02
D31-01
D31-00
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
(37) (27) (26) (25)
(24)
(23)
Wide-10.7MHz
(22)
LSB
D31-30
MSB
D31-31
L
(21)
Tuner off setting
0 ON
1 OFF
0 Normal operation
1 Tuner off
Narrow-10.7MHz
0 ON
1 OFF
IQ mixer gain adjustment
0
1
Gain Down
Normal operation
TEST for DAC
0:Normal
1:Test-Mode
ANT-DAC
000000000
000000001
000000010
000000011
000000100
000000101
000000110
000000111
000001000
111111010
111111011
111111100
111111101
111111110
111111111
0.3V
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
7.1V
RF-DAC
000000000
000000001
000000010
000000011
000000100
000000101
000000110
000000111
000001000
111111010
111111011
111111100
111111101
111111110
111111111
0.3V
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
7.1V
No.A0633-29/42
LV25400W
0
1
IN3-2 tuner setting 2
Address 69h, Subaddress [1]
FM PIN diode forced on switch
Keyed AGC switch
0
1
Wide+narrow
Narrow only
A A A A B B B B IN
Normal operation
Forced on
3 2 1 0 3 2 1 0
1
0 1 1 0 1 0 0 1
Sub Address Code
D32-28
D32-27
D32-26
D32-25
D32-24
D32-23
D32-22
D32-21
D32-20
D32-19
D32-18
D32-17
D32-16
D32-15
D32-14
D32-13
D32-12
D32-11
D32-10
D32-09
D32-08
D32-07
D32-06
D32-05
D32-04
D32-03
D32-02
D32-01
D32-00
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
(37) (36) (35)
(34)
(33)
IF AGC clamp variations
correction
IN3-2 D28-25
(narrow-out side)
(32)
Keyed AGC
threshold
0 0 0 0 1.0+VBE
↓
0001
↓
0010
↓
0011
↓
0100
↓
0101
↓
0110
↓
0111
↓
↓
↓
1010
↓
1011
↓
1100
↓
1101
↓
1110
1 1 1 1 2.5+VBE
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
S-Meter Shift(TSOUT)
11010
11011
11100
11101
11110
11111
(30)
AM RF AGC
amplifier threshold (gradual)
0 0 0 0 +5dB
0001
↓
0010
↓
0011
↓
0100
↓
0101
↓
0110
↓
0111
↓
↓
↓
1010
↓
1011
↓
↓
1100
↓
1101
1110
↓
1 1 1 1 -5dB
00000
00001
00010
00011
00100
00101
00110
00111
(31)
198µA(1.2V)
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
300µA(1.9V)
AM RF AGC
amplifier threshold (steep)
0000
0001
0010
0011
0100
0101
0110
0111
1010
1011
1100
1101
1110
1111
1.0
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
2.5
(29)
0.14
2.2
LSB
W_KEYED
FMFETOFF
MSB
D32-31
L
Address Code
(28)
FM/AM
W-AGC
Sensitivity
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0.14
2.57
FM/AM
N-AGC
Sensitivity
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0.14
2.5
No.A0633-30/42
LV25400W
Control Data Documentation
No.
Control block/data
(1)
Programmable divider data
P0 to P15
DVS
Description
Related data
AM/FM
• Sets the programmable divider's divisor.
This is a binary value in which P0 is the LSB, P15 the MSB.
OSC D1, D2
DVS = 0 : The IC internal FMIN pin is stopped (pulled down)
WB, OSC DIV
DVS = 1 : The IC internal FMIN pin is selected
Set divisor (N) : 272 to 65536
Input frequency range : 120 to 270 MHz
* : See the "Programmable Divider Structure" section for more information.
(2)
AM oscillator divisor control
• OSC D1, OSC D2−AM oscillator divisor control
OSC D1
OSC D2
Divisor
0
0
Divide by 10
0
1
Divide by 8
1
0
Divide by 6
1
1
Divide by 4
OSC D1, OSC D2
(3)
Tuner mode switching
AM/FM
P0 to P15
• Tuner mode switching between AM and FM
1 = AM
P0 to P15
0 = FM
OSC D1, D2
AM/FM
(4)
Programmable divider stop
DVS
• DVS = 0 : The IC internal PLL-IN pin is stopped (pulled down)
CTS
DVS = 1 : The IC internal PLL-IN pin is selected
GT0, GT1
Set divisor (N) : 272 to 65536
CTP
Input frequency range : 120 to 270 MHz
CTC
* : See the "Programmable Divider Structure" section for more information.
(5)
Reference divider data
• Selects the reference frequency.
Reference frequency setting (kHz)
R0 to R3
R3
R2
R1
R0
Crystal : 20.5MHz
Crystal : 4.5/7.2MHz
0
0
0
0
Illegal value
100
0
0
0
1
100
50
0
0
1
0
50
25
0
0
1
1
25
25
0
1
0
0
12.5
12.5
0
1
0
1
6.25
6.25
0
1
1
0
3.125
3.125
0
1
1
1
3.125
3.125
1
0
0
0
10
10
1
0
0
1
Illegal value
9
1
0
1
0
5
5
1
0
1
1
1
1
1
1
0
0
Illegal value
3
1
1
0
1
Illegal value
30
1
1
1
0
Illegal value
Illegal value
1
1
1
1
Illegal value
Illegal value
Continued on next page.
No.A0633-31/42
LV25400W
Continued from preceding page.
No.
(6)
Control block/data
Tuner mode switching
Description
(1) AM/FM/WB oscillator divisor control
WB
OSC DIV
Divisor
0
0
Divide by 2
0
1
Divide by 3
OSC_DIV
1
0
Divide by 1
WB
1
1
Divide by 1
AM/FM oscillator divisor
Related data
P0 to P15
DVS
* : WB: Select 1 for weather band reception
(2) AM oscillator divisor control
OSD D2
OSC D1
Divisor
0
0
Divide by 10
1
0
Divide by 8
0
1
Divide by 6
1
1
Divide by 4
In FM mode, only the WB and OSC DIV bits are valid.
In AM mode, this function is set up by combination of the OSC D2, OSC (however, this is
fixed at the divide-by-2 setting) D1, WB, and the OSC DIV bits.
FM (Japan) : Fixed at the divide-by-3 setting
FM (other regions) : Fixed at the divide-by-2 setting
WB : Fixed at the divide-by-1 setting (OK if WB = 1)
In AM mode, set WB = 0, OSC DIV = 0 for the divide-by-2 setting.
The OSC D2 and OSC D1 bits can be set according to end product needs.
Example : USA : (1) <divide by 2> × (2) <divide by 10> = divide by 20
SW2 : (1) <divide by 2> × (2) <divide by 4> = divide by 8
(7)
FM IQ mixer phase
• FM IQ mixer phase adjustment
adjustment
OSC_DIV
FM-IQMIX phase_Adjust
DELAY_ADJ0
DELAY_ADJ1
Adjustment amount
DELAY_ADJ0
0
0
Small
DELAY_ADJ1
0
1
↓
1
0
↓
1
1
Large
Continued on next page.
No.A0633-32/42
LV25400W
Continued from preceding page.
No.
(8)
Control block/data
PLL filter switching mode
Description
Related data
• Switches the PLL filter
AM/FM
PLL filter switching
MODE
Filter state
MODE
Normal
0
W-FILTER
1
AM/FM
AM filter
0
OFF
ON
1
ON
OFF
ON
ON
0
1
FM filter
Normal mode (MODE = 0)
The filter state is switched in conjunction with the AM/FM bit.
FM mode (AM/FM = 0)
A filter is formed on pins 8 and 11.
Since this filter can be independent of the filter used in AM mode, PLL locking can be
fast.
AM mode (AM/FM = 1)
A filter is formed on pins 9 and 10 and with the two internal switches SW1 and SW2.
An additional filter is added using an internal resistor and an external capacitor.
W-filter mode (MODE = 1)
Both filters are enabled, regardless of the AM/FM bit.
(All of pins 8, 9, 10, and 11, and switches SW1 and SW2 are used.)
This is used when sidebands occur in AM mode, and in other cases.
However, there are case where, depending on the particular filter component values,
this mode cannot be used.
VDD
PIN23
+8V
PIN58
CP1
3kΩ
SW2
5kΩ
div
1kΩ
SW3
FM OSC
I/O ports
Control data
10
11
FM_CP
9
AM_CP
C7
0.033µF
8
AM_FET_OUT
7
FM_FET_OUT
6
FET_GND
C4
3pF
C11A
0.033µF
C10A
1µF
R7
30kΩ
D5
SVC704
L5
IC internal signals
5
VT
C3
2pF
C4
330pF
(9)
SW1
4
OSC_C
OSC_B
3
C11
1.3kΩ
C12
2.2kΩ
C11B
2200pF
• Specifies the I/O direction for the I/O ports
Data = 0 : Input port. The value 0 should be specified in normal operation.
= 1 : Output port. A value of 1 is used for IC testing.
* : This data must be set to 0 at all times other than IC evaluation.
Normally set to 0.
(10)
Crystal oscillator fine
• Adjusts the crystal 4.5 MHz reference frequency if beating occurs
adjustment
XS0, XS1
R0 to R3
X’tal OSC ADJ [When a 4.5MHz oscillator element is used]
X_SW_0
000
Xtal (Center value)
X_SW_1
001
↓
X_SW_2
010
↓
011
↓
100
↓
101
↓
110
↓
111
+150Hz
Continued on next page.
No.A0633-33/42
LV25400W
Continued from preceding page.
No.
(11)
Control block/data
2.7V REG
Description
Related data
• Adjusts the 2.7 V regulator
ADJ
2.7V REG ADJ
(12)
REG_ADJ0
00
-23mV
REG_ADJ1
01
(Center value)
10
+23mV
11
+64mV
Crystal oscillator selection
XS0, XS1
(13)
HD (wide) IF AGC amplifier
• Selects the crystal element.
XS1
XS0
0
0
X’tal OSC
4.5MHz
0
1
Illegal value
1
0
Illegal value
1
1
Illegal value
• Corrects for sample-to-sample variations in the IF AGC amplifier gain
variation correction bits
Amount of correction : ±5 dB
ADJ_W0
ADJ_W1
4 bit
ADJ_W2
ADJ_W3
(14)
DO pin control data (2)
• Controls the DO pin output
DO pin control data (2)
IL0, IL1
IL1
IL0
0
0
Open
IN
0
1
The I3 pin state (unused)
1
0
The I2 pin state (unused)
1
1
The I1 pin state (unused)
Since there are no connected pins in the current product, the open setting must be
used.
(15)
DO pin control data (1)
• Determines the DO pin output.
UL0, UL1
DO pin control data (1)
ULD
DT0, DT1
ULD
IL0
DT0
DO pin
0
0
0
Low when not locked.
0
1
1
Monitor 1 (unused)
1
0
0
Monitor 2 (unused)
1
1
1
(See DO control (2))
1
0
0
Open
1
0
1
Monitor 1 (unused)
1
1
0
Monitor 2 (unused)
1
1
1
(See DO control (2))
The following item (5) must also be set when monitoring the unlock detection signal.
Unlock state detection data
• Selects the phase error (øE) detection width used to judge the PLL locked state.
If a phase error in excess of the øE detection width from the table below occurs, the
DT0, DT1
PLL is seen as being in the unlocked state.
When the PLL is seen as being unlocked, the detection pin (DO) is set low.
φE detection width
UL1
UL0
0
0
Stopped
Open
0
1
0
φE is output directly
1
0
±0.5µs
φE is delayed by 1 to 2 ms.
1
1
±1µs
φE is delayed by 1 to 2 ms.
φE
DO
≈
UL0, UL1
ULD
Detection pin output
Delay
1 to 2ms
≈
(16)
Unlock state output
Continued on next page.
No.A0633-34/42
LV25400W
Continued from preceding page.
No.
Control block/data
(17)
Crystal oscillator buffer
• Stops the crystal oscillator buffer output.
Description
output stop switching
1 bit
Related data
Two-tuner crystal oscillator
buffer switching
TWO_DOFF
(18)
Phase comparator control
0
Normal operation
1
Stopped
• Controls the phase comparator's dead zone.
data
DZ0, DZ1
DZ1
DZ0
Dead zone mode
0
0
DZA
0
1
DZB
1
0
DZC
1
1
DZD
The DZA setting is selected after the power-on reset.
(19)
Charge pump control data
• Forcibly sets the charge pump output to the low level (VSS level).
DLC = 1 : Low level
DLC
DLC = 0 : Normal operation
* : If the IC deadlocks with VCO oscillator stopped with the VCO control voltage (Vtune) at
0 V, the deadlock can be resolved by setting the charge pump output to the low level
and setting Vtune to VCC.
This item is set to the normal operation state after the power-on reset.
(20)
IC internal signal I/O port
• Specifies the I/O direction for the I/O ports
control data
Data = 0 : Input port. The value 0 should be specified in normal operation.
= 1 : Output port. A value of 1 is used for IC testing.
* : This data must be set to 0 at all times other than IC evaluation.
(21)
RF tuning D/A converter
• Applies a control voltage to the RF tuning circuit (varactor).
output
(22)
(23)
D31-00 to D31-08
9 bit
Tuner off setting
• Set the IC to tuner off mode.
D31-09
1 bit
Antenna tuning D/A
Tuner OFF mord
0
Normal operation
1
Tuner-OFF
• Applies a control voltage to the antenna tuning circuit (varactor).
converter output
9 bit
D31-10 to D31-18
(24)
IF AGC amplifier
• Operates the IF AGC amplifier circuit (narrow/wide).
(narrow/wide) on/off
switching
D31-25 : wide-10.7MHz 0 = ON , 1 = OFF
D31-26 : narrow-10.7MHz 0 = ON , 1 = OFF
D31-25
(25)
D31-26
Each 1 bit
Forced AGC (AM/FM)
• Operates the forced AGC circuit (narrow/wide).
switching
D31-27:FM AGC 0 = NORMAL, 1 = ON
D31-27
D31-28:AM AGC 0 = NORMAL, 1 = ON
D31-28
Each 1 bit
(26)
IQ mixer gain adjustment
• Switches the FM IQ mixer gain.
D31-29
1 bit
IQ mixer gain adjustment
0
Gain Down
1
Normal operation
(27)
(28)
AM/FM wide AGC setting
• Sets the AM/FM wide AGC sensitivity.
D32-0 to D32-3
4 bit
Continued on next page.
No.A0633-35/42
LV25400W
Continued from preceding page.
No.
Control block/data
(29)
AM/FM narrow AGC setting
• Sets the AM/FM narrow AGC sensitivity.
Description
Related data
D33-4 to D33-7
4 bit
(30)
Keyed AGC setting
• Controls the FM keyed AGC sensitivity.
D32-8 to D32-11
4 bit
(31)
AM RF AGC amplifier
• Sets the AM RF AGC amplifier circuit threshold (steep).
threshold (steep) setting
4 bit
D32-12 to D32-15
(32)
• Sets the AM RF AGC amplifier circuit threshold (gradual).
AM RF AGC amplifier
threshold (gradual) setting
4 bit
D32-16 to D32-19
(33)
S-meter shifter control
• Controls the FM S-meter shifter circuit output value.
D32-20 to D32-24
5 bit
(34)
Analog (narrow) IF AGC
• Corrects the sample-to-sample variations in the IF AGC clamp circuit.
clamp variations correction
Amount of correction : ±5 dB
D32-25 to D32-28
4 bit
(35)
FM PIN diode forced on
• Forcibly sets the FM PIN diode to the on state.
state bit
1 bit
FMFETOFF
(36)
Keyed AGC connection
• Modifies the keyed AGC connection circuit.
circuit selection
1 bit
Keyed AGC switch
W_KEYED
(37)
D31-31
0
Wide + narroww
1
Narrow only
• Sub-code address
D32-31
Each 1 bit
Programmable Divider Structure
4 bits
12 bits
fvco/N
FMIN
Swallow
Counter
DVS
Programmable
Divider
PD
φE
ferf
fvco = ferf × N
DVS
Set divisor (N)
Input frequency range (f (MHz))
IC internal FMIN pin
1
272 to 65535
120 ≤ f ≤ 270
Selected
0
-
-
Stopped
* : Since the IC is closed internally, the input sensitivity is not specified.
No.A0633-36/42
LV25400W
Phase Comparator and Charge Pump Circuits
(1) Phase comparator and charge pump operation
In the PLL circuit block shown in figure 1, the phase comparator compares the phases of the reference frequency (fr)
and the comparison frequency (fp), and outputs the amount of the phase difference from the charge pump.
Figure 1 PLL Circuit Block
RF
Mixer
Leakage during
strong-field input
fr
Reference Divider
Phase
Detector
Programmable Divider
Charge
Pump
LPF
VCO
fp
Figure 2 shows the phase comparator/charge pump output characteristics. The phase comparator outputs a voltage Vφ
that is proportional to the phase difference φ between fr and fp. The phase comparator's characteristics can be
switched by changing the phase comparator dead zone mode setting. The phase comparator can be set to modes (DZA,
DZB) in which both the charge pump p-channel and n-channel sides are turned on when the phase difference is small,
or can be set to a mode (DZD) that does not output the phase difference when the phase difference is small.
Figure 2 Phase Comparator/Charge Pump Characteristics
Vφ[V]
Vφ[V]
fp > fr
D ZA
mode
fp > fr
D ZB
mode
φ err[ns]
fr > fp
Dead Zone(--)
φ err[ns]
Vφ[V]
D ZC
mode
Dead Zone(-)
fr > fp
Vφ[V]
fp > fr
D ZD
mode
φ err[ns]
fp > fr
φ err[ns]
fr > fp
Dead Zone ≈ 0
fr > fp
Dead Zone(+)
No.A0633-37/42
LV25400W
(2) Dead zone mode characteristics
The table below presents an overview of the characteristics in each of the dead zone modes.
Setting
Dead zone mode
Charge pump (p/n-channel) state at 0 phase
Dead zone width (for
difference
reference purposes)
DZ1
DZ0
0
0
DZA
On/on
- -(-15[ns])
0
1
DZB
On/on
- (-8[ns])
1
0
DZC
On or off
1
1
DZD
Off/off
Close to 0 (0[ns])
Notes
Illegal setting
+ (+8[ns])
(3) Dead zone mode characteristics and selection criteria
This section describes the characteristics of each dead zone mode and the criteria for selecting that mode.
(1) DZA mode
In DZA mode, the correction signal is output from the charge pump even if the reference frequency (fr) and
comparison frequency (fp) match. This results in excellent signal-to-noise ratio characteristics. However, due to
the generation of reference frequency component sidebands, beating may occur in the presence of a strong input
signal. This is because the PLL loop responds sensitively to leakage components from the RF stage through the
mixer and this modulates the VCO.
(2) DZB mode
Like DZA mode, in DZB mode the correction signal is output from the charge pump even if the reference
frequency (fr) and comparison frequency (fp) match. However, the correction signal voltage is lower in DZB
mode than in DZA mode. The feature of this mode is that it provides a better signal-to-noise ratio than DZC or
DZD mode yet is less susceptible to beating than DZA mode.
(3) DZC mode
In DZC mode, a correction signal proportional to the phase difference between the reference frequency (fr) and
comparison frequency (fp) is output from the charge pump. A small amount of noise may occur when the phase
difference is close to 0 ns. Since the signal-to-noise ratio may degrade significantly at low temperatures (under
-30°C), this mode should not be used.
(4) DZD mode
In DZD mode, a correction signal proportional to the phase difference between the reference frequency (fr) and
comparison frequency (fp) is output from the charge pump. The correction signal is not output when the phase
difference is in the vicinity of ± <a few ns>. As a result the signal-to-noise ratio is worse than the other modes, but
the occurrence of beating is suppressed.
No.A0633-38/42
LV25400W
LV25400W bit control specification: reference values
1. FM S-Meter shifter
LSB
MSB
D32-20
D32-21
D32-22
D32-23
D32-24
Functions
0
0
0
0
0
Vsm (DC) =1.87V : +5.6dB
0
0
0
0
1
Vsm (DC) = 2.15V : 0dB
1
1
1
1
1
Vsm (DC) = 2.45V : -6.0dB
↑
↓
2-1. FM IFAGC (HD)
LSB
2-2. AM IFAGC (HD)
MSB
LSB
0
IFAGC (HD) -Amp-Gain : +4dB
D2-15
D2-15
0
D2-14
D2-14
0
D2-13
D2-13
0
D2-12
D2-12
Functions
MSB
Functions
0
0
0
0
IFAGC (HD) -Amp-Gain : +4dB
1
1
0
1
IFAGC (HD) -Amp-Gain : 0dB
1
1
1
1
IFAGC (HD) -Amp-Gain : -4dB
↑
1
1
0
1
IFAGC (HD) -Amp-Gain : 0dB
1
1
1
1
IFAGC (HD) -Amp-Gain : -4dB
↑
↓
3-1. FM IFAGC (Analog)
LSB
↓
3-2. AM IFAGC (Analog)
MSB
LSB
0
IFAGC (Analog) -Amp-Gain : +4dB
D32-28
D32-28
0
D32-27
D32-27
0
D32-26
D32-26
0
D32-25
D32-25
Functions
MSB
Functions
0
0
0
0
IFAGC (Analog) -Amp-Gain : +4dB
1
1
0
1
IFAGC (Analog) -Amp-Gain : 0dB
1
1
1
1
IFAGC (Analog) -Amp-Gain : -4dB
↑
1
1
0
1
IFAGC (Analog) -Amp-Gain : 0dB
1
1
1
1
IFAGC (Analog) -Amp-Gain : -4dB
↑
↓
4-1. FM Wide-AGC-ON-Level
LSB
↓
4-2. AM Wide-AGC-ON-Level
MSB
LSB
0
Wide-AGC-ON-Level : -8.5dB
D32-03
D32-03
0
D32-02
D32-02
0
D32-01
D32-01
0
D32-00
D32-00
Functions
MSB
Functions
0
0
0
0
Wide-AGC-ON-Level : -8.5dB
1
1
1
0
Wide-AGC-ON-Level : 0dB
1
1
1
1
Wide-AGC-ON-Level : +7.0dB
↑
1
1
1
0
Wide-AGC-ON-Level : 0dB
1
1
1
1
Wide-AGC-ON-Level : +5.5dB
↑
↓
5-1. FM Narrow-AGC-ON-Level
LSB
↓
5-2. AM Narrow-AGC-ON-Level
MSB
LSB
0
Narrow-AGC-ON-Level : -9.5dB
D32-07
D32-07
0
D32-06
D32-06
0
D32-05
D32-05
0
D32-04
D32-04
Functions
MSB
Functions
0
0
0
0
Narrow-AGC-ON-Level : -9.0dB
1
1
1
0
Narrow-AGC-ON-Level : 0dB
1
1
1
1
Narrow-AGC-ON-Level : +5.0dB
↑
1
1
1
0
Narrow-AGC-ON-Level : 0dB
1
1
1
1
Narrow-AGC-ON-Level : +6.5dB
↑
↓
↓
6-1. Keyed-AGC-ON-Level
LSB
MSB
D32-08
D32-09
D32-10
D32-11
Functions
0
0
0
0
Keyed-AGC-ON V32 : 0.27V
1
1
1
0
Keyed-AGC-ON V32 : 1.20V
1
1
1
1
Keyed-AGC-ON V32 : 2.25V
↑
↓
No.A0633-39/42
LV25400W
Data content
LV25400W (AC/DC) Serial data
A7
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
OSC_D1
OSC_D2
AM/FM
DVS
R0
R1
R2
R3
OSC_DIV
WB
DELAY_ADJ0
DELAY_ADJ1
MODE
----
----
----
0
0
0
1
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
2176
33 MW1000k fref = 10k (USA)
0
0
0
1
0
1
0
0
0
0
0
1
0
1
1
0
1
1
0
1
1
0
1
0
0
0
1
1
0
0
0
1
0
0
0
0
0
0
0
0
23400
0
62 X45FM_US98.1M fref = 100k
0
0
0
1
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
2176
0
69 X45FM_JP83M fref = 100k
0
0
0
1
0
1
0
0
1
0
0
1
1
1
1
0
0
0
0
1
0
0
0
0
0
0
0
1
0
0
0
0
1
0
1
0
0
0
0
0
2169
1
Data contents
PLL
Counter
value
Delay-Adj
A6
15 FM_US98.1M fref = 100k
IN1
A5
Control data 4
A4
Control data 3
A3
Control data 2
A2
Control data 1
A1
CCB address
A0
PLL IN1 data
0
Delay = 1
ADJ_W3
IL0
IL1
DT0
DT1
ULD
UL0
UL1
TWO_DOFF
----
----
DZ0
DZ1
DLC
TEST0
TEST1
TEST2
X'tal-Adj
IFAGC-Amp
Gain (HD)
0
1
0
0
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
6
11
1
0
1
0
0
1
1
0
1
0
0
0
0
0
1
1
0
1
0
0
1
0
0
0
0
6
11
44 X45 MW reception mode
1
0
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
1
0
1
0
0
0
0
0
1
1
0
1
0
0
1
0
0
0
0
0
11
48 X45X'tal_ADJ = 0
1
0
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
11
50 X45Xtal_ADJ = 7 (IF_Dain_W
1
0
0
1
0
1
0
0
0
0
0
0
0
1
1
1
0
1
0
0
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
7
11
REG_ADJ0
1
1
X_SW_2
1
0
X_SW_1
0
0
X_SW_0
0
0
I/O-5
0
0
I/O-4
0
0
I/O-3
0
0
I/O-2
0
0
I/O-1
0
0
A7
0
1
A6
1
0
A5
0
1
A4
1
0
A3
0
0
A2
0
1
A1
1
15 MW reception mode settings
Data contents
A0
13 FM reception mode settings
IN2
ADJ_W2
Control data 4
ADJ_W1
Control data 3
XS1
Control data 2
ADJ_W0
Control data 1
XS0
CCB address
REG_ADJ1
PLL IN2 data
settings
= 11)
A6
A7
RFDAC0
RFDAC1
RFDAC2
RFDAC3
RFDAC4
RFDAC5
RFDAC6
RFDAC7
RFDAC8
TUNEROFF
ANTDAC0
ANTDAC1
ANTDAC2
ANTDAC3
ANTDAC4
ANTDAC5
ANTDAC6
ANTDAC7
ANTDAC8
ANC_OFF
NC_AGC_SW
NOISE_AGC
AGC_LIMIT
NC_SENS0
NC_SENS1
WIDE_OFF
NARROW_OFF
FMAGC_ON
AMAGC_ON
IQMIX-Gain
DTESTSW
Sub-Address
RF-DAC
ANT-DAC
1 Bit-Check-0
1
0
0
1
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2 Bit-Check-1
1
0
0
1
0
1
1
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
3 Bit-Check-2
1
0
0
1
0
1
1
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
2
5 Bit-Check-4
1
0
0
1
0
1
1
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
4
7 Bit-Check-8
1
0
0
1
0
1
1
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
8
9 Bit-Check-16
1
0
0
1
0
1
1
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16 16
11 Bit-Check-32
1
0
0
1
0
1
1
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
32 32
13 Bit-Check-64
1
0
0
1
0
1
1
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
64 64
15 Bit-Check-128
1
0
0
1
0
1
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
128 128
17 Bit-Check-256
1
0
0
1
0
1
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
256 256
18 Bit-Check-511
1
0
0
1
0
1
1
0
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
511 511
25 Standard FM
1
0
0
1
0
1
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
0
0
256 256
26 Standard AM
1
0
0
1
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
27 FM-Wide-OFF
1
0
0
1
0
1
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
256 256
38 FM-IQMIX-GAIN-UP
1
0
0
1
0
1
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
256 256
W_KEYED
Sub-Address
0
0
IFAGC-Amp Gain
(Analog)
FM-S-meter Shifter
Narrow-AGC
Keyed-AGC
AM-RFAGC Hard
AM-RFAGC Soft
Wide-AGC
ADJ_N3
FMFETOFF
ADJ_N2
ADJ_N1
ADJ_N0
S_METER4
S_METER3
Control data 4
S_METER2
S_METER1
S_METER0
RFAGC_S3
RFAGC_S2
RFAGC_S1
RFAGC_S0
RFAGC_H3
Control data 3
RFAGC_H2
RFAGC_H1
KEY_AGC3
RFAGC_H0
KEY_AGC2
KEY_AGC1
KEY_AGC0
N_AGC3
Control data 2
N_AGC2
N_AGC1
N_AGC0
W_AGC3
W_AGC2
W_AGC1
W_AGC0
A7
Control data 1
A6
A5
A4
A1
Data contents
CCB address
A0
IN3-2
PLL IN3-2 data
A3
Data contents
A2
IN3-1
A5
Control data 4
A4
Control data 3
A3
Control data 2
A2
Control data 1
A1
CCB address
A0
PLL IN3-1 data
13 FM (W-AGC-Bit = 0)
1
0
0
1
0
1
1
0
0
0
0
0
1
1
1
0
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
0 7 7 0 0
15
0
15 FM (W-AGC-Bit = 15)
1
0
0
1
0
1
1
0
1
1
1
1
1
1
1
0
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
15 7 7 0 0
15
0
16 FM (N-AGC-Bit = 0)
1
0
0
1
0
1
1
0
1
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
7 0 7 0 0
15
0
18 FM (N-AGC-Bit = 15)
1
0
0
1
0
1
1
0
1
1
1
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
7 15 7 0 0
15
0
25 Standard FM-2
1
0
0
1
0
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
0
0
0
0
0
0
0
0
*
*
*
*
*
1
1
0
1
0
1
1
7 7 7 0 0
Adjust-
11
ment
26 Standard AM-2
1
0
0
1
0
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
0
1
0
0
0
1
0
1
1
1
1
1
0
1
1
0
1
0
0
1
7 7 7 2 10
15
27 AM (W-AGC-Bit = 0)
1
0
0
1
0
1
1
0
0
0
0
0
1
1
1
0
1
1
1
0
0
1
0
0
0
1
0
1
1
1
1
1
0
1
1
0
1
0
0
1
0 7 7 2 10
15
11
11
29 AM (W-AGC-Bit = 15)
1
0
0
1
0
1
1
0
1
1
1
1
1
1
1
0
1
1
1
0
0
1
0
0
0
1
0
1
1
1
1
1
0
1
1
0
1
0
0
1
15 7 7 2 10
15
11
30 AM (N-AGC-Bit = 0)
1
0
0
1
0
1
1
0
1
1
1
0
0
0
0
0
1
1
1
0
0
1
0
0
0
1
0
1
1
1
1
1
0
1
1
0
1
0
0
1
7 0 7 2 10
15
11
32 AM (A-AGC-Bit = 15)
1
0
0
1
0
1
1
0
1
1
1
0
1
1
1
1
1
1
1
0
0
1
0
0
0
1
0
1
1
1
1
1
0
1
1
0
1
0
0
1
7 15 7 2 10
15
11
Items marked with an asterisk are Vsm adjustment items. The bit values after adjustment must be retained.
No.A0633-40/42
R63
C63 100Ω
0.1µF
VCD1
SVC208
Pin_D2
1SV251
R107B
100kΩ
R107A
100kΩ
100pF
C37
0.022µF
R62
180Ω
C64
1000pF
C58
30Ω
C57
1000pF
R70B
470Ω
C107
1000pF
R62
100kΩ
C107
1000pF
coil
C49
0.022µF
L72
54
IN1
C61
10pF FM_MIX1
0.1µF AM_MIX
60
C64 +
2.2µF
C64
220kΩ
FM_RF_AGC
64
1
RF AGC
SW
6
7
C7
0.01µF
VT
R5
30kΩ
OSC_B
OSC_VCC
C5
220pF
FET_GND
KV1862
R11
8
SW 10kΩ
3kΩ
38
37
FM
amp
AM
amp
FM
amp
AM
amp
11
12
C11B
2200pF
C11A
R12 0.033µF
2.2kΩ
10
R11
1.3kΩ
C10A
1µF
9
CP1
13
XTAL_OSC
XTAL_VCC
C12
0.1µF
4.5M
15
bus
8
270Ω
270Ω
HD_OUTP
HD_OUTN
AGC_DAC_I
CE
DI
CL
DO
30Ω
VCC
C107
0.1µF
DI
TEST
1
2
3
4
30kΩ
CS
SK
DO
GND
NC
VCCD5V
C22
1µF
XTAL_OSC
17
OUT2
18
19
20
21
VCCD5V
22
23
C23
VREG 3V 0.22µF
24
270Ω
10.7OUTN
AGC_DAC_S
270Ω
10.7OUTP
DIV_OUT_IF
C24
VREG 4V 0.22µF
25
26
27
28
29
30
31
VSM_DC C32
0.22µF
32 R32
15kΩ
EEPROM
XTAL_GND
7
6
5
16
BUFF
VREG3
VREG4
C15
C14
10pF 15pF
C13A
0.022µF
14
BUFF
33
VREG27
BUFF
+
-
34
Analos-IF AGC
35
iBoc-IF AGC
36
swallow programable phase reference
counter
divider
detecter counter
IN1/IN2
IN3-2
IN3-1
AM_CP
330pF
5
OSC
BUFFER
+8V
1/10,1/8
1/6,1/4
K AGC
39
FM_CP
C2B
1000pF
OSC_C
C3
C4
2pF
3pF
C34
FM OSC
3
4
div
AM MIX
N AGC
W AGC
VSM
40
DGND
C3G
1pF
2
IQ MIX
ANT d
N AGC
ANT D
57 RF_DAC
FE_VCC8V
58
C58B
0.022µF
AM_MIX
59
IN2
C59
RF_DAC
55
MIX_OUT2
ANT_DAC
R72
56 ANT_DAC
30kΩ
C54
MIX_OUT1
51
+
BYPASS
AM_ANT_D
52
C53
30pF N_AGC
53
61
IN
C1000
8pF FM_MIX2
62
IN
VCD2 C62
SVC208 10pF
FM_ANTD
63
C58A +
100µF
R57
30kΩ
C60
0.022µF
15pF
36pF
41
C35
C34
C33
0.022µF 0.022µF 0.1µF
XTAL_OUT
VCC8V
0.15µH
R56
30kΩ
C56
1000pF
C103 C105
4pF 5pF
D70
1SV251
C36
10µF
+
AM 1st AMP
ADDRESS_SW
C101
18pF
Loding coil
C35
0.022µF
R70A
1M
W AGC
RF AGC
+
-
42
VSM_AC
FM_IN
AM_IN
FM cut
6.8µH
RF_AGC
AM_WAGO
C51
1µF
IF_N_IN2
47µH
VREG49
CPH5905
L70B
IF_N_IN1
L70A
1mH
IF_OUT
43
R38
30kΩ
C38
1000pF
C40B
0.022µF
VREG27
R70C
220Ω
44
AM_NAGC
VREG49
VCCA5V
45
AM_HD_IN
49
C49
0.022µF
AM_RF_AGC
50
46
R41B
AGND
47
R41
3.9kΩ
AM_ANALOG_IN
48
C44
0.1µF
C40A +
10µF
AM_HD_IN
BYPASS
IF_W_IN2
C47
0.022µF
C46
0.022µF
XTAL_6k or 16k
AM_ANALOG_IN
BYPASS
R63
470Ω
CF_180k
R43
1.8kΩ
270Ω
VCCA5V
C17
0.022µF
C27
0.022µF
C28
0.022µF
C29
0.022µF
C30
0.022µF
C31
0.022µF
M_COM
CS
XTAL_OSC
OUT2
CE
DI
CL
47kΩ
DO
AGC_DAC_I
AGC_DAC_S
HD_OUT_M
HD_OUT_P
10.7M_OUT_M
10.7M_OUT_P
DIV_OUT_IF
LV25400W
Sample Application Circuit
XTAL_IN
AM_FET_OUT
FM_FET_OUT
FE_GND
No.A0633-41/42
LV25400W
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
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semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
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to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
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In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
controlled under any of applicable local export control laws and regulations, such products may require the
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Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
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intellctual property rights which has resulted from the use of the technical information and products mentioned
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This catalog provides information as of May, 2007. Specifications and information herein are subject
to change without notice.
PS No.A0633-42/42