Maxim MAX3023 1.2v to 3.6v, 0.1î¼a, 100mbps, single-/dual-/quad-level translator Datasheet

19-3266; Rev 2; 12/04
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Features
♦ 100Mbps Guaranteed Data Rate
♦ Bidirectional Level Translation
MAX13013 (Single)
MAX13014 (Dual)
MAX3023 (Quad)
♦ VL Operation Down to +1.2V
♦ Ultra-Low 0.1µA Supply Current When Disabled
♦ Low-Quiescent Current (0.1µA)
♦ UCSP, SC70, SOT23, and TSSOP Packages
The MAX13013/MAX13014/MAX3023 single-/dual-/quadlevel translators provide the level shifting necessary to
allow 100Mbps data transfer in a multivoltage system.
Externally applied voltages, VCC and VL, set the logic
levels on either side of the device. Logic signals present
on the VL side of the device appear as a higher voltage
logic signal on the VCC side of the device, and viceversa.
The MAX13013 single-, the MAX13014 dual-, and the
MAX3023 (UCSP™ package) quad-level translators feature an enable (EN) input. The MAX3023 (TSSOP package) quad-level translator features EN and EN inputs.
When disabled, each device places all inputs/outputs
on both sides in tri-state and reduces the VCC supply
current to 0.03µA, and the VL supply current to 0.1µA.
These devices operate at a guaranteed 100Mbps data
rate for VL > 1.8V.
The MAX13013/MAX13014/MAX3023 accept a +1.65V
to +3.6V VCC voltage and a +1.2V to (VCC - 0.4V) VL
voltage, making them ideal for data transfer between
low-voltage ASICs/programmable logic devices (PLDs)
and higher voltage systems. The MAX13013 is available in 3 x 2 UCSP and 6-pin SC70 packages. The
MAX13014 is available in 3 x 3 UCSP and 8-pin SOT23
packages. The MAX3023 is available in 4 x 3 UCSP
and 14-pin TSSOP packages. All devices operate over
the extended -40°C to +85°C temperature range.
Pin Configurations
TOP VIEW
VCC 1
GND 2
6
MAX13013
5
1
2
3
VCC
I/O VCC1
GND
A
EN
VL
MAX13013
B
I/O VCC1 3
4
VL
I/O VL1
I/O VL1
EN
3 x 2 UCSP
TOP VIEW
(BUMPS ON BOTTOM OF DIE)
SC70
Typical Operating Circuit
Applications
+1.8V
+3.3V
0.1µF
CMOS Logic-Level Translation
Low-Voltage ASIC Level Translation
VL
+1.8V
SYSTEM
CONTROLLER
Cell Phones
SPI™, MICROWIRE™ Level Translation
Portable POS Systems
Portable Communication Devices
0.1µF
VCC
+3.3V
SYSTEM
MAX13014
CLK
I/O VL1
I/O VCC1
CLK
DATA
I/O VL2
I/O VCC2
DATA
GND
GND
GND
GPS
Telecommunications Equipment
Ordering Information/Selector Guide
PART
MAX13013EXT
TEMP RANGE
PIN-PACKAGE
PACKAGE
CODE
TOP
MARK
NUMBER OF
VL → VCC
TRANSLATORS
Number of
VCC → VL
TRANSLATORS
EN
EN
-40°C to +85°C
6 SC70
—
ACD
1
1
✓
—
MICROWIRE is a trademark of National Semiconductor Corp.
SPI is a trademark of Motorola, Inc.
UCSP is a trademark of Maxim Integrated Products, Inc.
Pin Configurations continued at end of data sheet.
Ordering Information/Selector Guide continued at end of
data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX13013/MAX13014/MAX3023
General Description
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
ABSOLUTE MAXIMUM RATINGS
All voltages are referenced to GND.
VCC ...........................................................................-0.3V to +4V
VL...........................................................................................-0.3V to +4V
I/O VCC_......................................................-0.3V to (VCC + 0.3V)
I/O VL_ ...........................................................-0.3V to (VL + 0.3V)
EN, EN...........................................................-0.3V to (VL + 0.3V)
Short-Circuit Duration I/O VL_,
I/O VCC_ to GND ....................................................Continuous
Continuous Power Dissipation (TA = +70°C)
6-Pin SC70 (derate 3.1mW/°C above +70°C) ..............245mW
6-Bump UCSP (derate 3.9mW/°C above +70°C).........308mW
8-Bump UCSP (derate 4.7mW/°C above +70°C).........379mW
8-Pin SOT23 (derate 9.1mW/°C above +70°C)............727mW
12-Bump UCSP (derate 6.5mW/°C above +70°C) ...518.8mW
14-Pin TSSOP (derate 9.1mW/°C above +70°C) .........727mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +1.65V to +3.6V, VL = +1.2V to (VCC - 0.4V), EN = VL, EN = open (MAX3023 TSSOP package only), CIOVL ≤ 15pF, CIOVCC ≤ 40pF,
TA = TMIN to TMAX. Typical values are at TA = +25°C.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER SUPPLY
VL Supply Range
VCC Supply Range
Supply Current from VCC
Supply Current from VL
VCC Tri-state Output-Mode
Supply Current
VL
1.2
VCC
1.65
IQVCC
IQVL
ITS-VCC
VL Tri-state Output-Mode Supply
Current (MAX13013/MAX13014)
ITS-VL
VL Tri-state Output-Mode Supply
Current (MAX3023 TSSOP
Package Only)
ITS-VL
I/O Tri-state Output-Mode
Leakage Current
2
VCC - 0.4
V
3.60
V
µA
I/O VCC_ = 0, I/O VL_ = 0
or I/O VCC_ = VCC, I/O VL_ = VL
0.1
1
I/O VCC_ = 0, I/O VL_ = 0
or I/O VCC_ = VCC, I/O VL_ = VL
0.2
2
I/O VCC_ = 0, I/O VL_ = 0
or I/O VCC_ = VCC, I/O VL_ = VL,
VL < VCC - 0.2V
10
100
TA = +25°C, EN = 0
0.03
1
TA = +25°C, EN = 0
µA
0.1
0.2
TA = +25°C, EN = 0, VL = VCC - 0.2V
1
2
TA = +25°C, EN = 0
50
70
TA = +25°C, EN = 0, VL = VCC - 0.2V
55
74
µA
µA
µA
TA = +25°C, EN = 0
TA = +25°C, EN = 0, VL = VCC - 0.2V
_______________________________________________________________________________________
0.15
20
µA
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
(VCC = +1.65V to +3.6V, VL = +1.2V to (VCC - 0.4V), EN = VL, EN = open (MAX3023 TSSOP package only), CIOVL ≤ 15pF, CIOVCC ≤ 40pF,
TA = TMIN to TMAX. Typical values are at TA = +25°C.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LOGIC-LEVEL THRESHOLDS
I/O VL_ Input-Voltage High
VIHL
I/O VL_ Input-Voltage Low
VILL
2/3 x VL
V
1/3 x VL
Pullup Resistance on I/O VL_
Pulldown Resistance on I/O VL_
I/O VCC_ Input-Voltage High
VIHC
I/O VCC_ Input-Voltage Low
VILC
V
Ω
120
Ω
75
2/3 x VCC
V
1/3 x VCC
V
Pullup Resistance on I/O VCC_
2.5
kΩ
Pulldown Resistance on I/O VCC_
2.5
kΩ
2/3 x VL
V
EN, EN Input-Voltage High
VIH
EN, EN Input-Voltage Low
VIL
EN Input Current
MAX13013/MAX13014
-5
1/3 x VL
V
+5
µA
Pullup Resistance on EN
MAX3023
46
62
81
kΩ
Pulldown Resistance on EN
MAX3023, TSSOP package only
46
62
81
kΩ
I/O VL_ Output-Voltage High
VOHL
I/O VL source current = 20µA
I/O VL_ Output-Voltage Low
VOLL
I/O VL sink current = 20µA
I/O VCC_ Output-Voltage High
VOHC
I/O VCC source current = 20µA
I/O VCC_ Output-Voltage Low
VOLC
I/O VCC sink current = 20µA
2/3 x VL
V
1/3 x VL
2/3 x VCC
V
V
1/3 x VCC
V
_______________________________________________________________________________________
3
MAX13013/MAX13014/MAX3023
ELECTRICAL CHARACTERISTICS (continued)
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
TIMING CHARACTERISTICS
(VCC = +1.65V to +3.6V, VL = +1.2V to (VCC - 0.4V), EN = VL, EN = open (MAX3023 TSSOP package only), CIOVL ≤ 15pF, CIOVCC ≤
40pF, TA = TMIN to TMAX. Typical values are at TA = +25°C.) (Notes 1, 2)
PARAMETER
I/O VCC_ Rise Time
I/O VCC_ Fall Time
SYMBOL
tRVCC
tFVCC
CONDITIONS
MIN
TYP
2.5
CIOVCC = 20pF, Figure 1
3
CIOVCC = 40pF, Figure 1
4
CIOVCC = 15pF, Figure 1
2.5
CIOVCC = 20pF, Figure 1
3
CIOVCC = 40pF, Figure 1
I/O VL_ Rise Time
tRVL
CIOVL = 15pF, Figure 2
I/O VL_ Fall Time
tFVL
CIOVL = 15pF, Figure 2
I/O VL_ One-Shot Output Impedance
Propagation Delay, Driving I/O VCC_
UNITS
ns
ns
4
I/O VCC_ One-Shot Output Impedance
Propagation Delay, Driving I/O VL_
MAX
CIOVCC = 15pF, Figure 1
I/OVL-VCC CIOVCC = 15pF, Figure 1
I/OVCC-VL CIOVL = 15pF, Figure 2
18.5
Ω
2.5
ns
2.5
ns
12.5
Ω
6.5
ns
6
ns
4
ns
Part-to-Part Skew (Note 3)
tPPSKEW
CIOVCC = 15pF, CIOVL = 15pF,
VCC = 2.5V, VL = 1.8V
Propagation Delay from
I/O VL_ to I/O VCC_ after Enable
tEN-VCC
CIOVCC = 15pF, Figure 3
1000
ns
Propagation Delay from
I/O VCC_ to I/O VL_ after Enable
tEN-VL
CIOVL = 15pF, Figure 4
1000
ns
Maximum Data Rate
CIOVCC = 15pF, CIOVL = 15pF, VL > 1.8V
100
CIOVCC = 15pF, CIOVL = 15pF, VL > 1.2V
80
Mbps
Note 1: VL must be less than or equal to VCC - 0.4V during normal operation. However, VL can be greater than VCC during startup
and shutdown conditions.
Note 2: All units are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by design
and not production tested.
Note 3: Not production tested. Guaranteed by design.
4
_______________________________________________________________________________________
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
VL SUPPLY CURRENT
vs. SUPPLY VOLTAGE
0.6
0.4
0.2
DRIVING I/O VL_
VL = 1.2V
CIOVCC = 15pF
2.5
3.0
3.5
2.0
2.5
3.0
3.5
4.0
2.0
2.5
3.0
3.5
VCC SUPPLY VOLTAGE (V)
VCC SUPPLY CURRENT
vs. SUPPLY VOLTAGE
VL SUPPLY CURRENT
vs. TEMPERATURE
VCC SUPPLY CURRENT
vs. TEMPERATURE
DRIVING I/O VL_
VL = 1.2V
CIOVCC = 15pF
3.2
2.8
2.4
0
2.5
3.0
3.5
4.0
14
13
12
11
DRIVING I/O VCC_
CIOVL = 15pF
10
2.0
2.0
DRIVING I/O VCC_
CIOVL = 15pF
15
-40
-15
10
35
60
-40
85
-15
10
35
60
VCC SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
VL SUPPLY CURRENT
vs. CAPACITIVE LOAD ON I/O VCC_
VCC SUPPLY CURRENT
vs. CAPACITIVE LOAD ON I/O VCC_
RISE/FALL TIME
vs. CAPACITIVE LOAD ON I/O VCC_
0.4
0.2
19
16
tRISE
0.9
0.6
tFALL
DRIVING I/O VL_
DRIVING I/O VL_
DRIVING I/O VL_
0
10
10
1.2
0.3
13
0
20
30
CAPACITIVE LOAD (pF)
40
85
MAX13013 toc09
22
RISE/FALL TIME (ns)
0.6
1.5
MAX13013 toc08
0.8
25
VCC SUPPLY CURRENT (mA)
MAX13013 toc07
1.0
4.0
MAX13013 toc06
3.6
16
VCC SUPPLY CURRENT (mA)
VL SUPPLY CURRENT (mA)
10
MAX13013 toc05
4.0
MAX13013 toc04
15
0
DRIVING I/O VL_
VL = 1.8V
CIOVCC = 15pF
VCC SUPPLY VOLTAGE (V)
20
1.5
10
VCC SUPPLY VOLTAGE (V)
25
5
15
0
1.5
4.0
20
5
0
2.0
VCC SUPPLY CURRENT (mA)
0.3
0.1
0
VL SUPPLY CURRENT (mA)
0.4
25
MAX13013 toc03
0.5
DRIVING I/O VL_
VL = 1.8V
CIOVCC = 15pF
0.2
MAX13013 toc02
0.8
0.6
VL SUPPLY CURRENT (mA)
MAX13013 toc01
VL SUPPLY CURRENT (mA)
1.0
VCC SUPPLY CURRENT
vs. SUPPLY VOLTAGE
VCC SUPPLY CURRENT (mA)
VL SUPPLY CURRENT
vs. SUPPLY VOLTAGE
0
10
20
30
CAPACITIVE LOAD (pF)
40
0
10
20
30
40
CAPACITIVE LOAD (pF)
_______________________________________________________________________________________
5
MAX13013/MAX13014/MAX3023
Typical Operating Characteristics
(Data rate = 100Mbps, VCC = 3.3V, VL = 1.8V, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(Data rate = 100Mbps, VCC = 3.3V, VL = 1.8V, TA = +25°C, unless otherwise noted.)
PROPAGATION DELAY
vs. CAPACITIVE LOAD ON I/O VCC_
RISE/FALL TIME (ns)
0.8
0.6
tFALL
0.4
DRIVING I/O VL_
tPLH
4
3
2
1
0.2
0
4
3
tPLH
2
1
tPHL
0
5
DRIVING I/O VCC_
tPHL
DRIVING I/O VCC_
0
5
10
20
15
MAX13013 toc12
1.0
5
MAX13013 toc11
tRISE
PROPAGATION DELAY (ns)
MAX13013 toc10
1.2
PROPAGATION DELAY
vs. CAPACITIVE LOAD ON I/O VL_
PROPAGATION DELAY (ns)
RISE/FALL TIME
vs. CAPACITIVE LOAD ON I/O VL_
0
0
10
20
40
30
0
5
10
20
15
CAPACITIVE LOAD (pF)
CAPACITIVE LOAD (pF)
CAPACITIVE LOAD (pF)
tEN-VCC vs. TEMPERATURE
(CIOVCC = 15pF)
tEN-VL vs. TEMPERATURE
(CIOVL = 15pF)
TYPICAL I/O VL_ DRIVING
(CIOVCC = 40pF)
MAX13013 toc14
230
MAX13013 toc15
100
MAX13013 toc13
250
80
2V/div
210
tEN-VL (ns)
tEN-VCC (ns)
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
190
170
60
40
2V/div
20
150
0
-40
-15
10
35
60
85
-40
-15
10
35
85
TEMPERATURE (°C)
TYPICAL I/O VCC_ DRIVING
(CIOVL = 15pF)
TYPICAL I/O VL_ DRIVING
(VCC = 1.65V, VL = 1.2V, CIOVCC = 40pF)
MAX13013 toc16
TYPICAL I/O VCC_ DRIVING
(VCC = 1.65V, VL = 1.2V, CIOVL = 15pF)
MAX13013 toc18
1V/div
1V/div
1V/div
2V/div
4ns/div
4ns/div
MAX13013 toc17
2V/div
6
60
TEMPERATURE (°C)
4ns/div
_______________________________________________________________________________________
1V/div
4ns/div
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
PIN
MAX3023
TSSOP
4x3
UCSP
1
2
MAX13013
MAX13014
NAME
FUNCTION
SC70
3x2
UCSP
SOT23
3x3
UCSP
A1
4
B2
7
A2
I/O VL1
Input/Output 1, Referenced to VL
B2
—
—
6
A3
I/O VL2
Input/Output 2, Referenced to VL
3
A2
5
B1
8
A1
VL
4
—
—
—
—
—
N.C.
5
B3
—
—
—
—
I/O VL3
Input/Output 3, Referenced to VL
6
A3
—
—
—
—
I/O VL4
Input/Output 4, Referenced to VL
7
A4
6
B3
5
B1
EN
Active-High Enable Input. If EN is pulled low, all inputs/outputs
are in tristate. Drive EN high (VL) for normal operation.
8
—
—
—
—
—
EN
Active-Low Enable Input. If EN is pulled high (VL), all inputs/
outputs are in tri-state. Drive EN low for normal operation
(MAX3023 TSSOP package only).
9
B4
—
—
—
—
I/O VCC4
Input/Output 4, Referenced to VCC
10
C4
—
—
—
—
I/O VCC3
Input/Output 3, Referenced to VCC
11
C3
2
A3
4
B3
GND
Ground
12
C2
1
A1
1
C1
VCC
VCC Input Voltage, +1.65V ≤ VCC ≤ +3.6V. Bypass VCC to GND
with a 0.1µF capacitor.
13
C1
—
—
3
C3
I/O VCC2
Input/Output 2, Referenced to VCC
14
B1
3
A2
2
C2
I/O VCC1
Input/Output 1, Referenced to VCC
VL Input Voltage, +1.2V ≤ VL ≤ VCC - 0.4V. Bypass VL to GND
with a 0.1µF capacitor.
No Connection
_______________________________________________________________________________________
7
MAX13013/MAX13014/MAX3023
Pin Description—MAX13013/MAX13014/
MAX3023 (Bidirectional Devices)
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Test Circuits/Timing Diagrams
tRISE/FALL ≤ 3ns
I/O VL_
VL
VCC
90%
50%
MAX13013
10%
EN
I/OVL-VCC
I/OVL-VCC
I/O VCC_
I/O VL_
CIOVCC
I/O VCC_
90%
50%
SOURCE
10%
tRVCC
tFVCC
Figure 1. Driving I/O VL_ Test Circuit and Timing
tRISE/FALL ≤ 3ns
I/O VCC_
VL
VCC
90%
50%
MAX13013
10%
EN
I/OVCC-VL
I/OVCC-VL
I/O VCC_
I/O VL_
CIOVL_
I/O VL_
SOURCE
90%
50%
10%
tFVL
Figure 2. Driving I/O VCC_ Test Circuit and Timing
8
_______________________________________________________________________________________
tRVL
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
VL
EN
EN
MAX13013
t'EN-VCC
0
I/O VCC_
SOURCE
I/O VL_
VL
I/O VL_
0
1MΩ
VL
CIOVCC
VCC
I/O VCC_
VCC / 2
0
VCC
VL
EN
EN
1MΩ
MAX13013
t"EN-VCC
0
SOURCE
I/O VL_
VL
I/O VL_
I/O VCC_
0
CIOVCC
VCC
I/O VCC_
VCC / 2
0
tEN-VCC IS WHICH EVER IS LARGER BETWEEN t'EN-VCC AND t"EN-VCC.
Figure 3. Propagation Delay from I/O VL_ to I/O VCC_ After EN
VL
EN
EN
MAX13013
SOURCE
I/O VCC_
I/O VL_
t'EN-VL
0
VCC
I/O VCC_
0
VCC
CIOVL
100kΩ
VL
I/O VL_
VL / 2
VL
EN
VL
SOURCE
0
EN
MAX13013
t"EN-VL
100kΩ
I/O VCC_
0
VCC
I/O VCC_
I/O VL_
0
CIOVL
VL
I/O VL_
VL / 2
0
tEN-VCC IS WHICH EVER IS LARGER BETWEEN t'EN-VCC AND t"EN-VCC.
Figure 4. Propagation Delay from I/O VCC_ to I/O VL_ After EN
_______________________________________________________________________________________
9
MAX13013/MAX13014/MAX3023
Test Circuits/Timing Diagrams (continued)
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Detailed Description
The MAX13013/MAX13014/MAX3023 logic-level translators provide the level shifting necessary to allow
100Mbps data transfer in a multivoltage system.
Externally applied voltages, VCC and VL, set the logic
levels on either side of the device. Logic signals present on the VL side of the device appear as a highervoltage logic signal on the VCC side of the device, and
vice-versa. The MAX13013/MAX13014/MAX3023 bidirectional level translators allow data translation in either
direction (V L ↔V CC ) on any single data line. The
MAX13013/MAX13014/MAX3023 accept VL from +1.2V
to (VCC - 0.4V) and operate with VCC from +1.65V to
+3.6V, making them ideal for data transfer between
low-voltage ASICs/PLDs and higher voltage systems.
When in tri-state mode, the MAX13013/MAX13014/
MAX3023 reduce the VCC supply current to 0.03µA,
and the V L supply current to 0.1µA. These devices
operate at a guaranteed data rate of 100Mbps for VL >
1.8V.
the load capacitance (see the Typical Operating
Characteristics Rise/Fall Time graph), output impedance
of the driver, and the operating voltage range (Table 1).
Input Driver Requirements
The MAX13013/MAX13014/MAX3023 architecture is
based on a one-shot accelerator output stage (see
Figure 5). Accelerator output stages are in tri-state
mode except when there is a transition on any of the
translators on the input side, either I/O VL_ or I/O VCC_.
A short pulse is then generated during which the accelerator output stages become active and charge/discharge the capacitances at the I/Os. Due to the
architecture, both sides become active during the oneshot pulse. This can lead to some current feeding into
the external source that is driving the translator.
However, this behavior simply helps to speed up the
transition on the driven side.
For proper operation, the driver has to meet the following conditions: less than 25Ω output impedance and
greater than 20mA peak output current capability.
Level Translation
For proper operation, ensure that +1.65V ≤ VCC ≤ +3.6V,
and +1.2V ≤ V L ≤ V CC - 0.4V. During power-up
sequencing, VL ≥ VCC does not damage the device.
During power-supply sequencing, when VCC is floating
and VL is powering up, up to 40mA current can be
sourced to each load on the VL side, without the device
latching up. The maximum data rate depends heavily on
Table 1. Data Rate
VL (V)
GUARANTEED DATA RATE (Mbps)
VL < 1.8
80
VL ≥ 1.8
100
VL
VCC
I/O VL_ TO I/O VCC_ PATH
P
ONE-SHOT
4kΩ
I/O VL
I/O VCC
N
ONE-SHOT
P
ONE-SHOT
150Ω
N
ONE-SHOT
I/O VCC_ TO I/O VL_ PATH
Figure 5. Simplified Functional Diagram (One I/O Line)
10
______________________________________________________________________________________
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Output Load Requirements
The MAX13013/MAX13014/MAX3023 I/O are designed to
drive CMOS inputs. Do not load the I/O lines with a resistive load less than 25kΩ. Also, do not place an RC circuit
at the input of these devices to slow down the edges. If a
slower rise/fall time is required, refer to the
MAX3000E/MAX3001E logic-level-translators data sheet.
For I 2 C level translation, refer to the MAX3372EMAX3379E/MAX3390E–MAX3393E data sheet.
Table 2. MAX3023 (TSSOP Package)
Operating Mode
EN
EN
0
0
Both I/O VL_ and I/O VCC_ are in tri-state.
VL
0
Normal operation.
0
VL
Both I/O VL_ and I/O VCC_ are in tri-state.
VL
VL
Both I/O VL_ and I/O VCC_ are in tri-state.
OPERATING MODE
Applications Information
Enable Inputs
Power-Supply Decoupling
The MAX13013 single-, the MAX13014 dual- and the
MAX3023 (UCSP package) quad-level translators feature
an EN input. The MAX3023 (TSSOP package) quad-level
translator features both EN and EN inputs (see Table 2
for operating mode). Note that the MAX3023 (TSSOP
package) has internal pullup and pulldown circuitry on
EN and EN, respectively. If left unconnected, EN is pulled
up to VL and EN is pulled down to GND.
To reduce ripple and the chance of introducing data
errors, bypass V L and V CC to ground with a 0.1µF
ceramic capacitor. Place all capacitors as close to the
power-supply inputs as possible.
IIN
Unidirectional vs. Bidirectional Level
Translator
The MAX13013/MAX13014/MAX3023 bidirectional
translators can operate as a unidirectional device to
translate signals without inversion. These devices provide the smallest solution (UCSP package) for unidirectional level translation without inversion.
UCSP Applications Information
For the latest application details on UCSP construction,
dimensions, tape carrier information, PC board techniques, bump-pad layout, and recommended reflow temperature profiles, as well as the latest information on
reliability testing results, go to Maxim’s web site at
www.maxim-ic.com/ucsp to find the Application Note:
UCSP—A Wafer-Level Chip-Scale Package.
VTH_IN / RIN*
0
VIN
VTH_IN
VS
WHERE VS = VCC OR VL
-(VS - VTH_IN) /
RIN*
*RIN = 4kΩ WHEN DRIVING VL SIDE; RIN = 150Ω WHEN DRIVING VCC SIDE.
Figure 6. Typical IIN vs. VIN
______________________________________________________________________________________
11
MAX13013/MAX13014/MAX3023
Figure 6 shows a graph of typical input current versus
input voltage.
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
MAX13013/MAX13014/MAX3023
Pin Configurations (continued)
1
2
3
VL
I/O VL1
I/O VL2
TOP VIEW
VCC
1
8
VL
I/O VCC1 2
7
I/O VL1
I/O VCC2
3
6
I/O VL2
GND 4
5
EN
A
B
MAX13014
GND
EN
C
MAX13014
I/O VCC2
I/O VCC1
VCC
SOT23
UCSP
(BUMPS ON BOTTOM OF DIE)
1
2
3
4
I/O VL1
VL
I/O VL4
EN
I/O VCC1
I/O VL2
I/O VL3
I/O VCC4
I/O VCC2
VCC
GND
I/O VCC3
TOP VIEW
I/O VL1 1
14 I/O VCC1
I/O VL2
2
13 I/O VCC2
VL
3
12 VCC
N.C. 4
MAX3023
MAX3023
B
11 GND
I/O VL3 5
10 I/O VCC3
I/O VL4 6
9
I/O VCC4
EN 7
8
EN
A
C
UCSP
(BUMPS ON BOTTOM OF DIE)
TSSOP
Ordering Information/Selector Guide (continued)
PART
TEMP RANGE
PIN-PACKAGE
PACKAGE
CODE
TOP
MARK
NUMBER OF
VL → VCC
TRANSLATORS
Number of
VCC → VL
TRANSLATORS
EN
EN
MAX13013EBT-T
-40°C to +85°C
3 x 2 UCSP-6
B6-1
ADF
1
1
✓
—
MAX13014EKA
-40°C to +85°C
8 SOT23
—
AEKB
2
2
✓
—
MAX13014EBL-T
-40°C to +85°C
3 x 3 UCSP-9
B9-2
AEN
2
2
✓
—
MAX3023EUD
-40°C to +85°C
14 TSSOP
—
—
4
4
✓
✓
MAX3023EBC-T
-40°C to +85°C
4 x 3 UCSP-12
B12-1
ABW
4
4
✓
—
Chip Information
TRANSISTOR COUNT:
MAX13013: 261
MAX13014: 444
MAX3023: 791
PROCESS: BiCMOS
12
______________________________________________________________________________________
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
SC70, 6L.EPS
PACKAGE OUTLINE, 6L SC70
21-0077
C
1
1
______________________________________________________________________________________
13
MAX13013/MAX13014/MAX3023
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
6L, UCSP.EPS
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
PACKAGE OUTLINE, 3x2 UCSP
21-0097
14
______________________________________________________________________________________
G
1
1
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
CL
CL
E
MIN
MAX
A
A1
A2
0.90
0.00
0.90
1.45
0.15
1.30
b
0.28
0.45
C
D
E
0.09
2.80
2.60
0.20
3.00
3.00
SYMBOL
e
CL
E1
E1
1.50
L
0.30
L2
e
PIN 1
I.D. DOT
(SEE NOTE 6)
SOT23, 8L .EPS
SEE DETAIL "A"
b
1.75
0.60
0.25 BSC.
0.65 BSC.
1.95 REF.
0∞
8∞
e1
0
e1
D
C
CL
L2
A
A2
GAUGE PLANE
A1
SEATING PLANE C
0
L
NOTE:
1. ALL DIMENSIONS ARE IN MILLIMETERS.
2. FOOT LENGTH MEASURED FROM LEAD TIP TO UPPER RADIUS OF
HEEL OF THE LEAD PARALLEL TO SEATING PLANE C.
3. PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH & METAL BURR.
4. PACKAGE OUTLINE INCLUSIVE OF SOLDER PLATING.
DETAIL "A"
5. COPLANARITY 4 MILS. MAX.
6. PIN 1 I.D. DOT IS 0.3 MM ÿ MIN. LOCATED ABOVE PIN 1.
7. SOLDER THICKNESS MEASURED AT FLAT SECTION OF LEAD
BETWEEN 0.08mm AND 0.15mm FROM LEAD TIP.
8. MEETS JEDEC MO178.
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, SOT-23, 8L BODY
APPROVAL
DOCUMENT CONTROL NO.
21-0078
REV.
D
1
1
______________________________________________________________________________________
15
MAX13013/MAX13014/MAX3023
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
9LUCSP, 3x3.EPS
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
PACKAGE OUTLINE, 3x3 UCSP
21-0093
16
______________________________________________________________________________________
I
1
1
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
TSSOP4.40mm.EPS
______________________________________________________________________________________
17
MAX13013/MAX13014/MAX3023
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
12L, UCSP 4x3.EPS
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
PACKAGE OUTLINE, 4x3 UCSP
21-0104
F
1
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2004 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products, Inc.