Maxim MAX4691-MAX4694 Low-voltage 8:1 mux/dual 4:1 mux/triple spdt/ quad spdt in ucsp package Datasheet

19-1945; Rev 2; 2/03
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
Applications
Features
♦ 16 bump, 0.5mm-Pitch UCSP (2mm x 2mm)
♦ 1.8V Logic Compatibility
♦ Guaranteed On-Resistance
70Ω (max) with +2.7V Supply
35Ω (max) with +5V Supply
25Ω (max) with ±4.5V Dual Supplies
♦ Guaranteed Match Between Channels
5Ω (max) with +2.7V Supply
3Ω (max) with ±4.5V Dual Supplies
♦ Guaranteed Flatness Over Signal Range
3.5Ω (max) with ±4.5V Dual Supplies
♦ Low Leakage Currents Over Temperature
20nA (max) at +85°C
♦ Fast 90ns Transition Time
♦ Guaranteed Break-Before-Make
♦ Single-Supply Operation from +2V to +11V
♦ Dual-Supply Operation from ±2V to ±5.5V
(MAX4691/MAX4692/MAX4693)
Audio and Video Signal Routing
Cellular Phones
♦ V+ to V- Signal Handling
Battery-Operated Equipment
Communications Circuits
♦ High Off-Isolation: -88dB (100kHz)
♦ Low Crosstalk: -90dB (100kHz)
Modems
Functional Diagrams
Ordering Information
PART
TEMP
RANGE
X1
MAX4691EBE-T
-40°C to +85°C
16-Bump UCSP*
X2
MAX4691EGE
-40°C to +85°C
16 QFN
X3
MAX4692EBE-T
-40°C to +85°C
16-Bump UCSP*
MAX4692EGE
-40°C to +85°C
16 QFN
MAX4693EBE-T
-40°C to +85°C
16-Bump UCSP*
MAX4693EGE
-40°C to +85°C
16 QFN
MAX4694EBE-T
-40°C to +85°C
16-Bump UCSP*
MAX4694EGE
-40°C to +85°C
16 QFN
MAX4691
X0
X
X4
X5
X6
X7
LOGIC
A
B
EN
C
Pin Configurations appear at end of data sheet.
Functional Diagrams continued at end of data sheet.
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
UCSP is a trademark of Maxim Integrated Products, Inc.
PINPACKAGE
*Requires special solder temperature profile described in the
Absolute Maximum Ratings section.
*UCSP reliability is integrally linked to the user’s assembly methods, circuit board, and environment. See the UCSP Reliability
Notice in the UCSP Reliability section for information.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX4691–MAX4694
General Description
The MAX4691–MAX4694 are low-voltage CMOS analog
ICs configured as an 8-channel multiplexer (MAX4691),
two 4-channel multiplexers (MAX4692), three singlepole/double-throw (SPDT) switches (MAX4693), and
four SPDT switches (MAX4694).
The MAX4691/MAX4692/MAX4693 operate from either
a single +2V to +11V power supply or dual ±2V to
±5.5V power supplies. When operating from ±5V supplies they offer 25Ω on-resistance (RON), 3.5Ω (max)
RON flatness, and 3Ω (max) matching between channels. The MAX4694 operates from a single +2V to +11V
supply. Each switch has Rail-to-Rail® signal handling
and a low 1nA leakage current.
All digital inputs are 1.8V logic-compatible when operating from a +3V supply and TTL compatible when
operating from a +5V supply.
The MAX4691–MAX4694 are available in 16-pin,
4mm ✕ 4mm QFN and 16-bump UCSP packages. The
chip-scale package (UCSP™) occupies a 2mm x 2mm
area, significantly reducing the required PC board area.
MAX4691–MAX4694
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
ABSOLUTE MAXIMUM RATINGS
V+ to GND ..............................................................-0.3V to +12V
V+ to V- (MAX4691/MAX4692/MAX4693) ..............-0.3V to +12V
Voltage into any Terminal (Note 1) ...... (V- - 0.3V) to (V+ + 0.3V)
Continuous Current into any Terminal ............................. ±20mA
Peak Current W_, X_, Y_, Z_ (pulsed at 1ms,
10% duty cycle)...........................................................±40mA
ESD per Method 3015.7.......................................................>2kV
Continuous Power Dissipation (TA = +70°C)
16-Bump UCSP (derate 8.3mW/°C above +70°C) .... 659mW
16-Pin QFN (derate 18.5mW/°C above +70°C) ....... 1481mW
Operating Temperature Range .......................... -40°C to +85°C
Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (Soldering)
16-Bump UCSP (Note 2) Infrared (15s) ..................... +220°C
Vapor Phase (60s)..................................................... +215°C
16-Pin QFN................................................................. +300°C
Note 1: Voltages exceeding V+ or V- on any signal terminal are clamped by internal diodes. Limit forward-diode current to maximum current rating.
Note 2: This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device
can be exposed to during board level solder attach and rework. This limit permits only the use of the solder profiles recommended in the industry standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and convection reflow.
Preheating is required. Hand or wave soldering is not allowed.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—Single +3V Supply
(V+ = +2.7V to +3.6V, V- = 0, VIH = +1.4V, VIL = +0.4V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at
TA = +25°C.) (Notes 3, 4, 5)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
-40°C to +85°C
0
TYP
MAX
UNITS
V+
V
ANALOG SWITCH
Analog Signal Range
On-Resistance (Note 6)
On-Resistance Match
Between Channels
(Notes 6, 7)
VW, VX, VY,
VZ, VW_,
VX_, VY_,
VZ_
RON
V+ = 2.7V; IW, IX, IY, IZ = 1mA
VW_, VX_, VY_, VZ_ = 1.5V
∆RON
V+ = 2.7V; IW, IX, IY, IZ = 1mA
VW_, VX_, VY_, VZ_ = 1.5V
W_, X_, Y_, Z_ Off-Leakage
Current (Note 9)
IW_, IX_,
IY_, IZ_
V+ = 3.6V; VW, VX, VY, VZ = 3V,
0.6V; VW_, VX_, VY_, VZ_ = 0.6V,
3V
W, X, Y, Z Off-Leakage
Current (Note 9)
IW(OFF),
IX(OFF),
IY(OFF),
IZ(OFF)
V+ = 3.6V; VW, VX, VY, VZ = 3V,
0.6V; VW_, VX_, VY_, VZ_ = 0.6V,
3V
IW(ON),
IX(ON),
IY(ON),
IZ(ON)
V+ = 3.6V; VW, VX, VY, VZ = 0.6V,
3V; VW_, VX_, VY_, VZ_ = 0.6V, 3V,
or floating
W, X, Y, Z On-Leakage
Current (Note 9)
2
+25ºC
45
-40°C to +85°C
70
80
+25°C
2
Ω
5
Ω
-40°C to +85°C
6
+25°C
-1
1
-40°C to +85°C
-10
10
+25°C
-2
2
-40°C to +85°C
-20
20
+25°C
-2
2
nA
nA
nA
-40°C to +85°C
-20
_______________________________________________________________________________________
20
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
(V+ = +2.7V to +3.6V, V- = 0, VIH = +1.4V, VIL = +0.4V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at
TA = +25°C.) (Notes 3, 4, 5)
PARAMETER
Input Off-Capacitance
Output Off-Capacitance
On-Capacitance
SYMBOL
CW_(OFF),
CX_(OFF),
CY_(OFF),
CZ_(OFF)
CONDITIONS
f = 1MHz, Figure 7
TA
MIN
+25°C
f = 1MHz,
Figure 7
CW(ON),
CX(ON),
CY(ON),
CZ(ON)
f = 1MHz,
Figure 7
MAX4692
UNITS
pF
68
+25°C
pF
36
MAX4693
20
MAX4691
78
MAX4692
MAX
9
MAX4691
CX(OFF),
CY(OFF),
CZ(OFF)
TYP
46
+25°C
MAX4693
pF
30
DYNAMIC
Enable Turn-On Time
(MAX4691/MAX4692/
MAX4693)
tON
Enable Turn-Off Time
(MAX4691/MAX4692/
MAX4693)
tOFF
Address Transition Time
Break-Before-Make
Charge Injection
VW_, VX_, VY_, VZ_ = 1.5V;
RL = 300Ω,CL = 35pF, Figure 2
+25°C
300
ns
350
-40°C to +85°C
+25°C
VW_, VX_, VY_, VZ_ = 1.5V;
RL = 300Ω,CL = 35pF, Figure 2
-40°C to +85°C
tTRANS
VW_, VX_, VY_, VZ_ = 0, 1.5V;
RL = 300Ω, CL = 35pF, Figure 3
-40°C to +85°C
tBBM
VW_, VX_, VY_, VZ_ = 1.5V;
RL = 300Ω, CL = 35pF, Figure 4
Q
180
70
100
ns
120
+25°C
200
350
400
+25°C
2
-40°C to +85°C
2
90
ns
ns
VGEN = 0; RGEN = 0; CL = 1nF,
Figure 5
+25°C
0.1
pC
Off-Isolation (Note 10)
VISO
f = 0.1MHz, RL = 50Ω, CL = 5pF,
Figure 6
+25°C
-70
dB
Crosstalk (Note 11)
VCT
f = 0.1MHz, RL = 50Ω, CL = 5pF,
Figure 6
+25°C
-75
dB
DIGITAL I/O
Input Logic High
VIH
1.4
Input Logic Low
VIL
Input Leakage Current
IIN
VA, VB, VC, V EN = 0 or V+
I+
V+ = 3.6V, VA, VB, VC, VEN = 0
or V+
-1
V
0.4
V
+1
µA
SUPPLY
Positive Supply Current
+25°C
0.1
-40°C to +85°C
1
µA
_______________________________________________________________________________________
3
MAX4691–MAX4694
ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued)
MAX4691–MAX4694
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
ELECTRICAL CHARACTERISTICS—Single +5V Supply
(V+ = +4.5V to +5.5V, V- = 0, VIH = +2V, VIL = +0.8V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at
TA = +25°C.) (Notes 3, 4, 5)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
-40°C to +85°C
0
TYP
MAX
UNITS
V+
V
ANALOG SWITCH
Analog Signal Range
On-Resistance (Note 6)
On-Resistance Match
Between Channels
(Notes 6, 7)
On-Resistance Flatness
(Note 8)
W_, X_ , Y_, Z_ Off-Leakage
Current (Note 9)
W, X, Y, Z Off-Leakage
Current (Note 9)
W, X, Y, Z On-Leakage
Current (Note 9)
VW, VX, VY,
VZ, VW_, VX_,
VY_, VZ__
RON
+25°C
V+ = 4.5V; IW, IX, IY, IZ = 1mA;
VW_, VX_, VY_, VZ_ = 3.5V
-40°C to +85°C
25
+25°C
∆RON
RFLAT(ON)
V+ = 4.5V; IW, IX, IY, IZ = 1mA;
VW_, VX_, VY_, VZ_ = 3.5V
35
40
2
Ω
4
Ω
-40°C to +85°C
5
+25°C
V+ = 4.5V; IW, IX, IY, IZ = 1mA;
VW_, VX_, VY_, VZ_ = 1V, 2.25V,
3.5V
-40°C to +85°C
IW_, IX_,
IY_, IZ_
+25°C
V+ = 5.5V; VW, VX, VY,
VZ = 4.5V, 1V_; VW_, VX_, VY_,
VZ_ = 1V, 4.5V
-40°C to +85°C
IW(OFF),
IX (OFF),
IY(OFF),
IZ(OFF)
+25°C
V+ = 5.5V; VW, VX, VY,
VZ = 4.5V, 1V_; VW_, VX_, VY_,
VZ_ = 1V, 4.5V
-40°C to +85°C
IW(ON),
IX(ON),
IY(ON),
IZ(ON)
+25°C
V+ = 5.5V; VW, VX, VY, VZ = 1V,
4.5V_; VW_, VX_, VY_, VZ_ = 1V,
4.5V, or floating
-40°C to +85°C
2
6
Ω
8
-1
1
nA
-10
10
-2
2
-20
20
-2
2
-20
20
nA
nA
DYNAMIC
tON
VW_, VX_, VY_, VZ_ = 3V; RL =
300Ω, CL = 35pF, Figure 2
-40°C to +85°C
Enable Turn-Off Time
(MAX4691/MAX4692/MAX4693)
tOFF
VW_, VX_, VY_, VZ_ = 3V; RL =
300Ω, CL = 35pF, Figure 2
-40°C to +85°C
Address Transition Time
Break-Before-Make
Charge Injection
4
+25°C
Enable Turn-On Time
(MAX4691/MAX4692/MAX4693)
tTRANS
tBBM
Q
VW_, VX_, VY_, VZ_ = 0, 3V;
RL = 300Ω, CL = 35pF,
Figure 3
VW_, VX_, VY_, VZ_ = 3V; RL =
300Ω, CL = 35pF, Figure 4
VGEN = 0; RGEN = 0; CL = 1nF,
Figure 5
90
150
+25°C
45
60
70
+25°C
100
-40°C to +85°C
2
-40°C to +85°C
2
35
0.2
_______________________________________________________________________________________
ns
ns
140
160
+25°C
+25°C
130
ns
ns
pC
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
(V+ = +4.5V to +5.5V, V- = 0, VIH = +2V, VIL = +0.8V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at
TA = +25°C.) (Notes 3, 4, 5)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
TYP
MAX
UNITS
Off-Isolation (Note 10)
VISO
f = 0.1MHz, RL = 50Ω,
CL = 5pF, Figure 6
+25°C
-80
dB
Crosstalk (Note 11)
VCT
f = 0.1MHz, RL = 50Ω,
CL = 5pF, Figure 6
+25°C
-87
dB
DIGITAL I/O
Input Logic High
VIH
Input Logic Low
VIL
2
Input Leakage Current
IIN
VA, VB, VC, V EN = 0 or V+
I+
+25°C
V+ = 5.5V; VA, VB, VC, V EN = 0
or V+
-40°C to +85°C
V
-1
0.8
V
+1
µA
SUPPLY
Positive Supply Current
0.1
µA
1
ELECTRICAL CHARACTERISTICS—Dual ±5V Supplies
(MAX4691/MAX4692/MAX4693 only)
(V+ = +4.5V to +5.5V, V- = -4.5V to -5.5V, VIH = +2V, VIL = +0.8V, TA = -40°C to +85°C, unless otherwise noted.) (Notes 3, 4, 5)
PARAMETER
SYMBOL
CONDITIONS
TA
MIN
-40°C to +85°C
V-
TYP
MAX
UNITS
V+
V
ANALOG SWITCH
Analog Signal Range
On-Resistance (Note 6)
On-Resistance Match
Between Channels
(Notes 6, 7)
On-Resistance Flatness
(Note 8)
X_ , Y_, Z_ Off-Leakage
Current (Note 9)
X, Y, Z Off-Leakage Current
(Note 9)
VX, VY, VZ,
VX_, VY_, VZ_
RON
+25°C
V+ = 4.5V; IX, IY, IZ = 10mA;
V- = -4.5V; VX_, VY_, VZ_ = 3.5V -40°C to +85°C
18
+25°C
∆RON
RFLAT(ON)
V+ = 4.5V; V- = -4.5V; IX, IY, IZ =
10mA; VX_, VY_, VZ_ = 3.5V
2
V+ = 5.5V; V- = -5.5V; VX, VY, VZ
= +4.5V; VX_, VY_, VZ_ = ±4.5V
IX (OFF),
IY(OFF),
IZ(OFF)
V+ = 5.5V; V- = -5.5V; VX, VY,
VZ = +4.5V; VX_, VY_, VZ_ =
±4.5V
Ω
3
Ω
-40°C to +85°C
4
+25°C
V+ = 4.5V; V- = -4.5V; IX, IY, IZ =
10mA; VX, VY, VZ = 3.5V, 0,
-3.5V
-40°C to +85°C
IX_,
IY_, IZ_
25
30
2.5
3.5
Ω
4
+25°C
-1
1
-40°C to +85°C
-10
10
+25°C
-2
2
-40°C to +85°C
-20
20
nA
nA
_______________________________________________________________________________________
5
MAX4691–MAX4694
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
MAX4691–MAX4694
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
ELECTRICAL CHARACTERISTICS—Dual ±5V Supplies (continued)
(MAX4691/MAX4692/MAX4693 only)
(V+ = +4.5V to +5.5V, V- = -4.5V to -5.5V, VIH = +2V, VIL = +0.8V, TA = -40°C to +85°C, unless otherwise noted.) (Notes 3, 4, 5)
PARAMETER
X, Y, Z On-Leakage Current
(Note 9)
SYMBOL
IX(ON),
IY(ON),
IZ(ON)
CONDITIONS
V+ = 5.5V; V- = -5.5V;
VX, VY, VZ = ±4.5V;
VX_, VY_, VZ_ = ±4.5V,
or floating
TA
MIN
TYP
MAX
+25°C
-2
2
-40°C to +85°C
-20
20
UNITS
nA
DYNAMIC
tON
+25°C
VX_, VY_, VZ_ = 3V; RL = 300Ω,
CL = 35pF, Figure 2
-40°C to +85°C
55
Enable Turn-On Time
Enable Turn-Off Time
tOFF
+25°C
VX_, VY_, VZ_ = 3V; RL = 300Ω,
CL = 35pF, Figure 2
-40°C to +85°C
35
VX_, VY_, VZ_ = 0, 3V;
RL = 300Ω, CL = 35pF,
Figure 3
60
Address Transition Time
Break-Before-Make
tTRANS
tBBM
80
90
50
60
+25°C
ns
ns
90
ns
-40°C to +85°C
+25°C
VX_, VY_, VZ_ = 3V; RL = 300Ω,
CL = 35pF, Figure 4
-40°C to +85°C
100
2
20
ns
2
Q
VGEN = 0; R GEN = 0;
CL = 1nF, Figure 5
+25°C
1.8
pC
Off-Isolation (Note 10)
VISO
f = 0.1MHz, RL = 50Ω,
CL = 5pF, Figure 6
+25°C
-82
dB
Crosstalk (Note 11)
VCT
f = 0.1MHz, RL = 50Ω,
CL = 5pF, Figure 7
+25°C
-84
dB
Total Harmonic Distortion
THD
f = 20Hz to 20kHz, VX, VY, VZ =
5Vp-p; RL = 600Ω,
+25°C
0.02
%
Charge Injection
DIGITAL I/O
Input Logic High
VIH
Input Logic Low
VIL
2
Input Leakage Current
IIN
VA, VB, VC, V EN = 0 or V+
I+
V+ = 5.5V; V- = 5.5V;
VA, VB, VC, V EN = 0 or V+
-1
V
0.8
V
+1
µA
SUPPLY
Positive Supply Current
+25°C
0.1
-40°C to +85°C
1
µA
Note 3: The algebraic convention, where the most negative value is a minimum and the most positive value is a maximum, is used
in this data sheet.
Note 4: UCSP parts are 100% tested at TA = +25°C. Limits across the full temperature range are guaranteed by correlation.
Note 5: QFN parts are 100% tested at TA = +85°C. Limits across the full temperature range are guaranteed by correlation.
Note 6: UCSP RON and RON match are guaranteed by design.
Note 7: ∆RON = RON(MAX) - RON(MIN).
Note 8: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
Note 9: Leakage parameters are guaranteed by design.
Note 10: Off-isolation = 20log10 (VW,X,Y,Z / VW_,X_,Y_,Z_), VW,X,Y,Z = output, VW_,X_,Y_,Z_ = input to off switch.
Note 11: Between any two switches.
6
_______________________________________________________________________________________
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
TA = +85°C
20
80
70
18
20
14
50
TA = +25°C
8
-2
0
2
4
-5
6
-3
-1
TA = +85°C
0
5
4
6
8
10
12
ON-RESISTANCE vs. VW, VX, VY, VZ AND
TEMPERATURE (SINGLE SUPPLY)
SUPPLY CURRENT vs. TEMPERATURE
(DUAL SUPPLIES)
V+ = +3.3V
TA = +85°C
40
10
V+ = +5V
V- = -5V
VA, VB, VC, VEN = 0, +5V
1
30
20
TA = +25°C
2
VW, VX, VY, VZ (V)
TA = +25°C
I+
0.1
I0.01
TA = -40°C
TA = -40°C
10
1
2
3
4
0.001
0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3
5
SUPPLY CURRENT vs. TEMPERATURE
(SINGLE SUPPLY)
0.1
0.01
0.001
10
35
TEMPERATURE (°C)
60
85
35
60
85
2.0
1.8
1.6
VA, VB, VC, VEN (V)
I+
1
10
LOGIC-LEVEL THRESHOLD vs. V+
1A
0.1A
0.01A
1mA
0.1mA
0.01mA
1µA
0.1µA
0.01µA
1nA
0.1nA
0.01nA
1pA
MAX4691 toc08
V+ = +5V
VA, VB, VC, VEN = 0, +5V
-15
-15
TEMPERATURE (°C)
I+ vs. LOGIC LEVEL
MAX4691 toc07
10
-40
-40
VW, VX, VY, VZ (V)
VW, VX, VY, VZ (V)
MAX4691 toc09
0
I+, I- (nA)
3
50
MAX4691 toc04
V+ = +5V
RON (Ω)
RON (Ω)
34
32
30
28
26
24
22
20
18
16
14
12
10
1
VX, VY, VZ (V)
VX, VY, VZ (V)
ON-RESISTANCE vs. VW, VX, VY, VZ AND
TEMPERATURE (SINGLE SUPPLY)
V+ = +10V
0
I+, I- (nA)
-4
V+ = +7.5V
10
TA = -40°C
MAX4691 toc05
-6
V+ = +5V
20
6
0
V+ = +3.3V
40
30
10
V+ = +5V
V- = -5V
V+ = +2.7V
60
16
12
10
V+ = +2V
90
MAX4691 toc06
V+ = +3.3V
V- = -3.3V
100
RON (Ω)
V+ = +2.7V
V- = -2.7V
V+ = +5V
V- = -5V
22
RON (Ω)
RON (Ω)
30
24
MAX4691 toc02
V+ = +2V
V- = -2V
MAX4691 toc01
40
ON-RESISTANCE vs. VW, VX, VY, VZ
(SINGLE SUPPLY)
ON-RESISTANCE vs. VX, VY, VZ AND
TEMPERATURE (DUAL SUPPLIES)
MAX4691 toc03
ON-RESISTANCE vs. VX, VY, VZ
(DUAL SUPPLIES)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0
1
2
3
VA, VB, VC, VENB (V)
4
5
2
3
4
5
6
7
8
9
10
11
V+ (V)
_______________________________________________________________________________________
7
MAX4691–MAX4694
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
1
W, X, Y, Z
0.01
W_, X_, Y_, Z_
0.001
0.0001
-15
10
35
60
10
35
60
TURN-ON/TURN-OFF TIME
vs. SUPPLY VOLTAGE
60
TURN-OFF
50
40
-40
85
MAX4691 toc14
330
280
2.5
230
2.0
TURN-ON
180
130
1.0
0
FREQUENCY RESPONSE
vs. +3V SUPPLIES
-20
ON-RESPONSE
-20
-40
-2
-1
0
1
2
3
4
5
V+ = +3V
V- = 0
THD+N (%)
LOSS (dB)
-100
-3
0.1
-60
-80
0.01
V+ = +5V
V- = -5V
CROSSTALK
CROSSTALK
-4
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
OFF-ISOLATION
OFF-ISOLATION
-80
-5
VW, VX, VY, VZ (V)
ON-RESPONSE
-40
-60
±6
0
MAX4691 toc16
0
±2
85
MAX4691 toc17
60
V+ = +3V
V- = 0
0.5
FREQUENCY RESPONSE
vs. ±5V SUPPLIES
35
85
V+ = +5V
V- = 0
TURN-OFF
TEMPERATURE (°C)
10
60
V+ = +5V
V- = -5V
1.5
±3
±4
±5
SUPPLY VOLTAGE V+, V- (V)
-15
35
3.0
30
-40
10
CHARGE INJECTION vs. VW, VX, VY, VZ
80
30
-15
3.5
Q (pC)
70
380
TURN-ON/TURN-OFF TIME (ns)
MAX4691 toc13
TURN-ON
40
TEMPERATURE (°C)
TURN-ON/TURN-OFF TIME
vs. TEMPERATURE (SINGLE SUPPLY)
V+ = +5.5V
-100
-120
-120
-140
-140
0.001
0.01
0.1
1
FREQUENCY (MHz)
8
-15
TEMPERATURE (°C)
80
TURN-OFF
45
30
-40
TEMPERATURE (°C)
90
TURN-ON/TURN-OFF TIME (ns)
85
50
35
0.0001
-40
TURN-ON
55
MAX4691 toc15
0.001
V+ = +5.5V
V- = -5.5V
60
MAX4691 toc18
0.01
0.1
65
MAX4691 toc12
V+ = +5.5V
V- = -5.5V
OFF-LEAKAGE (nA)
ON-LEAKAGE (nA)
0.1
MAX4691 toc11
V+ = +5.5V
V- = -5.5V
1
10
MAX4691 toc10
10
TURN-ON/TURN-OFF TIME
vs. TEMPERATURE (DUAL SUPPLY)
OFF-LEAKAGE CURRENT vs. TEMPERATURE
TURN-ON/TURN-OFF TIME (ns)
ON-LEAKAGE CURRENT vs. TEMPERATURE
LOSS (dB)
MAX4691–MAX4694
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
10
100
0.001
0.001
0.01
0.1
1
FREQUENCY (MHz)
10
100
10
100
1k
FREQUENCY (Hz)
_______________________________________________________________________________________
10k
100k
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
MAX4691
PIN
NAME
FUNCTION
UCSP
QFN
A4, B4, C4,
D4, A1, B1,
C1, D1
16, 1, 3, 4,
12, 11, 9,
8
X0–X7
A2
13
X
D3, D2, A3
5, 7, 15
A, B, C
B2
14
V-
Negative Analog Supply Voltage Input. Connect to GND for single-supply operation.
B3
2
GND
Ground. Connect to digital ground. (Analog signals have no ground reference; they
are limited to V+ and V-.)
C2
10
EN
Digital Enable Input. Normally connect to GND. Can be driven to logic high to set all
switches off.
C3
6
V+
Positive Analog and Digital Supply Voltage Input
Analog Switch Inputs 0–7
Analog Switch Common
Digital Address Inputs
MAX4692
PIN
NAME
FUNCTION
UCSP
QFN
A1, B1, C1,
D1
12, 11, 9,
8
X0–X3
Analog Switch “X” Inputs 0–3
A4, B4, C4,
D4
16, 1, 3, 4
Y0–Y3
Analog Switch “Y” Inputs 0–3
A2
13
X
Analog Switch “X” Common
Analog Switch “Y” Common
A3
15
Y
D3, D2
5, 7
A, B
B2
14
V-
B3
2
GND
Ground. Connect to digital ground. (Analog signals have no ground reference;
they are limited to V+ and V-.)
C2
10
EN
Digital Enable Input. Normally connect to GND. Can be driven to logic high to
set all switches off.
C3
6
V+
Positive Analog and Digital Supply Voltage Input
Digital Address Inputs for both “X” and “Y” Analog Switches
Negative Analog Supply Voltage Input. Connect to GND for single-supply operation.
_______________________________________________________________________________________
9
MAX4691–MAX4694
Pin Description
MAX4691–MAX4694
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
Pin Description (continued)
MAX4693
PIN
NAME
10
UCSP
QFN
A1
12
X0
FUNCTION
Analog Switch “X” Normally Closed Input
B1
11
X1
Analog Switch “X” Normally Open Input
A4
16
Y0
Analog Switch “Y” Normally Closed Input
B4
1
Y1
Analog Switch “Y” Normally Open Input
D1
8
Z0
Analog Switch “Z” Normally Closed Input
C1
9
Z1
Analog Switch “Z” Normally Open Input
A2
13
X
Analog Switch “X” Common
A3
15
Y
Analog Switch “Y” Common
D2
7
Z
Analog Switch “Z” Common
C4
3
A
Analog Switch “X” Digital Control Input
D4
4
B
Analog Switch “Y” Digital Control Input
D3
5
C
Analog Switch “Z” Digital Control Input
B2
14
V-
Negative Analog Supply Voltage Input. Connect to GND for single-supply operation.
B3
2
GND
Ground. Connect to digital ground. (Analog signals have no ground reference; they
are limited to V+ and V-.)
C2
10
EN
Digital Enable Input. Normally connect to GND. Can be driven to logic high to set all
switches off.
C3
6
V+
Positive Analog and Digital Supply Voltage Input
______________________________________________________________________________________
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
MAX4694
PIN
NAME
FUNCTION
USCP
QFN
D4
4
W0
Analog Switch “W” Normally Closed Input
C4
3
W1
Analog Switch “W” Normally Open Input
A1
12
X0
Analog Switch “X” Normally Closed Input
B1
11
X1
Analog Switch “X” Normally Open Input
A4
16
Y0
Analog Switch “Y” Normally Closed Input
B4
1
Y1
Analog Switch “Y” Normally Open Input
D1
8
Z0
Analog Switch “Z” Normally Closed Input
C1
9
Z1
Analog Switch “Z” Normally Open Input
D3
5
W
Analog Switch “W” Common
A2
13
X
Analog Switch “X” Common
A3
15
Y
Analog Switch “Y” Common
D2
7
Z
Analog Switch “Z” Common
B2
14
GND
B3
2
A
Analog Switch “W” and “Y” Digital Control Input
C2
10
B
Analog Switch “X” and “Z” Digital Control Input
C3
6
V+
Ground
Positive Analog and Digital Supply Voltage Input
______________________________________________________________________________________
11
MAX4691–MAX4694
Pin Description (continued)
MAX4691–MAX4694
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
Table 1. Truth Table/Switch Programming
EN 1
1
ADDRESS BITS
C2
B
A
X
X
X
ON SWITCHES
MAX4693
MAX4691
MAX4692
All switches open
All switches open
MAX4694
All switches open
—
0
0
0
0
X-X0
X-X0, Y-Y0
X-X0, Y-Y0, Z-Z0
W-W0, X-X0,
Y-Y0, Z-Z0
0
0
0
1
X-X1
X-X1, Y-Y1
X-X1, Y-Y0, Z-Z0
W-W1, X-X0,
Y-Y1, Z-Z0
0
0
1
0
X-X2
X-X2, Y-Y2
X-X0, Y-Y1, Z-Z0
W-W0, X-X1,
Y-Y0, Z-Z1
0
0
1
1
X-X3
X-X3, Y-Y3
X-X1, Y-Y1, Z-Z0
W-W1, X-X1,
Y-Y1, Z-Z1
0
1
0
0
X-X4
X-X0, Y-Y0
X-X0, Y-Y0, Z-Z1
W-W0, X-X0,
Y-Y0, Z-Z0
0
1
0
1
X-X5
X-X1, Y-Y1
X-X1, Y-Y0, Z-Z1
W-W1, X-X0,
Y-Y1, Z-Z0
0
1
1
0
X-X6
X-X2, Y-Y2
X-X0, Y-Y1, Z-Z1
W-W0, X-X1,
Y-Y0, Z-Z1
0
1
1
1
X-X7
X-X3, Y-Y3
X-X1, Y-Y1, Z-Z1
W-W1, X-X1,
Y-Y1, Z-Z1
X = Don’t care
1. EN is not present on the MAX4694.
2. C is not present on the MAX4692 and MAX4694.
Detailed Description
The MAX4691–MAX4694 are low-voltage CMOS analog
ICs configured as an 8-channel multiplexer (MAX4691),
two 4-channel multiplexers (MAX4692), three SPDT
switches (MAX4693), and four SPDT switches
(MAX4694). All switches are bidirectional.
The MAX4691/MAX4692/MAX4693 operate from either
a single +2V to +11V power supply or dual ±2V to
±5.5V power supplies. When operating from ±5V supplies they offer 25Ω on-resistance (RON), 3.5Ω max
RON flatness, and 3Ω max matching between channels.
The MAX4694 operates from a single +2V to +11V supply. Each switch has rail-to-rail signal handling, fast
switching times of tON = 80ns, tOFF = 50ns, and a low
1nA leakage current.
All digital inputs are 1.8V logic-compatible when operating from a +3V supply and TTL-compatible when
operating from a +5V supply.
Digital Inputs
The MAX4691 and MAX4692 include address pins that
allow control of the multiplexers. For the MAX4691, pins
12
A, B, C determine which switch is closed. The two 4-1
muxes in the MAX4692 are controlled by the same
address pins (A and B). (Table 1)
The MAX4693 and MAX4694 offer SPDT switches in
triple and quadruple packages. In the MAX4693, each
switch has a unique control input. The MAX4694 has
two digital control inputs: A (for switches “W” and “Y”)
and B (for switches “X” and “Z”). (Table 1)
Applications Information
Power-Supply Considerations
Overview
The MAX4691–MAX4694 construction is typical of most
CMOS analog switches. V+ and V-* are used to drive
the internal CMOS switches and set the limits of the
analog voltage on any switch. Reverse ESD-protection
diodes are internally connected between each analog
signal pin and both V+ and V-. If any analog signal
exceeds V+ or V-, one of these diodes will conduct.
*V- is found only on the MAX4691/MAX4692/MAX4693.
______________________________________________________________________________________
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
Virtually all the analog leakage current comes from the
ESD diodes. Although the ESD diodes on a given signal pin are identical, and therefore fairly well balanced,
they are reverse biased differently. Each is biased by
either V+ or V- and the analog signal. This means their
leakages will vary as the signal varies. The difference in
the two diode leakages to the V+ and V- pins constitutes the analog signal path leakage current. All analog
leakage current flows between each pin and one of the
supply terminals, not to the other switch terminal. This
is why both sides of a given switch can show leakage
currents of either the same or opposite polarity.
V+ and GND power the internal logic and logic-level
translators, and set both the input and output logic limits. The logic-level translators convert the logic levels
into switched V+ and V- signals to drive the gates of
the analog signals. This drive signal is the only connection between the logic supplies (and signals) and the
analog supplies. V+ and V- have ESD-protection
diodes on GND.
Bipolar Supplies
The MAX4691/MAX4692/MAX4693 operate with bipolar
supplies between ±2V and ±5.5V. The V+ and V- supplies need not be symmetrical, but their difference cannot exceed the absolute maximum rating of +12V.
Single Supply
These devices operate from a single supply between +2V
and +11V when V- is connected to GND. All of the bipolar
precautions must be observed. At room temperature,
they operate with a single supply at near or below +2V,
although as supply voltage decreases, switch on-resistance and switching times become very high.
Always bypass supplies with a 0.1µF capacitor.
Overvoltage Protection
Proper power-supply sequencing is recommended for
all CMOS devices. Do not exceed the absolute maximum ratings, because stresses beyond the listed ratings can cause permanent damage to the devices.
Always sequence V+ on first, then V-, followed by the
logic inputs and by W, X, Y, Z. If power-supply
sequencing is not possible, add two small signal
diodes (D1, D2) in series with the supply pins for overvoltage protection (Figure 1).
Adding diodes reduces the analog signal range to one
diode drop below V+ and one diode drop above V-, but
does not affect the devices’ low switch resistance and
low leakage characteristics. Device operation is
unchanged, and the difference between V+ and Vshould not exceed 12V. These protection diodes are
not recommended when using a single supply if signal
levels must extend to ground.
UCSP Reliability
The chip-scale package (UCSP) represents a unique
package that greatly reduces board space compared to
other packages. UCSP reliability is integrally linked to the
user’s assembly methods, circuit board material, and
usage environment. The user should closely review these
areas when considering a UCSP. Performance through
Operating Life Test and Moisture Resistance is equal to
conventional package technology as it is primarily determined by the wafer-fabrication process. However, this
form factor may not perform equally to a packaged product through traditional mechanical reliability tests.
Mechanical stress performance is a greater consideration for a UCSP. UCSP solder joint contact integrity
must be considered since the package is attached
through direct solder contact to the user’s PC board.
Testing done to characterize the UCSP reliability performance shows that it is capable of performing reliably through environmental stresses. Results of
environmental stress tests and additional usage data
and recommendations are detailed in the UCSP application note, which can be found on Maxim’s website,
at www.maxim-ic.com.
V+
EXTERNAL BLOCKING DIODE
D1
MAX4691
MAX4692
MAX4693
MAX4694
V+
*
*
COM
NO
*
*
V-
(GND)
EXTERNAL BLOCKING DIODE
D2
V- (GND )
*INTERNAL PROTECTION DIODES
( ) ARE FOR THE MAX4694 ONLY, REPLACE V- WITH GND.
Figure 1. Overvoltage Protection
______________________________________________________________________________________
13
MAX4691–MAX4694
During normal operation, these (and other) reversebiased ESD diodes leak, forming the only current
drawn from V+ or V-.
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
MAX4691–MAX4694
Test Circuits/Timing Diagrams
V+
V+
A
VEN
V+
X0
B
50%
V+
0
X1–X7
VX0
C
90%
MAX4691
VEN
EN
VOUT
X
GND
V-
VOUT
90%
35pF
50Ω
0
300Ω
V-
tON
tOFF
V+
V+
A
B
50%
VEN
V+
X0, Y0
V+
0
X1, X2, X3, Y1, Y2, Y3
VX0,
VY0
90%
MAX4692
VEN
EN
X, Y
GND
VOUT
V-
50Ω
35pF
VOUT
90%
0
300Ω
V-
tON
tOFF
V+
V+
A
B
C
V+
VEN
X1, Y1, Z1
V+
VW0,
VX0,
VY0,
VZ0
MAX4693
X0, Y0, Z0
VEN
EN
GND
V-
X, Y, Z
V-
50Ω
VOUT
35pF
300Ω
V-
50%
0
90%
VOUT
VW1,
VX1,
VY1,
VZ1
90%
tOFF
V- = 0 FOR SINGLE-SUPPLY OPERATION.
TEST EACH SECTION INDIVIDUALLY.
Figure 2. Enable Transition Time
14
______________________________________________________________________________________
tON
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
V+
V+
VA, VB, VC
A
50Ω
V A, VB, V C
V+
X0
B
V+
X1–X6
VX0
C
X7
MAX4691
EN
90%
VVOUT
X
GND
50%
0
V-
0
VOUT
35pF
90%
VX7
300Ω
V-
tTRANS
tTRANS
V+
V+
VA, VB
A
B
50Ω
X0, Y0
V+
0
X1, X2, Y1, Y2
VX0,
VY0
MAX4692 X3, Y3
EN
90%
V-
X, Y
GND
50%
VA, VB
V+
VOUT
V-
35pF
0
VOUT
90%
VX3,
VY3
300Ω
V-
tTRANS
tTRANS
V+
V+
VA, VB, VC
A, B, C
50Ω
V A, VB, V C
V+
W1, X1, Y1, Z1
V-
0
VW0,
VX0,
VY0,
VZ0
MAX4693
MAX4694
EN
V+
W0, X2, Y2, Z2,
X0, Y0, Z0
X, Y, Z
GND V-
50%
VOUT
35pF
300Ω
V-
90%
0
VOUT
VW1,
VX1,
VY1,
VZ1t
90%
TRANS
tTRANS
V- = 0 FOR SINGLE-SUPPLY OPERATION. (NOT PRESENT ON THE MAX4694)
TEST EACH SECTION INDIVIDUALLY.
Figure 3. Address Transition Time
______________________________________________________________________________________
15
MAX4691–MAX4694
Test Circuits/Timing Diagrams (continued)
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
MAX4691–MAX4694
Test Circuits/Timing Diagrams (continued)
V+
V+
VA, VB, VC
VA, VB
V+
X0–X7
A
B
50Ω
V+
X0–X3,
Y0–Y3
A
V+
B
50Ω
V+
C
MAX4692
MAX4691
EN
VOUT
X
GND
V-
EN
X, Y
GND
35pF
VOUT
V-
35pF
300Ω
300Ω
V-
VV+
VA, VB, VC
A, B, C
V+
W0, W1, X0, X1,
Y0, Y1, Z0, Z1
tR < 20ns
tF < 20ns
V+
VA, VB, VC
V+
50%
0
50Ω
MAX4693
MAX4694
EN
VW, VX, VY, VZ
90%
W, X, Y, Z
GND
V-
VOUT
35pF
300Ω
V-
VOUT
0
V- = 0 FOR SINGLE-SUPPLY OPERATION. (NOT PRESENT ON THE MAX4694)
TEST EACH SECTION INDIVIDUALLY.
tBBM
Figure 4. Break-Before-Make Interval
V+
V+
A
CHANNEL
SELECT
V+
W_, X_, Y_, Z_
VEN
0
B
C
VEN
MAX4691–
MAX4694
EN
GND
W, X, Y, Z
V-
50Ω
VOUT
CL = 1000pF
VV- = 0 FOR SINGLE-SUPPLY OPERATION. (NOT PRESENT ON THE MAX4694)
TEST EACH SECTION INDIVIDUALLY.
∆ VOUT IS THE MEASURED VOLTAGE DUE TO CHARGE
TRANSFER ERROR Q WHEN THE CHANNEL TURNS OFF.
Q = ∆ VOUT X CL
Figure 5. Charge Injection
16
∆ VOUT
VOUT
______________________________________________________________________________________
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
V+ 10nF
CHANNEL
SELECT
VIN
V+
W_, X_, Y_, Z_
A
NETWORK
ANALYZER
50Ω
50Ω
OFF-ISOLATION = 20log
VOUT
VIN
B
C
VEN
MAX4691–
MAX4694
ON-LOSS = 20log
VOUT
EN
W, X, Y, Z
V-
GND
MEAS.
REF.
CROSSTALK = 20log
50Ω
50Ω
VOUT
VIN
VOUT
VIN
10nF
VMEASUREMENTS ARE STANDARDIZED AGAINST SHORT AT SOCKET TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM AND “OFF” NO TERMINAL ON EACH SWITCH.
ON LOSS IS MEASURED BETWEEN COM AND “ON” NO TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL (A, B, C) TO ALL OTHER CHANNELS.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
V- IS NOT PRESENT ON THE MAX4694.
Figure 6. Off-Isolation, On-Loss, and Crosstalk
V+
V+
W_, X_, Y_, Z_
A
CHANNEL
SELECT
B
C
MAX4691–
MAX4694
EN
GND
W, X, Y, Z
V-
1MHz
CAPACITANCE
ANALYZER
V-
V- IS NOT PRESENT ON THE MAX4694.
Figure 7. Capacitance
______________________________________________________________________________________
17
MAX4691–MAX4694
Test Circuits/Timing Diagrams (continued)
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
MAX4691–MAX4694
Functional Diagrams (continued)
MAX4692
X0
X1
X
X2
X3
X0
X1
Y
X2
X3
LOGIC
A
B
MAX4693
Z0
Z
Z1
Y0
Y
Y1
EN
MAX4694
W0
W
W1
X0
X
X1
X0
X
X1
Y0
Z0
Y
Z
Y1
Z1
EN
A
B
C
A
B
Chip Information
TRANSISTOR COUNT: 292
18
______________________________________________________________________________________
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
TOP VIEW
MAX4691
A
1
2
3
4
X4
X
C
X0
B
X5
V-
GND
X1
C
X6
EN
V+
X2
D
X7
B
A
X3
X0
C
V-
X
16
15
14
13
X1
1
12
X4
GND
2
11
X5
X2
3
10
EN
X3
4
9
X6
MAX4691
UCSP
5
6
A
V+
7
8
B
X7
QFN
MAX4692
A
1
2
3
4
X0
X
Y
Y0
B
X1
C
D
V-
GND
Y1
X2
EN
V+
Y2
X3
B
A
Y3
Y0
Y
V-
X
16
15
14
13
Y1
1
12
X0
GND
2
11
X1
Y2
3
10
EN
Y3
4
9
X2
MAX4692
UCSP
5
6
7
8
A
V+
B
X3
QFN
______________________________________________________________________________________
19
MAX4691–MAX4694
Pin Configurations
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
MAX4691–MAX4694
Pin Configurations (continued)
TOP VIEW
MAX4693
A
B
1
2
3
4
X0
X
Y
Y0
X1
GND
V-
Y1
Y1
1
GND
2
Y0
Y
V-
X
16
15
14
13
12
X0
11
X1
MAX4693
C
Z1
EN
V+
A
D
Z0
Z
C
B
A
3
10
EN
B
4
9
Z1
UCSP
5
6
C
V+
7
8
Z
Z0
QFN
MAX4694
A
1
2
3
4
X0
X
Y
Y0
B
X1
GND
A
Y1
C
Z1
B
V+
W1
D
Z0
Z
W
W0
Y0
Y
GND
X
16
15
14
13
Y1
1
12
X0
A
2
11
X1
W1
3
10
B
W0
4
9
Z1
MAX4694
UCSP
5
6
7
8
W
V+
Z
Z0
QFN
20
______________________________________________________________________________________
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
16L,UCSP.EPS
______________________________________________________________________________________
21
MAX4691–MAX4694
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
12,16,20, 24L QFN.EPS
MAX4691–MAX4694
Low-Voltage 8:1 Mux/Dual 4:1 Mux/Triple SPDT/
Quad SPDT in UCSP Package
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
22 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2003 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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