Maxim MAX4841EXT-T Overvoltage protection controllers with status flag Datasheet

19-3044; Rev 0; 10/03
Overvoltage Protection Controllers with
Status FLAG
Additional features include a 15kV ESD-protected input
(when bypassed with a 1µF capacitor) and a shutdown
pin (EN) to turn off the device (MAX4838/MAX4840).
All devices are offered in a small 6-pin SC70 package
and are specified for operation from -40°C to +85°C.
Features
♦ Overvoltage Protection Up to 28V
♦ Preset 7.4V or 5.8V Overvoltage Trip Level
♦ Drive Low-Cost NMOS FET
♦ Internal 50ms Startup Delay
♦ Internal Charge Pump
♦ Undervoltage Lockout
♦ 15kV ESD-Protected Input
♦ Voltage Fault FLAG Indicator
♦ 6-Pin SC70 Package
Ordering Information
PART
TEMP RANGE
PINPACKAGE
TOP
MARK
MAX4838EXT-T
-40°C to +85°C
6 SC70-6
ABW
MAX4839EXT-T
-40°C to +85°C
6 SC70-6
ABY
MAX4840EXT-T
-40°C to +85°C
6 SC70-6
ABX
MAX4841EXT-T
-40°C to +85°C
6 SC70-6
ABZ
Applications
Typical Operating Circuit
Cell Phones
Digital Still Cameras
PDAs and Palmtop Devices
INPUT
+1.2V TO +28V
MP3 Players
OUTPUT
NMOS
Selector Guide
1
IN
GATE
4
VIO
1µF
PART
OV
UVLO
TRIP
EN
THRESHOLD
LEVEL INPUT
(V)
(V)
FLAG
OUTPUT
MAX4838EXT-T
3.25
7.4
Yes
Open-Drain
MAX4839EXT-T
3.25
7.4
No
Push-Pull
MAX4840EXT-T
3.25
5.8
Yes
Open-Drain
MAX4841EXT-T
3.25
5.8
No
Push-Pull
MAX4838–
MAX4841
6
2
EN
GND
FLAG
3
NOTE: EN AND PULLUP
RESISTOR ON MAX4838/
MAX4840 ONLY.
Pin Configuration appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX4838–MAX4841
General Description
The MAX4838–MAX4841 are overvoltage protection ICs
that protect low-voltage systems against voltages of up
to 28V. If the input voltage exceeds the overvoltage trip
level, the MAX4838–MAX4841 turn off the low-cost
external N-channel FET(s) to prevent damage to the
protected components. An internal charge pump eliminates the need for external capacitors and drives the
FET gate for a simple, robust solution.
The MAX4838/MAX4839 have a 7.4V overvoltage
threshold, and the MAX4840/MAX4841 have a 5.8V
overvoltage threshold. All devices have an undervoltage lockout threshold of 3.25V. In addition to the single
FET configuration, the devices can be configured with
back-to-back external FETs to prevent currents from
being back-driven into the adapter.
On power-up, the device waits for 50ms before driving
GATE high. FLAG is held low for an additional 50ms
after GATE goes high before deasserting. The
MAX4838/MAX4840 have an open-drain FLAG output,
and the MAX4839/MAX4841 have a push-pull FLAG
output. The FLAG output asserts immediately to an
overvoltage fault.
MAX4838–MAX4841
Overvoltage Protection Controllers with
Status FLAG
ABSOLUTE MAXIMUM RATINGS
IN to GND ..............................................................-0.3V to +30V
GATE to GND ........................................................-0.3V to +12V
EN, FLAG to GND ....................................................-0.3V to +6V
Continuous Power Dissipation (TA = +70°C)
6-Pin SC70 (derate 3.1mW/°C above +70°C) .............245mW
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature .................................................... +150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) ................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = +5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
Input Voltage Range
Undervoltage Lockout Threshold
SYMBOL
CONDITIONS
VIN
UVLO
MIN
1.2
VIN falling
3.0
Undervoltage Lockout Hysteresis
Overvoltage Trip Level
OVLO
IIN
UVLO Supply Current
GATE Voltage
7.4
7.8
5.8
6.1
MAX4838/MAX4839
100
MAX4840/MAX4841
80
No load, EN = GND or 5.5V, VIN = 5.4V
140
VIN = 2.9V
VGATE
IGATE sourcing 1µA
9
FLAG Output High Voltage
VOH
ISOURCE = 100µA, FLAG deasserted,
MAX4839/MAX4841
FLAG Output High Leakage
IOH
VFLAG = 5.5V, FLAG deasserted,
MAX4838/MAX4840
EN Input High Voltage
VIH
MAX4838/MAX4840
VIL
MAX4838/MAX4840
ILKG
VIN > VOVLO, VGATE = 5.5V
V
mV
240
µA
150
µA
10
60
V
mA
1.2V ≤ VIN < UVLO, ISINK = 50µA
0.4
VIN ≥ OVLO, ISINK = 1mA
0.4
2.4
V
V
1
1.47
µA
V
MAX4838/MAX4840, EN = GND or 5.5V
CIN ≥ 1µF
V
mV
7.0
VOL
2
V
3.5
5.5
FLAG Output Low Voltage
IN ESD rating
28.0
MAX4838/MAX4839
IPD
EN Input Leakage
UNITS
MAX4840/MAX4841
GATE Pulldown Current
EN Input Low Voltage
3.25
MAX
50
Overvoltage Trip Level Hysteresis
IN Supply Current
TYP
Human Body Model
15
IEC 1000-4-2
15
_______________________________________________________________________________________
0.65
V
1
µA
kV
Overvoltage Protection Controllers with
Status FLAG
MAX4838–MAX4841
ELECTRICAL CHARACTERISTICS (continued)
(VIN = +5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
TIMING
Startup Delay
tSTART
VIN > VUVLO, VGATE > 0.3V, Figure 1
20
50
80
ms
FLAG Blanking Time
tBLANK
VGATE = 0.3V,VFLAG = 2.4V, Figure 1
20
50
80
ms
GATE Turn-On Time
tGON
VGATE = 0.3V to 8V, CGATE = 1500pF,
Figure 1
GATE Turn-Off Time
tGOFF
VIN increasing from 5V to 8V at 3V/µs,
VGATE = 0.3V, CGATE = 1500pF, Figure 2
FLAG Assertion Delay
tFLAG
VIN increasing from 5V to 8V at 3V/µs,
VFLAG = 0.4V, Figure 2
5.8
µs
Initial Overvoltage Fault Delay
tOVP
VIN increasing from 0 to 8V,
IGATE = 80% of IPD, Figure 3
100
ns
Disable Time
tDIS
VEN = 2.4V, VGATE = 0.3V,
MAX4838/MAX4840, Figure 4
580
ns
7.0
ms
6
20
µs
Note 1: All parts are 100% tested at +25°C. Electrical limits across the full temperature range are guaranteed by design and
correlation.
Typical Operating Characteristics
(VIN = +5V, MAX4838; Si9936DY external MOSFET in back-to-back configuration; TA = +25°C, unless otherwise noted.)
REVERSE CURRENT
vs. OUTPUT VOLTAGE
300
200
9
100
GATE VOLTAGE (V)
400
GATE VOLTAGE vs. INPUT VOLTAGE
12
MAX4838 toc02
SINGLE MOSFET
REVERSE CURRENT (µA)
500
SUPPLY CURRENT (µA)
1000
MAX4838 toc01
600
MAX4838 toc03
SUPPLY CURRENT vs. INPUT VOLTAGE
10
1
6
MAX4840
MAX4841
MAX4838
MAX4839
3
BACK-TO-BACK MOSFETS
100
0
0
5
10
15
20
INPUT VOLTAGE (V)
25
30
0
0.1
3.5
4.0
4.5
5.0
OUTPUT VOLTAGE (V)
5.5
3
4
5
6
7
8
INPUT VOLTAGE (V)
_______________________________________________________________________________________
3
Typical Operating Characteristics (continued)
(VIN = +5V, MAX4838; Si9936DY external MOSFET in back-to-back configuration; TA = +25°C, unless otherwise noted.)
POWER-UP RESPONSE
GATE VOLTAGE vs. INPUT VOLTAGE
MAX4838 toc05
MAX4838 toc04
11.0
IGATE = 0
10.5
GATE VOLTAGE (V)
MAX4838–MAX4841
Overvoltage Protection Controllers with
Status FLAG
5V
0V
IN
IGATE = 4µA
10V
IGATE = 8µA
10.0
GATE
0V
OUT
5V
0V
9.5
5V
ROUT = ∞
COUT = 0
FLAG
9.0
5.0
5.1
5.2
5.3
5.4
5.5
20ms/div
INPUT VOLTAGE (V)
POWER-UP RESPONSE
OVERVOLTAGE RESPONSE
MAX4838 toc06
MAX4838 toc07
8V
5V
IN
0V
IN
5V
10V
10V
GATE
0V
GATE
0V
40mA
1A
IIN
0A
5V
IGATE
0A
5V
ROUT = 5Ω
FLAG
0V
CGATE = 1500pF
FLAG
0V
20ms/div
400ns/div
POWER-UP OVERVOLTAGE RESPONSE
POWER-DOWN RESPONSE
MAX4838 toc08
8V
MAX4838 toc09
IN
RLOAD = 50Ω
RFLAG = 100kΩ TO +5V
10V
5V
GATE
0V
GATE
0V
50mA
5V
IGATE
0A
OUT
0V
5V
FLAG
0V
5V
FLAG
0V
1µs/div
4
IN
0V
GATE PULLED UP
TO IN WITH 100Ω
0V
5V
10ms/div
_______________________________________________________________________________________
Overvoltage Protection Controllers with
Status FLAG
PIN
MAX4838/
MAX4840
MAX4839/
MAX4841
NAME
1
1
IN
2
2
GND
Ground
3
3
FLAG
Fault Indication Output, Active Low. FLAG is asserted low during undervoltage lockout
and overvoltage lockout conditions. FLAG is deasserted during normal operation. FLAG
is open-drain on the MAX4838/MAX4840, and push-pull on the MAX4839/MAX4841.
4
4
GATE
Gate-Drive Output. GATE is the output of an on-chip charge pump. When VUVLO < VIN <
VOVLO, GATE is driven high to turn on the external N-channel MOSFET(s).
5
5, 6
N.C.
6
VIN
FUNCTION
Input. IN is both the power-supply input and the overvoltage sense input. Bypass IN to
GND with a 1µF capacitor or larger.
No Connection. Can be connected to GND.
Device Enable Input, Active Low. Drive EN low or connect to ground to allow normal
device operation. Drive EN high to turn off the external MOSFET.
EN
—
5V
VIN
VUVLO
tGON
0V
8V
VOVLO
5V
tFLAG
tGOFF
8V
tSTART
VGATE
VGATE
0.3V
0.3V
tBLANK
2.4V
VFLAG
VFLAG
0.4V
Figure 2. Shutdown Timing Diagram
Figure 1. Startup Timing Diagram
VIN
8V
VOVLO
VEN
1.47V
0V
tDIS
tOVP
80%
VGATE
IGATE
0.3V
Figure 3. Power-Up Overvoltage Timing Diagram
Figure 4. Disable Timing Diagram
_______________________________________________________________________________________
5
MAX4838–MAX4841
Pin Description
MAX4838–MAX4841
Overvoltage Protection Controllers with
Status FLAG
IN
5.5V
REGULATOR
2x CHARGE
PUMP
GATE DRIVER
GATE
GND
UVLO AND
OVLO
DETECTOR
EN
CONTROL
LOGIC AND TIMER
FLAG
MAX4838–
MAX4841
Figure 5. Functional Diagram
Detailed Description
The MAX4838–MAX4841 provide up to 28V overvoltage
protection for low-voltage systems. When the input voltage exceeds the overvoltage trip level, the MAX4838–
MAX4841 turn off a low-cost external N-channel FET(s)
to prevent damage to the protected components. An
internal charge pump (Figure 5) drives the FET gate for
a simple, robust solution.
Undervoltage Lockout (UVLO)
The MAX4838–MAX4841 have a fixed 3.25V typical
undervoltage lockout level (UVLO). When VIN is less
than the UVLO, the GATE driver is held low and FLAG
is asserted.
Overvoltage Lockout (OVLO)
The MAX4838/MAX4839 have a 7.4V typical overvoltage threshold (OVLO), and the MAX4840/MAX4841
have a 5.8V typical overvoltage threshold. When VIN is
greater than OVLO, the GATE driver is held low and
FLAG is asserted.
FLAG Output
The FLAG output is used to signal the host system
there is a fault with the input voltage. FLAG asserts
immediately to an overvoltage fault. FLAG is held low
for 50ms after GATE turns on before deasserting.
The MAX4839 and MAX4841 have a push-pull FLAG output. The output high voltage is proportional to VIN for VIN
up to 5.5V, and fixed at 5.5V when VIN > 5.5V.
The MAX4838 and MAX4840 have an open-drain FLAG
output. Connect a pullup resistor from FLAG to the
logic I/O voltage of the host system.
EN Enable Input
EN is an active-low enable input on the MAX4838 and
MAX4840 only. Drive EN low or connect to ground to
6
enable normal device operation. Drive EN high to force
the external MOSFET(s) off. EN does not override an
OVLO or UVLO fault.
GATE Driver
An on-chip charge pump is used to drive GATE above
IN, allowing the use of low-cost N-channel MOSFETS.
The charge pump operates from the internal 5.5V
regulator.
The actual GATE output voltage tracks approximately
two times VIN until VIN exceeds 5.5V or the OVLO trip
level is exceeded, whichever comes first. The
MAX4838/MAX4839 have a 7.4V typical OVLO, therefore GATE remains relatively constant at about 10.5V
for 5.5V < VIN < 7.4V. The MAX4840/MAX4841 have a
5.8V typical OVLO, but this can be as low as 5.5V. The
MAX4840/MAX4841 in practice may never actually
achieve the full 10.5V GATE output. The GATE output
voltage as a function of input voltage is shown in the
Typical Operating Characteristics.
Device Operation
The MAX4838–MAX4841 have an on-board state
machine to control device operation. A flowchart is
shown in Figure 6. On initial power-up, if VIN < UVLO or
if VIN > OVLO, GATE is held at 0V, and FLAG is low.
If UVLO < VIN < OVLO and EN is low, the device enters
startup after a 50ms internal delay. The internal charge
pump is enabled, and GATE begins to be driven above
VIN by the internal charge pump. FLAG is held low during startup until the FLAG blanking period expires, typically 50ms after the GATE starts going high. At this
point the device is in its on state.
At any time if VIN drops below UVLO, FLAG is driven
low and GATE is driven to ground.
_______________________________________________________________________________________
Overvoltage Protection Controllers with
Status FLAG
VIN > UVLO
1
VIN < UVLO
GATE
4
VIO
MAX4838–
MAX4841
6
t = 50ms
2
OVLO CHECK
GATE = 0
FLAG = LOW
VIN < OVLO
STARTUP
GATE DRIVEN HIGH
FLAG = LOW
IN
1µF
TIMER STARTS
COUNTING
OUTPUT
NMOS
INPUT
0 TO 28V
VIN > OVLO
t = 50ms
ON
GATE HIGH
FLAG = HIGH
Figure 6. State Diagram
Applications Information
MOSFET Configuration
The MAX4838–MAX4841 can be used with either a single MOSFET configuration as shown in the Typical
Operating Circuit, or can be configured with a back-toback MOSFET as shown in Figure 7.
The MAX4838–MAX4841 can drive either a single
MOSFET or back-to-back MOSFETs. The back-to-back
configuration has almost zero reverse current when the
input supply is below the output.
If reverse current leakage is not a concern, a single
MOSFET can be used. This approach has half the loss
of the back-to-back configuration when used with similar MOSFET types, and is a lower cost solution. Note
that if the input is actually pulled low, the output is
pulled low as well due to the parasitic body diode in the
MOSFET. If this is a concern, then the back-to-back
configuration should be used.
EN
FLAG
GND
3
NOTE: EN AND PULLUP
RESISTOR ON MAX4838/
MAX4840 ONLY.
Figure 7. Back-to-Back External MOSFET Configuration
MOSFET Selection
The MAX4838–MAX4841 are designed for use with
either a single N-channel MOSFET or dual back-toback N-channel MOSFETs. In most situations,
MOSFETs with R DS(ON) specified for a V GS of 4.5V
work well. If the input supply is near the UVLO maximum of 3.5V consider using a MOSFET specified for a
lower VGS voltage. Also the VDS should be 30V for the
MOSFET to withstand the full 28V IN range of the
MAX4838–MAX4841. Table 1 shows a selection of
MOSFETs appropriate for use with the MAX4838–
MAX4841.
IN Bypass Considerations
For most applications, bypass IN to GND with a 1µF
ceramic capacitor. If the power source has significant
inductance due to long lead length, take care to prevent overshoots due to the LC tank circuit and provide
protection if necessary to prevent exceeding the 30V
absolute maximum rating on IN.
The MAX4838–MAX4841 provide protection against voltage faults up to 28V, but this does not include negative
voltages. If negative voltages are a concern, connect a
Schottky diode from IN to GND to clamp negative
input voltages.
ESD Test Conditions
ESD performance depends on a number of conditions.
The MAX4838–MAX4841 are specified for 15kV typical
ESD resistance on IN when IN is bypassed to ground
with a 1µF ceramic capacitor. Contact Maxim for a reliability report that documents test setup, methodology,
and results.
_______________________________________________________________________________________
7
MAX4838–MAX4841
STANDBY
GATE = 0
FLAG = LOW
MAX4838–MAX4841
Overvoltage Protection Controllers with
Status FLAG
Table 1. MOSFET Suggestions
Si9936DY
CONFIGURATION/
PACKAGE
Dual/SO8
30
RON AT 4.5V
(mΩ)
80
Si5904DC
Dual/1206-8
30
143
Si1426DH
Single/SC70-6
30
115
FDC6305N
Dual/SSOT-6
20
80
FDS8926A
Dual/SO8
30
20
FDG315N
Single/SC70-6
30
160
IRF7752
Dual/TSSOP-8
30
36
IRF7303
Dual/SO8
30
80
IRF7607
Single/Micro-8
20
30
PART
VDS MAX (V)
Human Body Model
Figure 8 shows the Human Body Model and Figure 9
shows the current waveform it generates when discharged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the device through a
1.5kΩ resistor.
IEC 1000-4-2
Since January 1996, all equipment manufactured and/or
sold in the European community has been required to
meet the stringent IEC 1000-4-2 specification. The IEC
1000-4-2 standard covers ESD testing and performance
of finished equipment; it does not specifically refer to
integrated circuits. The MAX4838–MAX4841 help users
RC
1MΩ
CHARGE-CURRENTLIMIT RESISTOR
HIGHVOLTAGE
DC
SOURCE
Cs
100pF
RD
1.5kΩ
Fairchild Semiconductor
www.fairchildsemi.com
207-775-8100
International Rectifier
www.irf.com
310-322-3331
design equipment that meets Level 3 of IEC 1000-4-2,
without additional ESD-protection components.
The main difference between tests done using the
Human Body Model and IEC 1000-4-2 is higher peak
current in IEC 1000-4-2. Because series resistance is
lower in the IEC 1000-4-2 ESD test model (Figure 10),
the ESD-withstand voltage measured to this standard is
generally lower than that measured using the Human
Body Model. Figure 11 shows the current waveform for
the ±8kV IEC 1000-4-2 Level 4 ESD Contact Discharge
test. The Air-Gap test involves approaching the device
with a charger probe. The Contact Discharge method
connects the probe to the device before the probe is
energized.
Ir
8
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
AMPERES
DEVICE
UNDER
TEST
36.8%
10%
0
0
Figure 8. Human Body ESD Test Model
Vishay Siliconix
www.vishay.com
402-563-6866
IP 100%
90%
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
MANUFACTURER
tRL
TIME
tDL
CURRENT WAVEFORM
Figure 9. Human Body Model Current Waveform
_______________________________________________________________________________________
Overvoltage Protection Controllers with
Status FLAG
MAX4838–MAX4841
I
100%
CHARGE-CURRENTLIMIT RESISTOR
HIGHVOLTAGE
DC
SOURCE
Cs
150pF
RD
330Ω
90%
DISCHARGE
RESISTANCE
I PEAK
RC
50Ω to 100Ω
DEVICE
UNDER
TEST
STORAGE
CAPACITOR
10%
t r = 0.7ns to 1ns
t
30ns
60ns
Figure 10. IEC 1000-4-2 ESD Test Model
Figure 11. IEC 1000-4-2 ESD Generator Current
Chip Information
Pin Configuration
TRANSISTOR COUNT: 737
PROCESS: BiCMOS
TOP VIEW
IN 1
GND 2
FLAG 3
MAX4838–
MAX4841
6
EN
(N.C.)
5
N.C.
4
GATE
( ) FOR MAX4839 AND MAX4841 ONLY.
_______________________________________________________________________________________
9
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
SC70, 6L.EPS
MAX4838–MAX4841
Overvoltage Protection Controllers with
Status FLAG
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2003 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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