19-2035; Rev 0; 5/01 150mA USB LDO Regulators with ±15kV TVS and µP Reset Features ♦ Integrated ±15kV Transient Voltage Suppressors for D+ and D- Data Lines The MAX5005/MAX5006/MAX5007 include an internal reset circuit that enables the USB microcontroller 100ms after the LDO regulator output voltage reaches regulation. Reset outputs are available in push-pull (active-low or active-high) and open-drain (active-low) options. The MAX5005/MAX5006/MAX5007 are optimized for use with a 1µF ceramic output capacitor. Each device includes thermal shutdown protection, output short-circuit protection, and output to input reverse leakage protection. These devices also include an active-low manual reset input. The MAX5005 features an open-drain reset output, the MAX5006 features an active-low push-pull reset output, and the MAX5007 features an active-high push-pull reset output. Each device is available in a space-saving 10-pin µMAX package. ♦ 25µA Quiescent Current at Full Load Applications USB Peripherals ♦ Pin Selectable Internal D+ and D- Termination Resistors (1.5kΩ ±5%) ♦ Integrated Microprocessor Reset Circuit with 100ms (min) Timeout ♦ 3.3V Output with ±3% Accuracy ♦ Small 1µF Output Capacitor ♦ Output to Input Reverse Leakage Protection ♦ Thermal and Short-Circuit Protection ♦ 10-Pin µMAX Package Ordering Information TEMP. RANGE PART MAX5005_EUB* -40°C to +85°C 10 µMAX OpenDrain Low MAX5006_EUB* -40°C to +85°C 10 µMAX Push-Pull Low MAX5007_EUB* -40°C to +85°C 10 µMAX Push-Pull High Pin Configuration Typical Operating Circuit 3.3V USB CONTROLLER USB PORT VBUS CIN D- RESET OUTPUT *Insert “A” for a 7.5% reset threshold and “B” for a 12.5% reset threshold. Hand-Held Instruments D+ PINPACKAGE SELR ENR 5V IN 3.3V OUT 1µF COUT CERAMIC 1µF MAX5005 MAX5006 MAX5007 D+ RESET (RESET) D- GND MR GND GND VCC TOP VIEW IN 1 RST D+ 10 OUT 2 D+ GND 3 D- D- 4 SELR 5 MAX5005 MAX5006 MAX5007 GND 8 MR 7 RESET/(RESET) 6 ENR µMAX 27Ω 27Ω 9 () FOR MAX5007 ONLY. ( ) FOR MAX5007 ONLY ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX5005/MAX5006/MAX5007 General Description The MAX5005/MAX5006/MAX5007 are low-dropout (LDO), micropower linear voltage regulators with an integrated microprocessor (µP) reset circuit for use with USB peripheral devices. Each device is available with a fixed +3.3V output voltage and can deliver up to 150mA load current. Each device features ±15kV transient voltage suppression (TVS) as well as precision 1.5kΩ data-line termination resistors for USB digital signals making them ideal for use with USB peripherals. MAX5005/MAX5006/MAX5007 150mA USB LDO Regulators with ±15kV TVS and µP Reset ABSOLUTE MAXIMUM RATINGS IN to GND .................................................................-0.3V to +6V D+, D- to GND..........................................................-0.3V to +6V MR to GND ..............................................-0.3V to (VOUT + 0.3V) RESET, RESET to GND, Push-Pull............-0.3V to (VOUT + 0.3V) RESET to GND, Open-Drain.....................................-0.3V to +6V OUT, SELR, ENR to GND .........................................-0.3V to +6V Maximum Current to Any Pin (except IN, OUT, D+, D-).............................................± 20mA Short-Circuit Duration ....................................................Indefinite Continuous Power Dissipation (TA = +70°C) 10-Pin µMAX (derate 5.6mW/°C above +70°C) ...........444mW Thermal Resistance (θJA)...............................................180°C/W Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN = +5V, IOUT = 0, COUT = 2.2µF, TA = -40°C to +85°C, unless otherwise noted. Typical specifications are at TA = +25°C.) (Note 1) PARAMETER Input Voltage Range Supply Current SYMBOL VIN IGND CONDITIONS ILOAD = 100mA MIN TYP 4.0 MAX UNITS 5.5 V 25 50 µA 3.3 3.4 ILOAD = 10mA 20 30 ILOAD = 150mA 300 400 Measured at GND REGULATOR Guaranteed Output Current IOUT Output Voltage VOUT Dropout Voltage (Note 2) ∆VDO 150 VIN = 4.0V to 5.5V, IOUT = 0 to 100mA Output Current Limit VIN = 5.5V Input Reverse Leakage Current VIN = 0, VOUT = 5.5V Startup Response Time Rising edge of VIN to VOUT RL = 500Ω Thermal Shutdown Temperature Thermal Shutdown Hysteresis 3.2 165 mA V mV 350 mA 1 µA 500 µs TJSHDN 160 o C ∆ TJSHDN 20 o C RESET CIRCUIT Reset Threshold (Note 3) VTH Reset Timeout Period tRP VOUT to Reset Delay tRD MAX500_AEUB 2.92 3.05 3.18 MAX500_BEUB 2.75 2.89 3.01 100 200 300 0.2 x VOUT VIL 0.8 x VOUT VIH MR Minimum Input Pulse Width 120 MR to Reset Delay 10 VIL Connects RTERM to D- VIH Connects RTERM to D+ 25 ns 45 0.2 x VOUT SELR Input Voltage 2 ns 500 MR Pullup Resistance to OUT V µs 1 MR Glitch Rejection ms µs 75 MR Input Voltage V 0.8 x VOUT _______________________________________________________________________________________ kΩ V 150mA USB LDO Regulators with ±15kV TVS and µP Reset (VIN = +5V, IOUT = 0, COUT = 2.2µF, TA = -40°C to +85°C, unless otherwise noted. Typical specifications are at TA = +25°C.) (Note 1) PARAMETER SYMBOL SELR Input Current CONDITIONS SELR = GND or OUT VIL RTERM enabled VIH RTERM disabled MIN TYP -1 VOL Open-Drain Reset Output Leakage Current (MAX5005) ILKG Push-Pull RESET Output Voltage (MAX5006) Push-Pull RESET Output Voltage (MAX5007) VOL 1 µA V 0.8 x VOUT ENR = GND or OUT Open-Drain RESET Output Low Voltage (MAX5005) UNITS 0.2 x VOUT ENR Input Voltage ENR Input Current MAX -1 1 VOUT > 1.0V, ISINK = 50µA, reset asserted 0.3 VOUT > 2.7V, ISINK = 3.2mA, reset asserted 0.4 Reset not asserted -1.0 1.0 VOUT = 1.0V, ISINK = 50µA, reset asserted 0.3 VOUT > VTH(MIN), ISINK = 3.2mA, reset asserted 0.4 VOH VOUT > VTH(MAX), ISOURCE = 500µA, reset not asserted VOL VOUT > VTH(MAX), ISINK = 3.2mA, reset not asserted VOH VOUT = 1.0V, ISOURCE = 150µA, reset asserted µA V µA V 0.8 x VOUT 0.4 V 0.8 x VOUT USB OPTIONS AND TRANSIENT SUPPRESSION D+/D- RTERM Impedance ENR = GND, SELR = GND or OUT D+/D- Input Leakage Current VENR = VOUT = 3.3V D+ to D- Capacitance 1MHz, 100mVp-p signal applied at D+ and D-, VOUT = 3.3V D+, D- Capacitance to GND 1MHz, 100mVp-p signal applied at D+ and D-, VOUT = 3.3V 1425 1500 -1 ENR = OUT 5.5 Unpowered 24 ENR = OUT 40 Unpowered 47 1575 Ω 1 µA pF pF ESD Trigger Voltage dV/dt < 1V/ns, VD+ or VD- > 3.6V 3.6 5 V Surge Trigger Voltage dV/dt < 2V/µs, VD+ or VD- > 3.6V 3.6 16 V Clamping Voltage 6A, pulse width = 200ns to 40µs 16 V Surge Current 16V, pulse width = 200ns to 40µs ±6 A Human Body Model MIL-STD-883 ±16 Contact Discharge IEC1000-4-2 (EN61000-4-2) ±8 Air Discharge IEC1000-4-2 (EN61000-4-2) ±15 D+/D- to GND ESD kV Note 1: All devices are 100% tested at TA = +25°C. Limits over temperature are guaranteed by characterization and not production tested. Note 2: Dropout voltage is defined as VIN - VOUT when VOUT is 2% below the value of VOUT for VIN = VOUT + 1V. Note 3: Specification is guaranteed to ±4σ limit. _______________________________________________________________________________________ 3 MAX5005/MAX5006/MAX5007 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (VIN = +5V, IOUT = 0, COUT = 2.2µF, unless otherwise noted.) GROUND-PIN CURRENT vs. SUPPLY VOLTAGE MAXIMUM PULSE DURATION vs. RESET THRESHOLD OVERDRIVE 24.0 23.5 150 RESET OCCURS ABOVE THIS LINE 100 50 23.0 IOUT = 0 22.5 0 22.0 3.5 4.0 4.5 5.0 1 5.5 10 MAX5005-7 toc03 100 0 15 30 45 60 75 90 105 120 135 150 RESET THRESHOLD OVERDRIVE, VTH - VOUT (mV) SUPPLY VOLTAGE (V) LOAD CURRENT (mA) POWER-SUPPLY REJECTION RATIO vs. FREQUENCY OUTPUT VOLTAGE vs. SUPPLY VOLTAGE 3.35 MAX5005-07 toc04 0 -5 3.34 -20 -25 -30 -35 -40 -45 IOUT = 0 3.33 OUTPUT VOLTAGE (V) -10 -15 PSRR (dB) 300 275 250 225 200 175 150 125 100 75 50 25 0 MAX5005-7 toc05 IOUT = 150mA 24.5 DROPOUT VOLTAGE (mV) 25.5 25.0 200 PULSE DURATION (µs) 26.0 MAX5005-7 toc02 26.5 DROPOUT VOLTAGE vs. LOAD CURRENT 250 MAX5005-7 toc01 27.0 GROUND-PIN CURRENT (µA) 3.32 3.31 IOUT = 150mA 3.30 3.29 3.28 3.27 -50 -55 -60 3.26 COUT = 1µF 3.25 0.01 0.1 1 FREQUENCY (kHz) 10 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) REGION OF STABLE COUT ESR vs. LOAD CURRENT OUTPUT NOISE MAX5005-7 toc07 MAX5005-7 toc06 150 125 COUT ESR (Ω) MAX5005/MAX5006/MAX5007 150mA USB LDO Regulators with ±15kV TVS and µP Reset 100 COUT = 1µF 75 VOUT 1mV/div COUT = 4.7µF 50 25 STABLE REGION BELOW THE CURVE 0 0 15 30 45 60 75 90 105 120 135 150 200µs/div LOAD CURRENT (mA) 4 _______________________________________________________________________________________ 150mA USB LDO Regulators with ±15kV TVS and µP Reset TURN-ON/TURN-OFF RESPONSE LOAD TRANSIENT RESPONSE STARTUP RESPONSE MAX5005-7 toc08 MAX5005-7 toc10a MAX5005-7 toc09 20mA ILOAD VIN 5V/div VIN 5V/div 0 VOUT 50mV/div VOUT 5V/div 3.3V RESET 5V/div COUT = 2.2µF VOUT 50mV/div VOUT 1V/div 3.3V COUT = 1.0µF RL = 1kΩ RL = 1kΩ 50ms/div 1.0ms/div 1ms/div LOAD TRANSIENT RESPONSE LINE TRANSIENT RESPONSE MAX5005-7 toc10b MAX5005-7 toc11a 5.25V VIN 200mV/div ILOAD 20mA 0 VOUT 50mV/div 4.75V 3.3V COUT = 10µF VOUT 50mV/div 3.3V VOUT 50mV/div 3.3V COUT = 4.7µF IOUT = 10mA COUT = IµF 1.0ms/div 100µs/div LINE TRANSIENT RESPONSE TVS PEAK POWER vs. PULSE WIDTH MAX5005-7 toc11b MAX5005-7 toc12 1000 5.25V PEAK POWER (W) VIN 200mV/div 4.75V 3.3V VOUT 50mV/div 100 10 IOUT = 10mA COUT = 1µF D+ OR D- WITH RESPECT TO GROUND 1 100µs/div 0.01 0.1 1 10 100 PULSE WIDTH (µs) _______________________________________________________________________________________ 5 MAX5005/MAX5006/MAX5007 Typical Operating Characteristics (continued) (VIN = +5V, IOUT = 0, COUT = 2.2µF, unless otherwise noted.) 150mA USB LDO Regulators with ±15kV TVS and µP Reset MAX5005/MAX5006/MAX5007 Pin Description PIN NAME DESCRIPTION 1 IN Regulator Input. Supply voltage ranges from +4.0V to +5.5V. Bypass with a 1µF ceramic capacitor to ground. 2 D+ D+ ESD/Transient Suppression Input. Connect directly to USB port D+ data input. SELR high and ENR low connects D+ to OUT through a 1.5kΩ resistor. 3, 9 GND Ground. This pin also functions as a heatsink. Solder to large pads or the circuit board ground plane to maximize thermal dissipation. 4 D- D- ESD/Transient Suppression Input. Connect directly to USB port D- data input. SELR low and ENR low connects D- to OUT through a 1.5kΩ resistor. 5 SELR USB Full-Speed/Low-Speed Termination Resistor Select. Logic high connects the termination resistor to D+ for full-speed peripherals. Logic low connects the termination resistor to D- for lowspeed peripherals. An internal 1.5kΩ resistor connects to OUT when ENR is low. 6 ENR USB Termination Resistor Enable. When reset is not asserted, ENR low enables the termination resistor connection. ENR high or a reset disables the termination resistor connection. RESET Active-Low Reset Output. RESET remains low while VOUT is below the reset threshold or while MR is held low. RESET remains low for the duration of the reset timeout period after the reset conditions are terminated. (MAX5005/MAX5006 ONLY) RESET Active-High Reset Output. RESET remains high while VOUT is below the reset threshold or while MR is held low. RESET remains high for the duration of the reset timeout period after the reset conditions are terminated. (MAX5007 ONLY) 8 MR Active-Low Manual Reset Input. A logic low forces a reset. Reset remains asserted for the duration of the reset timeout period after MR transitions from low to high. Leave unconnected or connect to OUT if not used. MR has an internal pullup resistor of 25kΩ to OUT. 10 OUT Voltage Regulator Output. Fixed +3.3V. Sources up to 150mA. Bypass with a 1µF (min) capacitor for full rated performance. 7 6 _______________________________________________________________________________________ 150mA USB LDO Regulators with ±15kV TVS and µP Reset MAX5005/MAX5006/MAX5007 IN 4.0V to 5.5V THERMAL PROTECTION REVERSE CURRENT PROTECTION OUT 3.3V CURRENT LIMIT PROTECTION MAX5005 MAX5006 MAX5007 ESD/ SURGE PROTECTION LDO ERROR AMP 200ms RESET TIMEOUT VREF 1.23V RESET/(RESET) RESET COMPARATOR GND FULL SPEED 25kΩ USB TERMINATION DRIVER LOW SPEED MR OUT OUT 1.5kΩ 1.5kΩ TVS TVS D- D+ SELR ENR GND ( ) FOR MAX5007 ONLY. Figure 1. Functional Diagram Detailed Description The MAX5005/MAX5006/MAX5007 are USB application-specific, low-dropout, low-quiescent current linear regulators with an integrated µP reset circuit (see Figure 1). The devices drive loads up to 150mA and are available with a fixed output voltage of +3.3V. Features include 1.5kΩ D+ and D- termination resistors and ±15kV transient voltage suppression (TVS) in accordance with IEC1000-4-2 (EN61000-4-2) Air Discharge Method and MILSTD883C- Method 3015-6 making the MAX5005/MAX5006/MAX5007 ideal for use with USB peripheral devices. The internal reset circuit monitors the regulator output voltage and asserts a reset signal when the output is typically -7.5% out of regulation for MAX500_AEUB and -12.5% out of regulation for MAX500_BEUB. Reset Circuit The reset supervisor circuit is fully integrated in the MAX5005/MAX5006/MAX5007, and uses the same reference voltage as the regulator. Two supply tolerance reset thresholds, typically -7.5% and -12.5%, are available for each type of device. 7.5% reset: Reset does not assert until the regulator output voltage is at least -3.6% out of tolerance and always asserts before the regulator output voltage is -11.5% out of tolerance. 12.5% reset: Reset does not assert until the regulator output voltage is at least -8.8% out of tolerance and always asserts before the regulator output voltage is -16.7% out of tolerance. Reset Output The MAX5005/MAX5006/MAX5007 µP supervisory circuits assert a reset during power-up, power-down, and _______________________________________________________________________________________ 7 MAX5005/MAX5006/MAX5007 150mA USB LDO Regulators with ±15kV TVS and µP Reset brownout conditions. Reset is guaranteed to be logic high or low depending on the device chosen (see Ordering Information). RESET or RESET asserts when VOUT is below the reset threshold and remains asserted for at least 100ms minimum after VOUT rises above the reset threshold. RESET or RESET also asserts when MR is pulled low. SELR and ENR When reset is not asserted a logic high to SELR connects a 1.5kΩ termination resistor from D+ to OUT for full speed USB peripherals and a logic low connects a 1.5kΩ termination resistor from D- to OUT for low-speed peripherals. Logic low on ENR enables the selected termination resistor connection and logic high disables the selected termination resistor connection. An asserted reset always disconnects the termination resistors. D+ and DD+ and D- include transient voltage suppressors rated at ±15kV (see USB ±15kV Transient Voltage Suppression section). The proprietary TVS shunt circuit passes no data through the MAX5005/MAX5006/MAX5007, thereby eliminating delays associated with series protection circuits. D+ and D- have only 1µA of leakage current and a typical input capacitance of 40pF at 1MHz. Manual Reset Input Many µP-based products require manual reset capability, allowing the operator, a test technician, or external logic circuitry to initiate a reset. A logic low on MR asserts a reset while the regulator output voltage is still within tolerance. can be powered from an auxiliary supply such as a backup battery without any need for additional blocking diodes. Current Limit The MAX5005/MAX5006/MAX5007 include a current limiter that monitors and controls the pass transistor’s gate voltage, limiting the output current to 350mA (typ). For design purposes, consider the current limit to be 160mA (min) to 600mA (max). The output can be shorted to ground for an indefinite period without damaging the part. Thermal Protection When the junction temperature exceeds TJ = +160°C, an internal thermal sensor signals the shutdown logic, turning off the pass transistor and allowing the IC to cool. The thermal sensor turns the pass transistor on again after the IC’s junction temperature decreases by 20°C, resulting in a pulsed output during continuous thermal overload conditions. Thermal overload protection is designed to protect the MAX5005/MAX5006/ MAX5007 in the event of fault conditions. For continuous operation, do not exceed the absolute maximum junction temperature rating of TJ = +150°C. Operating Region and Power Dissipation The MAX5005/MAX5006/MAX5007’s maximum power dissipation depends on the thermal resistance of the case and circuit board, the temperature difference between the die junction and the ambient air, and the rate of airflow. The power dissipation across the device is P = IOUT (VIN - VOUT). The maximum power dissipation is: Reset remains asserted while MR is low and for the reset timeout period (100ms minimum) after MR returns high. The MR input has an internal pullup of 25kΩ (typ) to OUT. Drive this input with TTL/CMOS logic levels or with open-drain/collector outputs. Connect a normally open momentary switch from MR to GND to create a manual reset function; external debounce circuitry is not required. If MR is driven from long cables or the device is used in a noisy environment, connect a 0.1µF capacitor from MR to GND to provide additional noise immunity. For proper operation, ensure that the voltage on MR is not greater than a diode drop above VOUT. PMAX = (TJ - TA) / (ΘJA) where TJ - TA is the temperature difference between the die junction and the surrounding air, ΘJA is the thermal resistance of the package from junction to ambient. The MAX5005/MAX5006/MAX5007’s ground pin (GND) performs the dual function of providing an electrical connection to the system ground and channeling heat away. Connect GND to the system ground using a large pad or ground plane. For optimum performance, minimize trace inductance to D+, D-, and GND. Output to Input Reverse Leakage Protection Capacitor Selection and Regulator Stability An internal circuit monitors the input and output voltages. When the output voltage is greater than the input voltage, the internal pass transistor and parasitic diodes turn off, and OUT powers the device. There is no leakage path from OUT to IN. Therefore, the output For stable operation over the full temperature range and with load currents up to 150mA, use a 1µF (min) output capacitor. To reduce noise and improve load transient response, stability, and power-supply rejection, use large output capacitor values such as 10µF. 8 Applications Information _______________________________________________________________________________________ 150mA USB LDO Regulators with ±15kV TVS and µP Reset Negative-Going VOUT Transients These devices are relatively immune to short-duration, negative-going VOUT transients. The Typical Operating Characteristics section shows a graph of the Maximum Pulse Duration vs. Reset Threshold Overdrive for which reset is not asserted. The graph was produced using negative going output transients starting at VOUT and ending below the reset threshold by the magnitude indicated (Reset Threshold Overdrive). The graph shows the maximum pulse width that a negative going VOUT transient can typically have without triggering a reset pulse. As the amplitude of the transient increases (i.e., goes further below the reset threshold), the maximum allowable pulse width decreases. Typically, a VOUT transient that goes only 10mV below the reset threshold and lasts for 75µs will not trigger a reset pulse. USB ±15kV Transient Voltage Suppression The universal serial bus (USB) simplifies interconnectivity between peripheral devices and personal computers. USBs offer high-speed data communication rates (up to 12Mbps) using only two lines (D+ and D-). CMOS based USB peripherals that utilize deep submicron technologies are more susceptible to electrostatic discharge (ESD) failure due to shorter channel lengths, shallower drain/source junctions, and lightly doped drain structures. The MAX5005/MAX5006/MAX5007 incorporate a proprietary transient voltage suppression (TVS) circuit for use with submicron devices. The TVS design complies with IEC-1000-4-2 level 4 (EN61000-4-2) ±15kV Air Discharge and ±8kV Contact Discharge as well as MIL STD 883C-Method 3015-6 level 3. The TVS circuit handles up to 11A of surge current. The TVS/ESD structure is directly coupled to the output of the LDO regulator. TVS Surge Test Information Figure 2 shows the test circuit used to generate the 8/40µs short circuit waveform of Figure 3. Figures 4, 5, and 6 show the actual surge current I/V characteristics with various capacitive loads. ESD Performance The MAX5005/MAX5006/MAX5007 are characterized to the following limits on D+, D-, and IN: • ±15kV using the Human Body Model • ±8kV using the Contact Discharge Method specified in IEC 1000-4-2 (EN61000-4-2) • ±15kV using the Air-Gap Discharge Method specified in IEC 1000-4-2 (EN61000-4-2). Note that in order to achieve the above ESD levels on IN, a ceramic 1µF ceramic capacitor should be connected from IN to GND. ESD Test Conditions ESD performance depends on several conditions. Contact Maxim for a reliability report that documents test setup, methodology, and results. Human Body Model Figure 7 shows the Human Body Model, and Figure 8 shows the current waveform it generates when discharged into low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the test device through a 1.5kΩ resistor. ESD Transmission Line Pulsing Figure 9 shows the test circuit used for transmission line pulsing conditions. The 200ns pulsewidth has a rise time of 4ns. Figure 10 shows the Current vs. Voltage characteristics for various output capacitance values. _______________________________________________________________________________________ 9 MAX5005/MAX5006/MAX5007 Note that some ceramic dielectrics exhibit large capacitance and ESR variation with temperature. With dielectrics such as Z5U and Y5V, it may be necessary to use 2.2µF or more to ensure stability at temperatures below -10°C. With X7R or X5R dielectrics, 1µF should be sufficient at all operating temperatures. Also, for high-ESR tantalum capacitors, 2.2µF or more may be needed to maintain stability. A graph of the Region of Stable C OUT ESR vs. Load Current is shown in the Typical Operating Characteristics. To improve power-supply rejection and transient response use a 1µF capacitor between IN and GND. IP 100% JENNINGS RELAY RF3D-26S 200kΩ 80µH 20Ω LEAKAGE RELAY 0.2µF HIGH VOLTAGE 40µs t2 AMPERES 50% D+/D- 2µF 4kV TVS DEVICE UNDER TEST Figure 2. Surge Current Test Circut 0 0 10 12 COUT = 0 D+ OR D- TO GND 10 8/40µs PULSE WIDTH 8 CURRENT (A) CURRENT (A) 8 6 TIME 8µs t1 Figure 3. Test Circuit Surge Current Waveform (Short-Circuit Load) 12 8/40µs PULSE WIDTH 4 6 4 2 2 0 0 0 2 4 6 8 10 12 14 16 18 20 VOLTAGE (V) Figure 4. Surge Current I/V Characteristic (COUT = 0) COUT = 1µF D+ OR D- TO GND 0 2 4 6 8 10 12 14 16 18 VOLTAGE (V) Figure 5. Surge Current I/V Characteristic (COUT = 1µF) 12 10 8/40µs PULSE WIDTH 8 CURRENT (A) MAX5005/MAX5006/MAX5007 150mA USB LDO Regulators with ±15kV TVS and µP Reset 6 4 COUT = 10µF D+ OR D- TO GND 2 0 0 2 4 6 8 10 12 14 16 18 VOLTAGE (V) Figure 6. Surge Current I/V Characteristic (COUT = 10µF) 10 ______________________________________________________________________________________ 150mA USB LDO Regulators with ±15kV TVS and µP Reset CHARGE-CURRENT LIMIT RESISTOR IP 100% 90% DISCHARGE RESISTANCE MAX5005/MAX5006/MAX5007 RD 1500Ω RC 1MΩ PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) Ir AMPERES HIGHVOLTAGE DC SOURCE Cs 100pF DEVICE UNDER TEST STORAGE CAPACITOR 36.8% 10% 0 0 Figure 7. Human Body ESD Test Model TIME tRL tDL CURRENT WAVEFORM Figure 8. Human Body Model Current Waveform 7 6 L 10MΩ 5 CURRENT (A) Zo = 50Ω SCOPE VIN DEVICE 4 D+ OR D- TO GND COUT = 0 200ns PULSE WIDTH 3 2 1 RL 0 0 2 4 6 8 10 12 14 16 VOLTAGE (V) Figure 10. Transmission Line Pulsing I/V Characteristic (COUT = 0) tRISE = 4ns 7 6 tpw = 200ns CURRENT (A) 5 4 D+ OR D- TO GND COUT = 1µF 200ns PULSE WIDTH 3 2 1 Figure 9. Transmission Line Pulsing Setup for ESD I/V Characteristics 0 0 2 4 6 8 10 12 14 16 VOLTAGE (V) Figure 11. Transmission Line Pulsing I/V Characteristic (COUT = 1µF) ______________________________________________________________________________________ 11 150mA USB LDO Regulators with ±15kV TVS and µP Reset MAX5005/MAX5006/MAX5007 Chip Information 7 6 CURRENT (A) 5 4 TRANSISTOR COUNT: 890 PROCESS: BiCMOS D+ OR D- TO GND COUT = 10µF 200ns PULSE WIDTH 3 2 1 0 0 2 4 6 8 10 12 14 16 VOLTAGE (V) 12 ______________________________________________________________________________________