Maxim MAX5929CEEG Low-voltage, quad, hot-swap controllers/power sequencer Datasheet

19-4087; Rev 0; 5/08
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
Features
The MAX5927A/MAX5929A–MAX5929D +1V to +15V
quad hot-swap controllers provide complete protection
for multisupply systems. They allow the safe insertion
and removal of circuit cards into live backplanes. These
devices hot swap multiple supplies ranging from +1V to
+15V, provided one supply is at or above +2.7V. The
input voltage rails (channels) can be configured to
sequentially turn-on/off, track each other, or have completely independent operation.
The discharged filter capacitors of the circuit card provide
low impedance to the live backplane. High inrush currents
from the backplane to the circuit card can burn up connectors and components, or momentarily collapse the backplane power supply leading to a system reset. The
MAX5927A/MAX5929A–MAX5929D hot-swap controllers
prevent such problems by gradually ramping up the output
voltage and regulating the current to a preset limit when the
board is plugged in, allowing the system to stabilize safely.
After the startup cycle is complete, on-chip comparators
provide VariableSpeed/BiLevel™ protection against shortcircuit and overcurrent faults, and provide immunity against
system noise and load transients. The load is disconnected
in the event of a fault condition. The MAX5929C/
MAX5929D automatically restart after a fault condition,
while the MAX5929A/MAX5929B must be unlatched. The
MAX5927A fault management mode is selectable.
The MAX5927A/MAX5929A–MAX5929D offer a variety of
options to reduce external component count and design
time. All devices integrate an on-board charge pump to
drive the gates of low-cost external n-channel MOSFETs,
an adjustable startup timer, and an adjustable current
limit. The devices offer integrated features like startup
current regulation and current glitch protection to eliminate external timing resistors and capacitors. The
MAX5929B/MAX5929D provide an open-drain, active-low
status output for each channel, the MAX5929A/
MAX5929C provide an open-drain, active-high status output for each channel, and the MAX5927A status output
polarity is selectable.
The MAX5927A is available in a 32-pin thin QFN package
and the MAX5929A–MAX5929D are available in a 24-pin
QSOP package. All devices are specified over the -40°C
to +85°C extended temperature range.
o Safe Hot Swap for +1V to +15V Power Supplies
with Any Input Voltage (VIN_ ≥ 2.7V)
o Adjustable Circuit-Breaker/Current-Limit
Threshold from 25mV to 100mV
o Configurable Tracking, Sequencing, or
Independent Operation Modes
o VariableSpeed/BiLevel Circuit-Breaker Response
o Internal Charge Pumps Generate n-Channel
MOSFET Gate Drives
o Inrush Current Regulated at Startup
o Autoretry or Latched Fault Management
o Programmable Undervoltage Lockout
o Status Outputs Indicate Fault/Safe Condition
TEMP RANGE
PIN-PACKAGE
MAX5927AETJ+
-40°C to +85°C
32 Thin QFN-EP*
MAX5929AEEG+
-40°C to +85°C
24 QSOP
MAX5929BEEG+
-40°C to +85°C
24 QSOP
MAX5929CEEG+
-40°C to +85°C
24 QSOP
MAX5929DEEG+
-40°C to +85°C
24 QSOP
*EP = Exposed pad.
+Denotes a lead-free/RoHS-compliant package.
Selector Guide and Typical Operating Circuit appear at end
of data sheet.
LIM1
ON1
ON2
POL
MODE
ON3
ON4
LIM2
31
30
29
28
27
26
25
TOP VIEW
32
Pin Configurations
+
IN1
1
24
IN2
SENSE1
2
23
SENSE2
GATE1
3
22
GATE2
LIM4
4
21
LIM3
IN4
5
20
N.C.
SENSE4
6
19
IN3
GATE4
7
18
SENSE3
STAT1
8
17
GATE3
9
10
11
12
13
14
15
16
N.C.
LATCH
STAT3
STAT4
BIAS
GND
MAX5927A
TIM
PCI Express® Hot Plug
Basestation Line Cards
Hot Plug-In Daughter Cards Portable Computer Device
Bays (Docking Stations)
RAID
Network Switches, Routers,
Power-Supply
Hubs
Sequencing/Tracking
VariableSpeed/BiLevel is a trademark of Maxim Integrated
Products, Inc.
PCI Express is a registered trademark of PCI-SIG Corp. trademark
PART
STAT2
Applications
Ordering Information
THIN QFN
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX5927A/MAX5929A–MAX5929D
General Description
MAX5927A/MAX5929A–MAX5929D
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND, unless otherwise noted.)
IN_ ..........................................................................-0.3V to +16V
GATE_.............................................................-0.3V to (IN_ + 6V)
BIAS (Note 1) .............................................. (VIN - 0.3V) to +16V
ON_, STAT_, LIM_ (MAX5927A), TIM, MODE,
LATCH (MAX5927A), POL (MAX5927A)
(Note 1) .....................................................-0.3V to (VIN + 0.3V)
SENSE_........................................................-0.3V to (IN_ + 0.3V)
Current into Any Pin..........................................................±50mA
Continuous Power Dissipation (TA = +70°C)
24-Pin QSOP (derate 9.5mW/°C above +70°C)............762mW
32-Pin Thin QFN (derate 21.3mW/°C above +70°C) ..1702mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1: VIN is the largest of VIN1, VIN2, VIN3, and VIN4.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN_ = +1V to +15V provided at least one supply is larger than or equal to +2.7V, TA = -40°C to +85°C, unless otherwise noted.
Typical values are at VIN1 = 12.0V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, VON_ = +3.3V, and TA = +25°C.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
15
V
2.5
5
mA
25
28
POWER SUPPLIES
IN_ Input Voltage Range
Supply Current
VIN_
IQ
At least one VIN_
1.0
IIN1 + IIN2 + IIN3 + IIN4, VON_ = 2.7V,
VIN_ = +15V, after STAT_ asserts
CURRENT CONTROL
Slow-Comparator Threshold
(VIN_ - VSENSE_)
(Note 3)
Slow-Comparator Response Time
(Note 4)
Fast-Comparator Threshold
(VIN_ - VSENSE_)
Fast-Comparator Response Time
SENSE_ Input Bias Current
2
VSC,TH
LIM_ = GND, MAX5927A/
MAX5929A–MAX5929D (Note 4)
RLIM_ = 10kΩ (MAX5927A)
RLIM_ from LIM_ to GND (MAX5927A)
tSCD
tFCD
80
125
mV
RLIM_ x 7.5 x
10-6 + 25mV
1mV overdrive
3
ms
50mV overdrive
130
µs
2x
VFC,TH
IB SENSE_
22.5
mV
VSC,TH
10mV overdrive, from overload condition
200
VSENSE_ = VIN_
0.03
_______________________________________________________________________________________
ns
1
µA
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
(VIN_ = +1V to +15V provided at least one supply is larger than or equal to +2.7V, TA = -40°C to +85°C, unless otherwise noted.
Typical values are at VIN1 = 12.0V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, VON_ = +3.3V, and TA = +25°C.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
RTIM = 100kΩ
8.0
10.8
13.6
RTIM = 4kΩ (minimum value)
UNITS
MOSFET DRIVER
Startup Period (Note 5)
tSTART
0.30
0.4
0.55
TIM floating (default)
5
9
14
Charging, VGATE_ = GND, VIN_ = 5V
(Note 6)
80
100
125
Discharging, during startup
Average Gate Current
IGATE
Discharging, normal turn-off or triggered by
the slow comparator after startup,
VGATE_ = 5V, VIN_ = 10V, VON_ = 0V
ms
µA
100
2
3
7
mA
Gate-Drive Voltage
VDRIVE
Discharging, triggered by a fault after
startup, VGATE_ = 5V, VIN_ = 10V,
(VIN_ - VSENSE_) > VFC,TH (Note 7)
28
50
120
VGATE_ - VIN_, IGATE_ = 1µA
4.9
5.3
5.6
Low to high
0.83
0.875
0.90
V
ON COMPARATOR
ON_ Threshold
VON_,TH
ON_ Propagation Delay
Hysteresis
25
10mV overdrive
10
ON_ Voltage Range
VON_
Without false output inversion
ON_ Input Bias Current
IBON_
VON_ = VIN
ON_ Pulse Width Low
tUNLATCH
To unlatch after a latched fault
0.03
V
mV
µs
VIN
V
1
µA
100
µs
DIGITAL OUTPUTS (STAT_)
Output Leakage Current
VSTAT_ ≤ 15V
Output Voltage Low
POL = unconnected (MAX5927A),
ISINK = 1mA
VOL_
1
µA
0.4
V
2.65
V
UNDERVOLTAGE LOCKOUT (UVLO)
UVLO Threshold
VUVLO
UVLO Hysteresis
VUVLO,HYST
UVLO Glitch Filter Reset Time
UVLO to Startup Delay
tD, GF
tD,UVLO
Input Power-Ready Threshold
VPWRRDY
Input Power-Ready Hysteresis
VPWRHYST
Startup is initiated when this threshold is
reached by any VIN_ and VON_ > 0.9V
(Note 8)
2.25
250
VIN < VUVLO maximum pulse width to reset
mV
10
µs
ms
Time input voltage must exceed VUVLO
before startup is initiated
20
37.5
60
(Note 9)
0.9
0.95
1.0
50
V
mV
_______________________________________________________________________________________
3
MAX5927A/MAX5929A–MAX5929D
ELECTRICAL CHARACTERISTICS (continued)
ELECTRICAL CHARACTERISTICS (continued)
(VIN_ = +1V to +15V provided at least one supply is larger than or equal to +2.7V, TA = -40°C to +85°C, unless otherwise noted.
Typical values are at VIN1 = 12.0V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, VON_ = +3.3V, and TA = +25°C.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LOGIC AND TIMING
POL Input Pullup
POL = GND (MAX5927A)
2
4
6
µA
LATCH Input Pullup
ILATCH
LATCH = GND (MAX5927A)
2
4
6
µA
MODE Input Voltage
VMODE
MODE unconnected (default to sequencing
mode)
1.0
1.25
1.5
V
IPOL
0.4
V
Independent Mode Selection
Threshold
VINDEP, TH
Tracking Mode Selection
Threshold
VTRACK, TH VMODE rising
MODE Input Impedance
RMODE
Autoretry Delay
tRETRY
VMODE rising
2.7
V
Delay time to restart after fault shutdown
200
kΩ
64 x
tSTART
ms
Note 2: All devices are 100% tested at TA = +85°C. Limits over temperature are guaranteed by design.
Note 3: The slow-comparator threshold is adjustable. VSC,TH = RLIM x 7.5µA + 25mV (see the Typical Operating Characteristics).
Note 4: The current-limit slow-comparator response time is weighed against the amount of overcurrent—the higher the overcurrent
condition, the faster the response time (see the Typical Operating Characteristics).
Note 5: The startup period (tSTART) is the time during which the slow comparator is ignored and the device acts as a current limiter
by regulating the sense current with the fast comparator (see the Startup Period section).
Note 6: The current available at GATE is a function of VGATE (see the Typical Operating Characteristics).
Note 7: After a fault triggered by the fast comparator, the gate is discharged by the strong discharge current.
Note 8: Each channel input while the other inputs are at +1V.
Note 9: Each channel input while any other input is at +3.3V.
Typical Operating Characteristics
(Typical Operating Circuit, Q1 = Q2 = Q3 = Q4 = Fairchild FDB7090L, VIN1 = 12V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, TA =
+25°C, unless otherwise noted. Channels 1 through 4 are identical in performance. Where characteristics are interchangeable,
channels 1 through 4 are referred to as W, X, Y, and Z.)
IINW + IINX + IINY + IINZ
3.5
3.0
2
4
6
8
VINW (V)
4
10
12
14
MAX5927A toc03
IINX + IINY + IINZ
0.5
0
1.0
0
IINW
1.5
VON = 3.3V
1.5
IINX + IINY + IINZ
IINW + IINX + IINY + IINZ
1.0
VON = 0V
2.0
0
VON_ = VINX = VINY = VINZ = 2.7V
VINW = 2.8V
2.0
2.5
1
2.5
IIN (mA)
IIN (mA)
4.0
IINW
2
IIN = IIN1 + IIN2 + IIN3 + IIN4
VIN = VINW = VINX = VINY = VINZ
VON = VON1 = VON2 = VON3 = VON4
4.5
3.0
MAX5927A toc02
VINX = VINY = VINZ = 2.7V
3
5.0
MAX5927A toc01
4
SUPPLY CURRENT
vs. TEMPERATURE
TOTAL SUPPLY CURRENT
vs. INPUT VOLTAGE
SUPPLY CURRENT vs. INPUT VOLTAGE
IIN (mA)
MAX5927A/MAX5929A–MAX5929D
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
2
4
6
8
VIN (V)
10
12
14
-40
-15
10
35
TEMPERATURE (°C)
_______________________________________________________________________________________
60
85
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
GATE CHARGE CURRENT
vs. GATE VOLTAGE
4
2
VONW = VINX = VINY = VINZ = 2.7V
VINW = 13.2V
120
VINW = 5V
90
60
VINW = 1V
30
200
VINW = 13.2V
GATE CHARGE CURRENT (μA)
VDRIVEW (V)
6
150
MAX5927A toc05
VINX = VINY = VINZ = 2.7V
GATE CHARGE CURRENT (μA)
MAX5927A toc04
8
GATE CHARGE CURRENT
vs. TEMPERATURE
MAX5927A toc06
GATE-DRIVE VOLTAGE
vs. INPUT VOLTAGE
160
120
VINW = 5V
80
40
VONW = VINX = VINY = VINZ = 2.7V
VGATEW = 0V
0
4
6
8
10
12
14
0
5
10
15
-40
20
-15
10
35
60
VGATEW (V)
TEMPERATURE (°C)
GATE DISCHARGE CURRENT (NORMAL)
vs. GATE VOLTAGE
GATE DISCHARGE CURRENT (NORMAL)
vs. TEMPERATURE
TURN-OFF TIME
vs. SENSE VOLTAGE
VINW = 5V
3
VINW = 3.3V
2
1
VINW = 1V
0
4
0
VINW = 5V
4
3
VINW = 3.3V
2
1
12
16
0.1
0.01
SLOW-COMPARATOR
THRESHOLD
0.001
FAST-COMPARATOR
THRESHOLD
0.0001
-40
20
1
VINW = 1V
0
8
MAX5927A toc09
VINW = 13.2V
TURN-OFF TIME (ms)
4
5
-15
10
35
60
85
0
25
50
75
VGATEW (V)
TEMPERATURE (°C)
VINW - VSENSEW (mV)
TURN-OFF TIME vs. SENSE VOLTAGE
(EXPANDED SCALE)
SLOW-COMPARATOR THRESHOLD
vs. RLIMW
STARTUP PERIOD
vs. RTIM
100
40
tSTART (ms)
VSC,TH (mV)
125
60
80
1
100
MAX5927A toc12
120
MAX5927A toc10
10
85
10
MAX5927A toc08
VINW = 13.2V
VONW = 0V
VINX = VINY = VINZ = 2.7V
MAX5927A toc11
5
6
GATE DISCHARGE CURRENT (mA)
VONW = 0V
VINX = VINY = VINZ = 2.7V
MAX5927A toc07
GATE DISCHARGE CURRENT (mA)
2
VINW (V)
6
TURN-OFF TIME (ms)
0
0
0
60
40
20
20
SLOW-COMPARATOR THRESHOLD
0
0
0.1
20
25
30
35
40
VINW - VSENSEW (mV)
45
50
0
2
4
6
RLIMW (kΩ)
8
10
0
100
200
300
RTIM (kΩ)
400
500
_______________________________________________________________________________________
5
MAX5927A/MAX5929A–MAX5929D
Typical Operating Characteristics (continued)
(Typical Operating Circuit, Q1 = Q2 = Q3 = Q4 = Fairchild FDB7090L, VIN1 = 12V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, TA =
+25°C, unless otherwise noted. Channels 1 through 4 are identical in performance. Where characteristics are interchangeable,
channels 1 through 4 are referred to as W, X, Y, and Z.)
Typical Operating Characteristics (continued)
(Typical Operating Circuit, Q1 = Q2 = Q3 = Q4 = Fairchild FDB7090L, VIN1 = 12V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, TA =
+25°C, unless otherwise noted. Channels 1 through 4 are identical in performance. Where characteristics are interchangeable,
channels 1 through 4 are referred to as W, X, Y, and Z.)
TURN-OFF TIME
SLOW-COMPARATOR FAULT
VSTATW
2V/div
MAX5927A toc14
MAX5927A toc13
TURN-OFF TIME
FAST-COMPARATOR FAULT
VSTATW
2V/div
0V
0V
VINW - VSENSEW
25mV/div
VINW - VSENSEW
100mV/div
0V
VGATEW
5V/div
0V
VGATEW
5V/div
0V
1ms/div
100ns/div
MAX5927A toc15
VONW
5V/div
VSTATW
5V/div
IINW
2A/div
MAX5927A toc16
STARTUP WAVEFORMS SLOW TURN-ON
(CGATE = 0.22μF, CBOARD = 1000μF)
STARTUP WAVEFORMS FAST TURN-ON
(CGATE = 0nF, CBOARD = 1000μF)
VONW
5V/div
VSTATW
5V/div
VGATEW
10V/div
IINW
2A/div
VGATEW
10V/div
VOUTW
10V/div
VOUTW
10V/div
2ms/div
10ms/div
VGATEW
2V/div
0V
VPWRRDY
0V
VONW
2V/div
VOUTW
2V/div
0V
VGATEX
IOUTW
500mA/div
5V/div
0V
0V
100ms/div
6
VINW
2V/div
MAX5927A toc18
TURN-ON IN
VOLTAGE-TRACKING MODE
AUTORETRY DELAY (TIME FLOATING)
MAX5927A toc17
MAX5927A/MAX5929A–MAX5929D
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
VGATEW
4ms/div
_______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
MAX5927A toc19
VPWRRDY
VINW
2V/div
0V
VPWRRDY
0V
VONW
2V/div
0V
VONW
2V/div
0V
VGATEX
VGATEX
5V/div
VGATEW
VGATEW
0V
4ms/div
4ms/div
TURN-ON IN
XXXX MODE
INDEPENDENT
VPWRRDY
VONW
2V/div
0V
5V/div
0V
MAX5927A toc22
VINW
2V/div
0V
MAX5927A toc21
TURN-OFF IN
XXXX
POWER-SEQUENCING
MODE
VINW
2V/div
0V
VONW
2V/div
0V
VGATEX
VGATEX
VGATEW
5V/div
0V
VGATEW
4ms/div
4ms/div
STRONG GATE DISCHARGE CURRENT
vs. OVERDRIVE
VPWRRDY
0V
VGATEX
5V/div
VGATEW
50
GATE DISCHARGE CURRENT (mA)
VINW
2V/div
0V
VONW
2V/div
MAX5927A toc23
TURN-OFF IN
XXXX MODE
INDEPENDENT
MAX5927A toc24
5V/div
0V
VINW
2V/div
MAX5927A toc20
TURN-ON IN
XXXX
POWER-SEQUENCING
MODE
TURN-OFF IN
XXXX
VOLTAGE-TRACKING
MODE
VONW = VIN
VGATE = 5V
AFTER STARTUP
40
VINW = 12V
30
VINW = 5V
20
VINW = 2.7V
10
0V
0
4ms/div
20
25
35
40
30
VIN_ - VSENSE_ (mV)
45
50
_______________________________________________________________________________________
7
MAX5927A/MAX5929A–MAX5929D
Typical Operating Characteristics (continued)
(Typical Operating Circuit, Q1 = Q2 = Q3 = Q4 = Fairchild FDB7090L, VIN1 = 12V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, TA =
+25°C, unless otherwise noted. Channels 1 through 4 are identical in performance. Where characteristics are interchangeable,
channels 1 through 4 are referred to as W, X, Y, and Z.)
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
MAX5927A/MAX5929A–MAX5929D
Pin Description
PIN
8
MAX5927A
MAX5929A–
MAX5929D
NAME
FUNCTION
1
4
IN1
Channel 1 Supply Input. Connect to a supply voltage from 1V to 15V and to one end of
RSENSE1. Bypass with a 0.1µF capacitor to ground.
2
5
SENSE1
Channel 1 Current-Sense Input. Connect SENSE1 to the drain of an external MOSFET
and to one end of RSENSE1.
3
6
GATE1
Channel 1 Gate-Drive Output. Connect to gate of external n-channel MOSFET.
4
—
LIM4
Channel 4 Current-Limit Setting. Connect a resistor from LIM4 to GND to set current-trip
level. Connect to GND for the default 25mV threshold. Do not leave unconnected.
5
7
IN4
Channel 4 Supply Input. Connect to a supply voltage from 1V to 15V and to one end of
RSENSE4. Bypass with a 0.1µF capacitor to ground.
6
8
SENSE4
Channel 4 Current-Sense Input. Connect SENSE4 to the drain of an external MOSFET
and to one end of RSENSE4.
7
9
GATE4
Channel 4 Gate-Drive Output. Connect to gate of external n-channel MOSFET.
8
10
STAT1
Open-Drain Status Signal for Channel 1. STAT1 asserts when hot swap is successful and
tSTART has elapsed. STAT1 deasserts if ON1 is low, or if channel 1 is turned off for any
fault condition.
9
11
STAT2
Open-Drain Status Signal for Channel 2. STAT2 asserts when hot swap is successful and
tSTART has elapsed. STAT2 deasserts if ON2 is low, or if channel 2 is turned off for any
fault condition.
10
12
TIM
11, 20
—
N.C.
Startup Timer Setting. Connect a resistor from TIM to GND to set the startup period.
Leave TIM unconnected for the default startup period of 9ms. RTIM must be between
4kΩ and 500kΩ.
No Connection. Not internally connected.
12
—
LATCH
Latch/Autoretry Selection Input. Connect LATCH to GND for autoretry mode after a fault.
Leave LATCH unconnected for latch mode.
13
13
STAT3
Open-Drain Status Signal for Channel 3. STAT3 asserts when hot swap is successful and
tSTART has elapsed. STAT3 deasserts if ON3 is low, or if channel 3 is turned off for any
fault condition.
14
14
STAT4
Open-Drain Status Signal for Channel 4. STAT4 asserts when hot swap is successful and
tSTART has elapsed. STAT4 deasserts if ON4 is low, or if channel 4 is turned off for any
fault condition.
15
15
BIAS
Supply Reference Output. The highest supply is available at BIAS for filtering. Connect a
1nF to 10nF ceramic capacitor from BIAS to GND. No other connections are allowed to
this pin.
16
16
GND
17
17
GATE3
Channel 3 Gate-Drive Output. Connect to gate of external n-channel MOSFET.
Ground
18
18
SENSE3
Channel 3 Current-Sense Input. Connect SENSE3 to the drain of an external MOSFET
and to one end of RSENSE3.
19
19
IN3
Channel 3 Supply Input. Connect to a supply voltage from 1V to 15V and to one end of
RSENSE3.
21
—
LIM3
Channel 3 Current-Limit Setting. Connect a resistor from LIM3 to GND to set current-trip
level. Connect to GND for the default 25mV threshold. Do not leave unconnected.
_______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
PIN
MAX5927A
MAX5929A–
MAX5929D
NAME
FUNCTION
22
20
GATE2
Channel 2 Gate-Drive Output. Connect to gate of external n-channel MOSFET.
23
21
SENSE2
Channel 2 Current-Sense Input. Connect SENSE2 to the drain of an external MOSFET
and to one end of RSENSE2.
24
22
IN2
Channel 2 Supply Input. Connect to a supply voltage from 1V to 15V and to one end of
RSENSE2.
25
—
LIM2
Channel 2 Current-Limit Setting. Connect a resistor from LIM2 to GND to set the currenttrip level. Connect to GND for the default 25mV threshold. Do not leave unconnected.
26
23
ON4
On/Off Channel 4 Control Input. See the Mode section.
27
24
ON3
On/Off Channel 3 Control Input. See the Mode section.
28
1
MODE
29
—
POL
STAT Output Polarity Select. See Table 3 and the Status Output section.
30
2
ON2
On/Off Channel 2 Control Input. See the Mode section.
31
3
ON1
On/Off Channel 1 Control Input. See the Mode section.
Mode Configuration Input. Mode is configured according to Table 1 as soon as one of
the IN_ voltages exceeds UVLO and before turning on OUT_. See the Mode section.
32
—
LIM1
Channel 1 Current-Limit Setting. Connect a resistor from LIM1 to GND to set the currenttrip level. Connect to GND for the default 25mV threshold. Do not leave unconnected.
EP
—
EP
Exposed Pad. EP is internally connected to GND. Leave EP unconnected or connect to
GND.
Detailed Description
The MAX5927A/MAX5929A–MAX5929D are circuitbreaker ICs for hot-swap applications where a line card
is inserted into a live backplane. The MAX5927A/
MAX5929A–MAX5929D operate down to 1V provided
one of the inputs is at or ≥ 2.7V. Normally, when a line
card is plugged into a live backplane, the card’s discharged filter capacitors provide low impedance that
can momentarily cause the main power supply to collapse. MAX5927A/MAX5929A–MAX5929D reside either
on the backplane or on the removable card to provide
inrush current limiting and short-circuit protection. This is
achieved by using external n-channel MOSFETs, external current-sense resistors, and on-chip comparators.
The startup period and current-limit threshold of the
MAX5927A/MAX5929A–MAX5929D can be adjusted
with external resistors. Figure 1 shows the MAX5927A/
MAX5929A–MAX5929D functional diagram.
The MAX5927A offers four programmable current limits,
selectable fault management mode, and selectable
STAT_ output polarity. The MAX5929A–MAX5929D feature fixed current limits, and a variety of fault management and STAT_ polarity option combinations.
Mode
The MAX5927A/MAX5929A–MAX5929D support three
modes of operation: voltage tracking, power sequencing, and independent. Select the appropriate mode
according to Table 1.
Voltage-Tracking Mode
Connect MODE high to enter voltage-tracking mode.
While in voltage-tracking mode, all channels turn on
and off together. To turn all channels on:
• At least one VIN_ must exceed VUVLO (2.45V) for the
UVLO to startup delay (37.5ms).
• All VIN_ must exceed VPWRRDY (0.95V).
• All VON_ must exceed VON,TH (0.875V).
• No faults may be present on any channel.
Table 1. Operational Mode Selection
MODE
High (connect to BIAS)
Unconnected
GND
OPERATION
Voltage tracking
Power sequencing
Independent
_______________________________________________________________________________________
9
MAX5927A/MAX5929A–MAX5929D
Pin Description (continued)
MAX5927A/MAX5929A–MAX5929D
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
RLIM1
RTIM
LIM1*
RLIM2
1nF
TIM
BIAS
LIM2*
POL*
IN1
IN2
VSC, TH
VFC, TH
VFS, TH
STARTUP
OSCILLATOR
VSC, TH
RSENSE1
RSENSE2
FAST COMP.
SENSE1
UVLO
BIAS AND
REFERENCES
2.45V
UVLO
FAST COMP.
SENSE2
TIMING
OSCILLATOR
SLOW COMP.
SLOW COMP.
GATE1
GATE2
CURRENT CONTROL
AND
STARTUP LOGIC
CHARGE
PUMP
Q1
OUT1
3mA/
50mA
CURRENT CONTROL
AND
STARTUP LOGIC
DEVICE CONTROL
LOGIC
SLOW DISCHARGE
FAST DISCHARGE
CHARGE
PUMP
SLOW DISCHARGE
FAST DISCHARGE
100μA
100μA
Q2
OUT2
3mA/
50mA
STAT1
STAT2
LIM3*
RLIM3
LIM4*
IN3
IN4
VSC, TH
VFS, TH
VFS, TH
MAX5927A/
MAX5929A–
MAX5929D
RSENSE3
FAST COMP.
UVLO
SENSE3
RLIM4
VSC, TH
RSENSE4
FAST COMP.
SENSE4
UVLO
SLOW COMP.
SLOW COMP.
GATE3
GATE4
CHARGE
PUMP
Q3
OUT3
3mA/
50mA
CURRENT CONTROL
AND
STARTUP LOGIC
SLOW DISCHARGE
FAST DISCHARGE
100μA
*MAX5927A ONLY.
STAT3
CURRENT CONTROL
AND
STARTUP LOGIC
FAULT
MANAGEMENT
ON
INPUT
CONPARATORS
OPERATION
MODE
LATCH*
ON1 ON2 ON3 ON4
MODE
CHARGE
PUMP
SLOW DISCHARGE
FAST DISCHARGE
100μA
Q4
OUT4
3mA/
50mA
STAT4
Figure 1. Functional Diagram
The MAX5927A/MAX5929A–MAX5929D turn off all
channels if any of the above conditions are not met.
After a fault-latched shutdown, cycle any of the ON_
inputs to unlatch and restart all channels.
Power-Sequencing Mode
Leave MODE floating to enter power-sequencing
mode. While in power-sequencing mode, the
MAX5927A/MAX5929A–MAX5929D turn on and off
10
each channel depending on the state of the corresponding VON_. To turn on a given channel:
• At least one VIN_ must exceed VUVLO (2.45V) for the
UVLO to startup delay (37.5ms).
• All VIN_ must exceed VPWRRDY (0.95V).
• The corresponding V ON_ must exceed V ON,TH
(0.875V).
• No faults can be present on any channel.
______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
MAX5927A/MAX5929A–MAX5929D
ON1
ON2
ON3
ON4
VUVLO (2.45V)
ANY
IN_
VPWRRDY (0.95V)
IN2
VPWRRDY (0.95V)
IN3
VPWRRDY (0.95V)
IN4
VPWRRDY (0.95V)
OUT1*
OUT2*
OUT3*
OUT4*
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
Figure 2. Voltage-Tracking Timing Diagram (Provided tD, UVLO Requirement is Met)
______________________________________________________________________________________
11
MAX5927A/MAX5929A–MAX5929D
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
ON1
ON2
ON3
ON4
VUVLO (2.45V)
ANY
IN_
VPWRRDY (0.95V)
IN2
VPWRRDY (0.95V)
IN3
VPWRRDY (0.95V)
IN4
VPWRRDY (0.95V)
*
OUT1
*
OUT2
*
OUT3
*
OUT4
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
Figure 3. Power-Sequencing Timing Diagram (Provided tD, UVLO Requirement is Met)
12
______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
ON1 = ON2 = ON3 = ON4
OVERCURRENT
FAULT
CONDITION
Startup Period
*
OUT1
*
OUT2
*
OUT3
*
OUT4
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY
OF THE LOAD RESISTANCE AND CAPACITANCE.
Figure 4. Power-Sequencing Fault Turn-Off
The MAX5927A/MAX5929A–MAX5929D turn off all
channels if any of the above conditions are not met.
After a fault-latched shutdown, cycle any of the ON_
inputs to unlatch and restart all channels, depending
on the corresponding VON_ state.
Independent Mode
Connect MODE to GND to enter independent mode.
While in independent mode, the MAX5927A/
MAX5929A–MAX5929D provide complete independent
control for each channel. To turn on a given channel:
• At least one VIN_ must exceed VUVLO (2.45V) for the
UVLO to startup delay (37.5ms).
• The corresponding V IN_ must exceed V PWRRDY
(0.95V).
• The corresponding V ON_ must exceed V ON,TH
(0.875V).
RTIM sets the duration of the startup period from 0.4ms
(RTIM = 4kΩ) to 50ms (RTIM = 500kΩ) (see the Setting
the Startup Period, RTIM section). The default startup
period is fixed at 9ms when TIM is floating. The startup
period begins after the turn-on conditions are met as
described in the Mode section, and the device is not
latched or in its autoretry delay (see the Latched and
Autoretry Fault Management section).
The MAX5927A/MAX5929A–MAX5929D limit the load
current if an overcurrent fault occurs during startup
instead of completely turning off the external MOSFETs.
The slow comparator is disabled during the startup
period and the load current can be limited in two ways:
1) Slowly enhancing the MOSFETs by limiting the
MOSFET gate-charging current.
2) Limiting the voltage across the external currentsense resistor.
During the startup period, the gate-drive current is limited to 100µA and decreases with the increase of the
gate voltage (see the Typical Operating Characteristics).
This allows the controller to slowly enhance the
MOSFETs. If the fast comparator detects an overcurrent, the MAX5927A/MAX5929A–MAX5929D regulate
the gate voltage to ensure that the voltage across the
sense resistor does not exceed VSU,TH. This effectively
regulates the inrush current during startup.
Figure 6 shows the startup waveforms. STAT_ is asserted immediately after the startup period if no fault condition is present.
VariableSpeed/BiLevel Fault Protection
VariableSpeed/BiLevel fault protection incorporates
comparators with different thresholds and response
times to monitor the load current (Figure 7). During the
startup period, protection is provided by limiting the
load current. Protection is provided in normal operation
(after the startup period has expired) by discharging
the MOSFET gates with a 3mA/50mA pulldown current
in response to a fault condition. After a fault, STAT_ is
deasserted, the MAX5929A/MAX5929B stays latched
off and the MAX5929C/MAX5929D automatically
restart. Use the MAX5927A LATCH input to control
whether the STAT_ outputs latch off or autoretry after a
fault condition (see the Latched and Autoretry Fault
Management section).
______________________________________________________________________________________________________
13
MAX5927A/MAX5929A–MAX5929D
The MAX5927A/MAX5929A–MAX5929D turn off the corresponding channel if any of the above conditions are
not met. During a fault condition on a given channel only,
the affected channel is disabled. After a fault-latched
shutdown, recycle the corresponding ON_ inputs to
unlatch and restart only the corresponding channel.
MAX5927A/MAX5929A–MAX5929D
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
ON1
ON2
ON3
ON4
VUVLO (2.45V)
IN1
VPWRRDY (0.95V)
IN2
VPWRRDY (0.95V)
IN3
VPWRRDY (0.95V)
IN4
VPWRRDY (0.95V)
tD, UVLO
*
OUT1
*
OUT2
*
OUT3
*
OUT4
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
Figure 5. Independent Mode Timing Diagram
14
______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
STAT_
SLOW
COMPARATOR
tSTART
VDRIVE
VOUT_
VGATE_
VOUT_
VTH
3ms
TURN-OFF TIME
VGATE_
FAST
COMPARATOR
130μs
CBOARD_ = LARGE
VFC,TH
200ns
RSENSE_
CBOARD_ = 0
VSC,TH
ILOAD_
tON
VFC,TH
(2 x VSC,TH)
SENSE VOLTAGE (VIN - VSENSE)
Figure 6. Independent Mode Startup Waveforms
Figure 7. VariableSpeed/BiLevel Response
Slow-Comparator Startup Period
The slow comparator is disabled during the startup
period while the external MOSFETs are turning on.
Disabling the slow comparator allows the device to
ignore the higher-than-normal inrush current charging
the board capacitors when a card is first plugged into a
live backplane.
across the sense resistor does not exceed the startup
fast-comparator threshold voltage (VSU,TH), VSU,TH is
scaled to two times the slow-comparator threshold
(VSC,TH).
Slow-Comparator Normal Operation
After the startup period is complete, the slow comparator is enabled and the device enters normal operation.
The comparator threshold voltage (V SC,TH ) is
adjustable from 25mV to 100mV. The slow-comparator
response time is 3ms for a 1mV overdrive. The
response time decreases to 100µs with a large overdrive. The variable-speed response time allows the
MAX5927A/MAX5929A–MAX5929D to ignore lowamplitude momentary glitches, thus increasing
system noise immunity. After an extended overcurrent
condition, a fault is generated, STAT_ outputs are
deasserted, and the MOSFET gates are discharged
with a 3mA pulldown current.
Fast-Comparator Startup Period
During the startup period, the fast comparator regulates the gate voltages to ensure that the voltage
Fast-Comparator Normal Operation
In normal operation, if the load current reaches the fastcomparator threshold, a fault is generated, STAT_ is
deasserted, and the MOSFET gates are discharged
with a strong 50mA pulldown current. This happens in
the event of a serious current overload or a dead short.
The fast-comparator threshold voltage (V FC,TH ) is
scaled to two times the slow-comparator threshold
(VSC,TH). This comparator has a fast response time of
200ns (Figure 7).
Undervoltage Lockout (UVLO)
The UVLO prevents the MAX5927A/MAX5929A–
MAX5929D from turning on the external MOSFETs until
one input voltage exceeds the UVLO threshold (2.45V)
for t D,UVLO. The MAX5927A/MAX5929A–MAX5929D
use power from the highest input voltage rail for the
charge pumps. This allows for more efficient chargepump operation. The highest VIN_ is provided as an
output at BIAS. The UVLO protects the external
MOSFETs from an insufficient gate-drive voltage.
______________________________________________________________________________________
15
MAX5927A/MAX5929A–MAX5929D
ON_
MAX5927A/MAX5929A–MAX5929D
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
Table 2. Selecting Fault Management
Mode (MAX5927A)
LATCH
FAULT MANAGEMENT
BACKPLANE
V1
Unconnected
Fault condition latches MOSFETs off
V2
Low
Autoretry mode
V3
Table 3. Selecting STAT_ Polarity
(MAX5927A)
POL
STAT_
REMOVABLE CARD
V4
ON1
ON1
Low
Asserts low
ON2
ON2
Unconnected
Asserts high (open drain)
ON3
ON3
ON4
ON4
tD,UVLO ensures that the board is fully inserted into the
backplane and that the input voltages are
stable. MAX5927A/MAX5929A–MAX5929D include a
UVLO glitch filter, tD,GF, to reject all input voltage noise
and transients. Bringing all input supplies below the
UVLO threshold for longer than tD,GF reinitiates tD,UVLO
and the startup period, tSTART. See Figure 8 for an
example of automatic turn-on function.
Latched and Autoretry Fault Management
The MAX5929A/MAX5929B always latch the external
MOSFETs off when an overcurrent fault is detected,
and the MAX5929C/MAX5929D are always in autoretry
mode. The MAX5927A can be configured to either latch
the external MOSFETs off or to autoretry (see Table 2).
Toggling ON_ below 0.875V for at least 100µs clears
the MAX5929A/MAX5929B or MAX5927A (LATCH =
unconnected) fault and reinitiates the startup period.
Similarly, the MAX5929C/MAX5929D or MAX5927A
(LATCH = GND) turn the external MOSFETs off when
an overcurrent fault is detected, then automatically
restart after the autoretry delay that is internally set to
64 times tSTART.
Status Outputs (STAT_)
The status (STAT_) outputs are open-drain outputs that
assert when hot swap is successful and tSTART has
elapsed. STAT_ deasserts if ON_ is low or if the channel is turned off for any fault condition.
The polarity of the STAT_ outputs is selected using POL
for the MAX5927A (see Table 3). Tables 4 and 5 contain the MAX5927A/MAX5929A–MAX5929D truth tables.
16
MAX5927A
MAX5929A
MAX5929B
MAX5929C
MAX5929D
GND
GND
Figure 8. Automatic Turn-On when Input Voltages are Above
their Respective Undervoltage Lockout Threshold (Provided
tD,UVLO Requirement is Met)
Applications Information
Component Selection
n-Channel MOSFETs
Select the external MOSFETs according to the application’s current levels. Table 6 lists recommended components. The MOSFET’s on-resistance (R DS(ON) )
should be chosen low enough to have a minimum voltage drop at full load to limit the MOSFET power dissipation. High RDS(ON) causes output ripple if there is a
pulsating load. Determine the device power rating to
accommodate a short-circuit condition on the board at
startup and when the device is in autoretry mode (see
the MOSFET Thermal Considerations section).
Using these devices in latched mode allows the use of
MOSFETs with lower power ratings. A MOSFET typically withstands single-shot pulses with higher dissipation
than the specified package rating. Table 7 lists some
recommended MOSFET manufacturers.
______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
PART
MAX5927A (POL =
1), MAX5929B/
MAX5929D
MAX5927A (POL =
0), MAX5929C/
MAX5929D
CHANNEL 1
FAULT
Yes
X
X
X
No
Yes
X
X
X
CHANNEL 2
FAULT
X
Yes
X
X
No
X
Yes
X
X
CHANNEL 3
FAULT
X
X
Yes
X
No
X
X
Yes
X
CHANNEL 4
FAULT
X
X
X
Yes
No
X
X
X
Yes
STAT1/
GATE1*
L/OFF
L/OFF
L/OFF
L/OFF
H/ON
H/OFF
H/OFF
H/OFF
H/OFF
STAT2/
GATE2*
L/OFF
L/OFF
L/OFF
L/OFF
H/ON
H/OFF
H/OFF
H/OFF
H/OFF
STAT3/
GATE3*
L/OFF
L/OFF
L/OFF
L/OFF
H/ON
H/OFF
H/OFF
H/OFF
H/OFF
STAT4/
GATE4*
L/OFF
L/OFF
L/OFF
L/OFF
H/ON
H/OFF
H/OFF
H/OFF
H/OFF
No
No
No
No
L/ON
L/ON
L/ON
L/ON
*L = Low, H = High.
Table 5. Status Output Truth Table: Independent Mode
CHANNEL 1 CHANNEL 2 CHANNEL 3 CHANNEL 4
FAULT
FAULT
FAULT
FAULT
Yes
STAT1/
GATE1
STAT2/
GATE2
STAT3/
GATE3
STAT4/
GATE4
Unasserted/OFF
Unasserted/OFF
Unasserted/OFF
Unasserted/OFF
Yes
Yes
Yes
Yes
Yes
Yes
No
Unasserted/OFF
Unasserted/OFF
Unasserted/OFF
Asserted/ON
Yes
Yes
No
Yes
Unasserted/OFF
Unasserted/OFF
Asserted/ON
Unasserted/OFF
Yes
Yes
No
No
Unasserted/OFF
Unasserted/OFF
Asserted/ON
Asserted/ON
Yes
No
Yes
Yes
Unasserted/OFF
Asserted/ON
Unasserted/OFF
Unasserted/OFF
Yes
No
Yes
No
Unasserted/OFF
Asserted/ON
Unasserted/OFF
Asserted/ON
Yes
No
No
Yes
Unasserted/OFF
Asserted/ON
Asserted/ON
Unasserted/OFF
Yes
No
No
No
Unasserted/OFF
Asserted/ON
Asserted/ON
Asserted/ON
No
Yes
Yes
Yes
Asserted/ON
Unasserted/OFF
Unasserted/OFF
Unasserted/OFF
No
Yes
Yes
No
Asserted/ON
Unasserted/OFF
Unasserted/OFF
Asserted/ON
Unasserted/OFF
No
Yes
No
Yes
Asserted/ON
Unasserted/OFF
Asserted/ON
No
Yes
No
No
Asserted/ON
Unasserted/OFF
Asserted/ON
Asserted/ON
No
No
Yes
Yes
Asserted/ON
Asserted/ON
Unasserted/OFF
Unasserted/OFF
No
No
Yes
No
Asserted/ON
Asserted/ON
Unasserted/OFF
Asserted/ON
No
No
No
Yes
Asserted/ON
Asserted/ON
Asserted/ON
Unasserted/OFF
No
No
No
No
Asserted/ON
Asserted/ON
Asserted/ON
Asserted/ON
Note: STAT_ is asserted when hot swap is successful and tON has elapsed. STAT_ is unasserted during a fault.
______________________________________________________________________________________
17
MAX5927A/MAX5929A–MAX5929D
Table 4. Status Output Truth Table: Voltage-Tracking and Power-Sequencing Modes
MAX5927A/MAX5929A–MAX5929D
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
Table 6. Recommended n-Channel MOSFETs
PART NUMBER
MANUFACTURER
DESCRIPTION
IRF7413
11mΩ, 8-pin SO, 30V
International Rectifier
IRF7401
22mΩ, 8-pin SO, 20V
6mΩ, D2PAK, 20V
IRL3502S
MMSF3300
20mΩ, 8-pin SO, 30V
On Semiconductor
MMSF5N02H
30mΩ, 8-pin SO, 20V
14mΩ, D2PAK, 50V
MTB60N05H
FDS6670A
10mΩ, 8-pin SO, 30V
Fairchild Semiconductor
ND8426A
13.5mΩ, 8-pin SO, 20V
4.5mΩ, D2PAK, 30V
FDB8030L
Table 7. Component Manufacturers
COMPONENT
Sense Resistors
MOSFETs
MANUFACTURER
Vishay/Dale Resistors
WEBSITE
www.vishay.com
IRC, Inc.
361-992-7900
www.irctt.com
International Rectifier
310-322-3331
www.irf.com
Fairchild Semiconductor
888-522-5372
www.fairchildsemi.com
On Semiconductor
602-244-6600
www.onsemi.com
Sense Resistor
The slow-comparator threshold voltage is adjustable
from 25mV to 100mV. Select a sense resistor that causes a drop equal to the slow-comparator threshold voltage at a current level above the maximum normal
operating current. Typically, set the overload current at
1.2 to 1.5 times the full load current. The fast-comparator threshold is two times the slow-comparator threshold in normal operating mode. Choose the sense
resistor power rating to be greater than or equal to 2 x
(IOVERLOAD) x VSC,TH. Table 7 lists some recommended sense resistor manufacturers.
Slow-Comparator Threshold, RLIM_ (MAX5927A)
The slow-comparator threshold voltage is adjustable
from 25mV to 100mV, allowing designers to fine-tune the
current-limit threshold for use with standard-value sense
resistors. Low slow-comparator thresholds allow for
increased efficiency by reducing the power dissipated
by the sense resistor. Furthermore, the low 25mV slowcomparator threshold is beneficial when operating with
supply rails down to 1V because it allows a small percentage of the overall output voltage to be used for current sensing. The VariableSpeed/BiLevel fault protection
feature offers inherent system immunity against load
transients and noise. This allows the slow-comparator
threshold to be set close to the maximum normal
18
PHONE
402-564-3131
operating level without experiencing nuisance faults. To
adjust the slow-comparator threshold, calculate RLIM_
as follows:
RLIM _ =
VTH − 25mV
7.5μA
where VTH is the desired slow-comparator threshold
voltage. Shorting LIM_ to GND sets VTH to 25mV. Do
not leave LIM_ unconnected.
Setting the Startup Period, RTIM
The startup period (tSTART) is adjustable from 0.4ms to
50ms. The adjustable startup period feature allows systems to be customized for MOSFET gate capacitance
and board capacitance (CBOARD). The startup period
is adjusted with a resistor connected from TIM to GND
(RTIM). RTIM must be between 4kΩ and 500kΩ. The
startup period has a default value of 9ms when TIM is
left unconnected. Calculate R TIM with the following
equation:
RTIM =
t START
128 × 800pF
where tSTART is the desired startup period.
______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
VOUT_
VIN
CBOARD
RPULLUP
R1
IN_
SENSE_
GATE_
CGATE
IN_
SENSE_
GATE_
ON_
STAT_
ON_
MAX5927A
MAX5929A
MAX5929B
MAX5929C
MAX5929D
MAX5927A
MAX5929A
MAX5929B
MAX5929C
MAX5929D
R2
GND
Figure 9. Operating with an External Gate Capacitor
Startup Sequence
There are two ways of completing the startup
sequence. Case A describes a startup sequence that
slowly turns on the MOSFETs by limiting the gate
charge. Case B uses the current-limiting feature and
turns on the MOSFETs as fast as possible while still
preventing a high inrush current. The output voltage
ramp-up time (tON) is determined by the longer of the
two timings, case A and case B. Set the startup timer
(tSTART) to be longer than tON to guarantee enough
time for the output voltage to settle.
Case A: Slow Turn-On (Without Current Limit)
There are two ways to turn on the MOSFETs without
reaching the fast-comparator current limit:
• If the board capacitance (C BOARD) is small, the
inrush current is low.
• If the gate capacitance is high, the MOSFETs turn
on slowly.
In both cases, the turn-on time is determined only by
the charge required to enhance the MOSFET. The
small 100µA gate-charging current effectively limits
the output voltage dv/dt. Connecting an external
capacitor between GATE and GND extends the turnon time. The time required to charge/discharge a
MOSFET is as follows:
t =
CGATE × ΔVGATE + QGATE
IGATE
where:
C GATE is the external gate to ground capacitance
(Figure 9),
VTURN-ON -
(R2 x R1) VON, TH
R2
Figure 10. Adjustable Undervoltage Lockout
ΔVGATE is the change in gate charge,
QGATE is the MOSFET total gate charge,
IGATE is the gate-charging/discharging current.
In this case, the inrush current depends on the MOSFET
gate-to-drain capacitance (Crss) plus any additional
capacitance from GATE to GND (CGATE), and on any
load current (ILOAD) present during the startup period.
IINRUSH =
CBOARD
× IGATE + ILOAD
Crss + CGATE
Example: Charging and discharging times using the
Fairchild FDB7030L MOSFET
If V IN1 = 5V, GATE1 charges up to 10.4V (V IN1 +
VDRIVE), and therefore, ΔVGATE = 10.4V. The manufacturer’s data sheet specifies that the FDB7030L has
approximately 60nC of gate charge and Crss = 600pF.
The MAX5927A/MAX5929A–MAX5929D have a 100µA
gate-charging current and a 3mA/50mA normal/strong
discharging current. CBOARD = 6µF and the load does
not draw any current during the startup period. With no
gate capacitor, the inrush current, charge, and discharge times are:
6μF
× 100μA + 0 = 1A
600pF + 0
0 × 10.4V + 60nC
ICHARGE =
= 0.6ms
100μA
0 × 10.4V + 60nC
tDISCHARGE =
= 0.02ms
3mA
0 × 10.4V + 60nC
= 1.2μs
tDISCHARGE(STRONG) =
50mA
IINRUSH =
______________________________________________________________________________________
19
MAX5927A/MAX5929A–MAX5929D
RSENSE_
VIN_
MAX5927A/MAX5929A–MAX5929D
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
RSENSEY
Q1
VY
OUTY
CBOARDY
INY
R1
ON
VEN
SENSEY
GATEY
ON
OFF
MAX5927A
MAX5929A
MAX5929B
MAX5929C
MAX5929D
C1
GND
GND
INZ
SENSEZ
GATEZ
OUTZ
VZ
Q2
RSENSEZ
CBOARDZ
VEN
VONZ, TH
t1 = -R1C1 ln
(V
t2 = -R1C1 ln
(V
)
EN - VONY, TH
VEN
VON
VONY, TH
VY
)
EN - VONZ, TH
VEN
VZ
tDELAY = -R1C1 ln
t0
t1
( VV
)
EN - VONY, TH
EN - VONZ, TH
t2
tDELAY
Figure 11. Power Sequencing: Channel Z Turns On tDELAY After Channel Y
With a 22nF gate capacitor, the inrush current, charge,
and discharge times are:
6μF
× 100μA + 0 = 26.5mA
600pF + 22nF
22nF × 10.4V + 60nC
t CHARGE =
= 2.89ms
100μA
22nF × 10.4V + 60nC
tDISCHARGE =
= 0.096ms
3mA
22nF × 10.4V + 60nC
= 5.8μs
tDISCHARGE(STRONG) =
50mA
IINRUSH =
20
Case B: Fast Turn-On (With Current Limit)
In applications where the board capacitance (CBOARD)
is high, the inrush current causes a voltage drop across
R SENSE that exceeds the startup fast-comparator
threshold. The fast comparator regulates the voltage
across the sense resistor to VFC,TH. This effectively regulates the inrush current during startup. In this case,
the current charging CBOARD can be considered constant and the turn-on time is:
t ON =
CBOARD × VIN × RSENSE
VFC,TH
______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
IINRUSH =
VFC,TH
BACKPLANE
REMOVABLE CARD
WITH NO HOT-INSERTION
PROTECTION
RSENSE
Figure 6 shows the waveforms and timing diagrams for
a startup transient with current regulation (see the
Typical Operating Characteristics). When operating
under this condition, an external gate capacitor is
not required.
ON_ Comparators
The ON_ comparators control the on/off function of the
MAX5927A/MAX5929A–MAX5929D. ON_ is also used
to reset the fault latch (latch mode). Pull VON_ low for
100µs, tUNLATCH, to reset the shutdown latch. ON_ also
programs the UVLO threshold (see Figure 10). A resistive-divider between V IN_, V ON_, and GND sets the
user programmable turn-on voltage. In power-sequencing mode, an RC circuit can be used at ON_ to set the
delay timing (see Figure 11).
Using the MAX5927A/
MAX5929A–MAX5929D on the Backplane
Using the MAX5927A/MAX5929A–MAX5929D on the
backplane allows multiple cards with different input
capacitance to be inserted into the same slot even if
the card does not have on-board hot-swap protection.
The startup period can be triggered if IN_ is connected
to ON_ through a trace on the card (Figure 12).
Input Transients
The voltage at IN1, IN2, IN3, or IN4 must be above VUVLO
during inrush and fault conditions. When a short-circuit
condition occurs on the board, the fast comparator trips
cause the external MOSFET gates to be discharged at
50mA according to the mode of operation (see the Mode
section). The main system power supply must be able to
sustain a temporary fault current, without dropping below
the UVLO threshold of 2.45V, until the external MOSFET is
completely off. If the main system power supply collapses
below UVLO, the MAX5927A/MAX5929A–MAX5929D
force the device to restart once the supply has recovered. The MOSFET is turned off in a very short time resulting in a high di/dt. The backplane delivering the power to
the external card must have low inductance to minimize
voltage transients caused by this high di/dt.
POWER
SUPPLY
VOUT
VIN
CBOARD
IN_
SENSE_ GATE_
MAX5927A
MAX5929A–MAX5929D
ON_
Figure 12. Using the MAX5927A/MAX5929A–MAX5929D on a
Backplane
MOSFET Thermal Considerations
During normal operation, the external MOSFETs dissipate little power. The MOSFET RDS(ON) is low when the
MOSFET is fully enhanced. The power dissipated in normal operation is P D = I LOAD 2 x R DS(ON) . The most
power dissipation occurs during the turn-on and turn-off
transients when the MOSFETs are in their linear regions.
Take into consideration the worst-case scenario of a
continuous short-circuit fault, consider these two cases:
1) The single turn-on with the device latched after a
fault: MAX5927A (LATCH = high or unconnected) or
MAX5929A/MAX5929B.
2) The continuous autoretry after a fault: MAX5927A
(LATCH = low) or MAX5929C/MAX5929D.
MOSFET manufacturers typically include the package
thermal resistance from junction to ambient (RθJA) and
thermal resistance from junction to case (RθJC), which
determines the startup time and the retry duty cycle
(d = tSTART/(tSTART + tRETRY). Calculate the required
transient thermal resistance with the following equation:
Z θJA(MAX) ≤
TJMAX − TA
VIN × ISTART
where ISTART = VSU,TH / RSENSE.
______________________________________________________________________________________
21
MAX5927A/MAX5929A–MAX5929D
The maximum inrush current in this case is:
MAX5927A/MAX5929A–MAX5929D
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
Layout Considerations
To take full tracking advantage of the switch response
time to an output fault condition, it is important to keep
all traces as short as possible and to maximize the
high-current trace dimensions to reduce the effect of
undesirable parasitic inductance. Place the
MAX5927A/MAX5929A–MAX5929D close to the card’s
connector. Use a ground plane to minimize impedance
and inductance. Minimize the current-sense resistor
trace length (<10mm), and ensure accurate current
sensing with Kelvin connections (Figure 13).
When the output is short circuited, the voltage drop
across the external MOSFET becomes large. Hence, the
power dissipation across the switch increases, as does
the die temperature. An efficient way to achieve good
power dissipation on a surface-mount package is to lay
out two copper pads directly under the MOSFET package on both sides of the board. Connect the two pads
to the ground plane through vias, and use enlarged
copper mounting pads on the topside of the board.
HIGH-CURRENT PATH
SENSE RESISTOR
MAX5927A
MAX5929A–MAX5929D
Figure 13. Kelvin Connection for the Current-Sense Resistors
Typical Operating Circuit
BACKPLANE
REMOVABLE CARD
RSENSE1
Q1
V1
RSENSE2
OUT1
Q2
V2
OUT2
RSENSE3
Q3
V3
RSENSE4
Q4
V4
GATE1
GATE2
RLIM**
BIAS
RLIM4**
TIM
RLIM3**
MODE
RLIM2**
STAT3
POL*
RLIM1**
GATE3
GND
STAT1
STAT2
LATCH*
ON4
OUT4
MAX5927A
MAX5929A–MAX5929D
LIM4*
ON4
GND
GATE4
ON3
LIM3*
ON2
ON3
LIM2*
ON2
LIM1*
ON1
SENSE4
SENSE3
SENSE2
SENSE1
IN4
IN3
IN2
IN1
ON1
OUT3
STAT4
1nF
16V
*MAX5927A ONLY.
**OPTIONAL COMPONENT.
22
______________________________________________________________________________________
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
PART
CURRENT LIMIT
FAULT MANAGEMENT
STAT_ POLARITY
MAX5927AETJ+
Programmable
Selectable
Selectable
MAX5929AEEG+
Fixed
Latched
Asserted high (open drain)
MAX5929BEEG+
Fixed
Latched
Asserted low
MAX5929CEEG+
Fixed
Autoretry
Asserted high (open drain)
MAX5929DEEG+
Fixed
Autoretry
Asserted low
Pin Configurations (continued)
Chip Information
PROCESS: BiCMOS
TOP VIEW
MODE 1
+
24 ON3
ON2 2
23 ON4
ON1 3
22 IN2
IN1 4
SENSE1 5
GATE1 6
21 SENSE2
MAX5929A–
MAX5929D
IN4 7
20 GATE2
19 IN3
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
18 SENSE3
PACKAGE TYPE
17 GATE3
GATE4 9
16 GND
STAT1 10
15 BIAS
STAT2 11
14 STAT4
TIM 12
13 STAT3
SENSE4 8
PACKAGE CODE
DOCUMENT NO.
24 QSOP
E24-1
21-0055
32 TQFN
T3255-4
21-0140
QSOP
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implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 23
© 2008 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
MAX5927A/MAX5929A–MAX5929D
Selector Guide