19-1658; Rev 1; 6/01 SOT23, Low-Power µP Supervisory Circuits with Battery Backup and Chip-Enable Gating Features ♦ Low +1.2V Operating Supply Voltage (VCC or VBATT) ♦ Precision Monitoring of +5.0V, +3.3V, +3.0V, and +2.5V Power-Supply Voltages ♦ On-Board Gating of Chip-Enable Signals, 1.5ns Propagation Delay ♦ Debounced Manual Reset Input (MAX6365) ♦ Watchdog Timer, 1.6s Timeout (MAX6366) ♦ Battery-On Output Indicator (MAX6367) ♦ Auxiliary User-Adjustable RESET IN (MAX6368) ♦ Low 10µA Quiescent Supply Current ♦ Three Available Output Structures Push-Pull RESET Open-Drain RESET Open-Drain RESET ♦ RESET/RESET Valid Down to 1.2V Guaranteed (VCC or VBATT) ♦ Power-Supply Transient Immunity ♦ 150ms min Reset Timeout Period ♦ Miniature 8-Pin SOT23 Package These devices perform four basic system functions: 1) Provide a µP reset output during VCC supply powerup, power-down, and brownout conditions. 2) Internally control VCC to backup-battery switching to maintain data or low-power operation for CMOS RAM, CMOS µPs, real-time clocks, and other digital logic when the main supply fails. 3) Provide memory write protection through internal chip-enable gating during supply or processor faults. 4) Include one of the following options: a manual reset input (MAX6365), a watchdog timer function (MAX6366), a battery-on output (MAX6367), or an auxiliary user-adjustable reset input (MAX6368). The MAX6365–MAX6368 operate from VCC supply voltages as low as 1.2V. The factory preset reset threshold voltages range from 2.32V to 4.63V (see Ordering Information). In addition, each part is offered in three reset output versions: push-pull active low, open-drain active low, or open-drain active high (see Selector Guide). The MAX6365–MAX6368 are available in miniature 8-pin SOT23 packages. Applications Ordering Information PART* TEMP. RANGE PINPACKAGE MA X6 36 5LKA_ _-T -40°C to +85°C 8 SOT23-8 MAX6365PKA_ _-T -40°C to +85°C 8 SOT23-8 MAX6365HKA_ _-T -40°C to +85°C 8 SOT23-8 Critical µP/µC Power Monitoring Portable/BatteryPowered Equipment MA X6 36 6LKA_ _-T MAX6366PKA_ _-T -40°C to +85°C 8 SOT23-8 -40°C to +85°C 8 SOT23-8 Fax Machines Set-Top Boxes MAX6366HKA_ _-T -40°C to +85°C 8 SOT23-8 Industrial Control POS Equipment MA X6 36 7LKA_ _-T -40°C to +85°C 8 SOT23-8 MAX6367PKA_ _-T -40°C to +85°C 8 SOT23-8 MAX6367HKA_ _-T -40°C to +85°C 8 SOT23-8 MA X6 36 8LKA_ _-T -40°C to +85°C 8 SOT23-8 MAX6368PKA_ _-T -40°C to +85°C 8 SOT23-8 MAX6368HKA_ _-T -40°C to +85°C 8 SOT23-8 Computers/Controllers Pin Configurations TOP VIEW RESET, RESET 1 CE IN 2 8 CE OUT 7 BATT 3 6 OUT MR 4 5 VCC MAX6365 GND SOT23 Pin Configurations continued at end of data sheet. *These parts offer a choice of reset threshold voltages. From the Reset Threshold Ranges table, insert the desired threshold voltage code in the blank to complete the part number. SOT parts come in tape-and-reel only and must be ordered in 2500-piece increments. See Device Marking Codes for a complete parts list, including SOT top marks and standard threshold versions. See Selector Guide for a listing of device features. Typical Operating Circuit appears at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX6365–MAX6368 General Description The MAX6365–MAX6368 supervisory circuits simplify power-supply monitoring, battery-backup control functions, and memory write protection in microprocessor (µP) systems. The circuits significantly improve the size, accuracy, and reliability of modern systems with an ultrasmall integrated solution. MAX6365–MAX6368 SOT23, Low-Power µP Supervisory Circuits with Battery Backup and Chip-Enable Gating ABSOLUTE MAXIMUM RATINGS Terminal Voltages (with respect to GND) VCC, BATT, OUT.......................................................-0.3V to +6V RESET (open drain), RESET (open drain) ................-0.3V to +6V BATT ON, RESET (push-pull), RESET IN, WDI, CE IN, CE OUT ...........................-0.3V to (VOUT + 0.3V) MR ..............................................................-0.3V to (VCC + 0.3V) Input Current VCC Peak ..............................................................................1A VCC Continuous .............................................................250mA BATT Peak .....................................................................250mA BATT Continuous .............................................................40mA GND ...............................................................................75mA Output Current OUT ...............................Short-Circuit Protected for up to 10s RESET, RESET, BATT ON, CE OUT...............................20mA Continuous Power Dissipation (TA = +70°C) 8-Pin SOT23 (derate 8.75mW/°C above +70°C)........700mW Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Junction Temperature .....................................................+150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = +2.4V to +5.5V, VBATT = +3.0V, CE IN = VCC, reset not asserted, TA = -40°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER Operating Voltage Range (Note 2) Supply Current (Excluding IOUT) SYMBOL CONDITIONS VCC, VBATT No load ICC No load, VCC > VTH Supply Current in BatteryBackup Mode (Excluding IOUT) IBACK VBATT = 2.8V, VCC = 0 BATT Standby Current IBATT 5.5V > VCC > (VBATT + 0.2V) VCC to OUT On-Resistance RON MIN TYP 0 Reset Threshold VCC Falling Reset Delay 2 VSW VTH tRD V 10 30 12 35 VCC = 5.5V 15 50 TA = +25°C 1 TA = -40°C to +85°C 3 TA = +25°C -0.1 0.02 TA = -40°C to +85°C -1.0 0.02 VCC = 4.75V, IOUT = 150mA 3.1 VCC = 3.15V, IOUT = 65mA 3.7 VBATT = 3.0V, IOUT = 10mA VBATT = 2.25V, IOUT = 5mA Battery-Switchover Threshold (VCC - VBATT) 5.5 VCC = 3.6V VBATT = 4.5V, IOUT = 20mA VOUT UNITS VCC = 2.8V VCC = 2.38V, IOUT = 25mA Output Voltage in BatteryBackup Mode MAX VCC < VTH µA µA Ω 4.6 VBATT 0.2 VBATT 0.15 VBATT 0.15 V Power-up 20 Power-down -20 mV MAX636_ _KA46 4.50 4.63 4.75 MAX636_ _KA44 4.25 4.38 4.50 MAX636_ _KA31 3.00 3.08 3.15 MAX636_ _KA29 2.85 2.93 3.00 MAX636_ _KA26 2.55 2.63 2.70 MAX636_ _KA23 2.25 2.32 2.38 VCC falling at 10V/ms µA 20 _______________________________________________________________________________________ V µs SOT23, Low-Power µP Supervisory Circuits with Battery Backup and Chip-Enable Gating (VCC = +2.4V to +5.5V, VBATT = +3.0V, CE IN = VCC, reset not asserted, TA = -40°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER Reset Active Timeout Period SYMBOL VOL RESET Output Voltage MIN TYP 150 Reset asserted, VBATT = 0 MAX UNITS 280 ms ISINK = 1.6mA, VCC > 2.1V 0.3 ISINK = 100µA, VCC > 1.2V 0.4 VOH Reset not asserted (MAX636_L only) ISOURCE = 500µA, VCC > VTH(MAX) VOL Reset not asserted ISINK = 1.6mA, VCC > VTH (MAX) VOH Reset not asserted, VBATT = 0 (MAX636_H only) (Note 3) ILKG MAX636_P and MAX636_H only RESET Output Voltage RESET Output Leakage Current CONDITIONS tRP V 0.8 ✕ VCC 0.3 ISOURCE = 1mA, VCC > 1.8V 0.7 ✕ VCC ISOURCE = 200µA, VCC > 1.2V 0.8 ✕ VCC V 1 µA MANUAL RESET (MAX6365 only) 0.3 ✕ VCC VIL MR Input Voltage V 0.7 ✕ VCC VIH Pullup Resistance 20 Minimum Pulse Width 1 kΩ µs Glitch Immunity VCC = 3.3V 100 ns MR to Reset Delay VCC = 3.3V 120 ns WATCHDOG (MAX6366 only) Watchdog Timeout Period tWD 1.00 Minimum WDI Input Pulse Width tWDI 100 1.65 2.25 s ns 0.3 ✕ VCC VIL WDI Input Voltage V 0.7 ✕ VCC VIH WDI Input Current -1.0 1.0 µA BATT ON (MAX6367 only) Output Voltage VOL ISINK = 3.2mA, VBATT = 2.1V 0.4 Sink current, VCC = 5V Output Short-Circuit Current Source current, VBATT > 2V 60 10 30 V mA 100 µA _______________________________________________________________________________________ 3 MAX6365–MAX6368 ELECTRICAL CHARACTERISTICS (continued) ELECTRICAL CHARACTERISTICS (continued) (VCC = +2.4V to +5.5V, VBATT = +3.0V, CE IN = VCC, reset not asserted, TA = -40°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 1.185 1.235 1.285 V ±0.01 ±25 nA RESET IN (MAX6368 only) RESET IN Threshold VRTH RESET IN Leakage Current RESET IN to Reset Delay VOD = 50mV, RESET IN falling 1.5 µs CHIP-ENABLE GATING ±1 CE IN Leakage Current Reset asserted CE IN to CE OUT Resistance Reset not asserted (Note 4) 20 100 Ω CE OUT Short-Circuit Current Reset asserted, CE OUT = 0 0.75 2.0 mA CE IN to CE OUT Propagation Delay 50Ω source, CLOAD = 50pF VCC = 4.75V 1.5 7 VCC = 3.15V 2 9 µA ns 0.8 ✕ VCC VCC = 5V, VCC > VBATT, ISOURCE = 100µA CE OUT Output Voltage High V VBATT 0.1 VCC = 0, VBATT > 2.2V, ISOURCE = 1µA Reset-to-CE OUT Delay Note 1: Note 2: Note 3: Note 4: 12 µs All devices are 100% production tested at TA = +25°C. Limits over temperature are guaranteed by design. VBATT can be 0 anytime, or VCC can go down to 0 if VBATT is active (except at startup). RESET is pulled up to OUT. Specifications apply for OUT = VCC or OUT = BATT. The chip-enable resistance is tested with VCC = VTH(MAX) and CE IN = VCC/2. Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) BATTERY SUPPLY CURRENT (BACKUP MODE) vs. TEMPERATURE 14 13 12 11 10 9 1.0 VBATT = 2.8V 0.8 0.6 VBATT = 2.0V 0.4 0.2 -40 -20 0 20 40 TEMPERATURE (°C) 60 80 8 7 5 0 20 40 TEMPERATURE (°C) 60 80 VBATT = 2.8V 4 3 VBATT = 5.0V 2 0 -20 VBATT = 2.0V 6 1 -40 MAX6365/8-03 VCC = 0 0 8 4 1.2 BATT-TO-OUT ON-RESISTANCE (Ω) VCC = 5.0V VBATT = 0 BATT-TO-OUT ON-RESISTANCE vs. TEMPERATURE MAX6365/8-02 15 BATTERY SUPPLY CURRENT (µA) 16 MAX6365/8-01 SUPPLY CURRENT vs. TEMPERATURE (NO LOAD) SUPPLY CURRENT (µA) MAX6365–MAX6368 SOT23, Low-Power µP Supervisory Circuits with Battery Backup and Chip-Enable Gating IOUT = 25mA VCC = 0 -40 -20 0 20 40 TEMPERATURE (°C) _______________________________________________________________________________________ 60 80 SOT23, Low-Power µP Supervisory Circuits with Battery Backup and Chip-Enable Gating RESET TIMEOUT PERIOD vs. TEMPERATURE 0.8 0.6 VCC = 3.0V IOUT = 65mA 0.4 VCC = 4.5V IOUT = 150mA 0.2 200 195 0 20 40 60 -40 80 45 1V/ms 10V/ms -20 0 20 40 60 80 -40 -20 0 20 40 60 80 TEMPERATURE (°C) TEMPERATURE (°C) RESET THRESHOLD vs. TEMPERATURE MAXIMUM TRANSIENT DURATION vs. RESET THRESHOLD OVERDRIVE BATTERY SUPPLY CURRENT vs. SUPPLY VOLTAGE 4.5 4.0 3.5 3.0 MAX636_ 26 (VTH = 2.63V) 2.5 2.0 400 350 300 MAX636_ 46 (VTH = 4.63V) 250 200 RESET OCCURS ABOVE CURVE 150 100 MAX636_ 26 (VTH = 2.63V) 50 20 40 TEMPERATURE (°C) 60 80 VTH = 2.93V 9 8 VBATT = 2.8V 7 6 VBATT = 2.5V 5 4 VBATT = 2.3V 3 2 1 0 0 0 10 BATTERY SUPPLY CURRENT (µA) MAX6365/8-07 MAX636_ 46 (VTH = 4.63V) -20 60 TEMPERATURE (°C) 5.0 -40 75 0 MAX6365/8-08 -20 90 15 MAXIMUM TRANSIENT DURATION (µs) -40 0.25V/ms 105 30 190 0 THRESHOLD (V) 205 VCC FALLING 120 MAX6365/8-09 1.0 135 PROPAGATION DELAY (µs) 1.2 210 MAX6365/8-05 VCC = 2.3V IOUT = 25mA RESET TIMEOUT PERIOD (ms) MAX6365/8-04 VCC TO OUT ON-RESISTANCE (Ω) 1.4 VCC TO RESET PROPAGATION DELAY vs. TEMPERATURE MAX6365/8-06 VCC TO OUT ON-RESISTANCE vs. TEMPERATURE 1 10 100 1000 10,000 RESET THRESHOLD OVERDRIVE VTH - VCC (mV) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VCC (V) _______________________________________________________________________________________ 5 MAX6365–MAX6368 Typical Operating Characteristics (continued) (TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (TA = +25°C, unless otherwise noted.) MAX6368 RESET IN TO RESET PROPAGATION DELAY vs. TEMPERATURE PROPAGATION DELAY (µs) 1.235 VOD = 50mV 5 2.5 2.2 1.9 1.6 -20 0 20 40 60 -40 80 -20 0 20 40 60 VCC = 5V 0 80 50 VCC = 3.0V 15 10 VCC = 5.0V 5 VCE IN = VCC/2 VBATT = 0 MAX6365/8-14 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 VCC = 5.0V VBATT = 0 1.1 1.0 0 0 2.0 WATCHDOG TIMEOUT PERIOD (s) MAX6365/8-13 20 -20 100 MAX6366 WATCHDOG TIMEOUT PERIOD vs. TEMPERATURE 25 CE IN TO CE OUT ON-RESISTANCE (Ω) 2 CLOAD (pF) CE IN TO CE OUT ON-RESISTANCE vs. TEMPERATURE 20 40 TEMPERATURE (°C) 6 VCC = 3V 3 TEMPERATURE (°C) TEMPERATURE (°C) -40 4 0 1.0 -40 CE IN = 0 TO VCC DRIVER SOURCE IMPEDANCE = 50Ω 1 1.3 1.234 MAX6365/8-12 2.8 PROPAGATION DELAY (ns) MAX6365/8 -10 1.236 CHIP-ENABLE PROPAGATION DELAY vs. CE OUT LOAD CAPACITANCE MAX6365/8-11 MAX6368 RESET IN THRESHOLD vs. TEMPERATURE VRTH (V) MAX6365–MAX6368 SOT23, Low-Power µP Supervisory Circuits with Battery Backup and Chip-Enable Gating 60 80 -40 -20 0 20 40 60 80 TEMPERATURE (°C) _______________________________________________________________________________________ 150 200 SOT23, Low-Power µP Supervisory Circuits with Battery Backup and Chip-Enable Gating PIN NAME FUNCTION RESET Active-High Reset Output. RESET asserts high continuously when VCC is below the reset threshold (VTH), MR is low, or RESET IN is low. It asserts in pulses when the internal watchdog times out. RESET remains asserted for the reset timeout period (tRP) after VCC rises above the reset threshold, after the manual reset input goes from low to high, after RESET IN goes high, or after the watchdog triggers a reset event. RESET is an open-drain active-high reset output. RESET Active-Low Reset Output. RESET asserts low continuously when V C C is below the reset threshold (VTH), the manual reset input is low, or RESET IN is low. It asserts low in pulses when the internal watchdog times out. RESET remains asserted low for the reset timeout period (tRP) after V C C rises above the reset threshold, after the manual reset input goes from low to high, after RESET IN goes high, or after the watchdog triggers a reset event. The MAX636_L is an active-low pushpull output, while the MAX636_P is an active-low open-drain output. 2 CE IN Chip-Enable Input. The input to chip-enable gating circuitry. Connect to GND or OUT if not used. 3 GND Ground 1 4 MR MAX6365 Manual-Reset Input. Maintaining logic low on MR asserts a reset. Reset output remains asserted as long as MR is low and for the reset timeout period (tRP) after MR transitions from low to high. Leave unconnected, or connect to VCC if not used. MR has an internal 20kΩ pullup to VCC. WDI MAX6366 Watchdog Input. If WDI remains high or low for longer than the watchdog timeout period (t WD ), the internal watchdog timer runs out and a reset pulse is triggered for the reset timeout period (tRP). The internal watchdog clears whenever reset asserts or whenever WDI sees a rising or falling edge (Figure 2). BATT ON MAX6367 Battery-On Output. BATT ON goes high when in battery backup mode. RESET IN MAX6368 Reset Input. When RESET IN falls below 1.235V, reset asserts. Reset output remains asserted as long as RESET IN is low and for at least tRP after RESET IN goes high. 5 VCC Supply Voltage, 1.2V to 5.5V. Reset asserts when V C C drops below the reset threshold voltage (VTH). Reset remains asserted until V C C rises above VTH and for at least tRP after V C C rises above VTH. 6 OUT Output. OUT sources from V C C when not in reset and from the greater of VCC or BATT when V C C is below the reset threshold. 7 BATT Backup-Battery Input. When V C C falls below the reset threshold, OUT switches to BATT if VBATT is 20mV greater than V C C . When V C C rises 20mV above VBATT, OUT switches to V C C . The 40mV hysteresis prevents repeated switching if VCC falls slowly. 8 CE OUT Chip-Enable Output. CE OUT goes low only when CE IN is low and reset is not asserted. If CE IN is low when reset is asserted, CE OUT will stay low for 12µs (typ) or until CE IN goes high, whichever occurs first. _______________________________________________________________________________________ 7 MAX6365–MAX6368 Pin Description MAX6365–MAX6368 SOT23, Low-Power µP Supervisory Circuits with Battery Backup and Chip-Enable Gating Functional Diagram BATT ON (MAX6367 ONLY) 1.235V MAX6365 MAX6366 MAX6367 MAX6368 VCC OUT CHIP-ENABLE OUTPUT CONTROL BATT CE IN CE OUT 20k RESET GENERATOR MR (MAX6365 ONLY) WATCHDOG TRANSITION DETECTOR WDI (MAX6366 ONLY) RESET IN (MAX6368 ONLY) RESET (RESET) WATCHDOG TIMER 1.235V GND Detailed Description The Typical Operating Circuit shows a typical connection for the MAX6365–MAX6368. OUT powers the static random-access memory (SRAM). If VCC is greater than the reset threshold (VTH), or if VCC is lower than VTH but higher than VBATT, VCC is connected to OUT. If VCC is lower than VTH and VCC is less than VBATT, BATT is connected to OUT. OUT supplies up to 150mA from VCC. In battery-backup mode, an internal MOSFET connects the backup battery to OUT. The on-resistance of the MOSFET is a function of backup-battery voltage and is shown in the BATT-to-OUT On-Resistance vs. Temperature graph in the Typical Operating Characteristics. Chip-Enable Signal Gating The MAX6365–MAX6368 provide internal gating of CE signals to prevent erroneous data from being written to 8 CMOS RAM in the event of a power failure. During normal operation, the CE gate is enabled and passes all CE transitions. When reset asserts, this path becomes disabled, preventing erroneous data from corrupting the CMOS RAM. All of these devices use a series transmission gate from CE IN to CE OUT. The 2ns propagation delay from CE IN to CE OUT allows the devices to be used with most µPs and high-speed DSPs. During normal operation, CE IN is connected to CE OUT through a low on-resistance transmission gate. This is valid when reset is not asserted. If CE IN is high when reset is asserted, CE OUT remains high regardless of any subsequent transitions on CE IN during the reset event. If CE IN is low when reset is asserted, CE OUT is held low for 12µs to allow completion of the read/write operation (Figure 1). After the 12µs delay expires, the CE _______________________________________________________________________________________ SOT23, Low-Power µP Supervisory Circuits with Battery Backup and Chip-Enable Gating Table 1. Input and Output Status in Battery-Backup Mode PIN VCC OUT BATT RESET/RESET BATT ON MR, RESET IN, CE IN, WDI Table 1 lists the status of the inputs and outputs in battery-backup mode. The devices do not power up if the only voltage source is on BATT. OUT only powers up from VCC at startup. Inputs ignored CE OUT Backup-Battery Switchover In a brownout or power failure, it may be necessary to preserve the contents of the RAM. With a backup battery installed at BATT, the MAX6365–MAX6368 automatically switch the RAM to backup power when VCC falls. The MAX6367 has a BATT ON output that goes high in battery-backup mode. These devices require two conditions before switching to battery-backup mode: 1) VCC must be below the reset threshold. 2) VCC must be below VBATT. STATUS Disconnected from OUT Connected to BATT Connected to OUT. Current drawn from the battery is less than 1µA (at VBATT = 2.8V, excluding IOUT) when VCC = 0. Asserted High state Connected to OUT Manual Reset Input (MAX6365 Only) Many µP-based products require manual reset capability, allowing the user or external logic circuitry to initiate a reset. For the MAX6365, a logic low on MR asserts reset. Reset remains asserted while MR is low and for a minimum of 150ms (tRP) after it returns high. MR has an internal 20kΩ pullup resistor to VCC. This input can be driven with TTL/CMOS logic levels or with open-drain/collector outputs. Connect a normally open momentary switch from MR to GND to create a manual reset function; external debounce circuitry is not required. If MR is driven from long cables or the device is used in a noisy environment, connect a 0.1µF capacitor from MR to GND to provide additional noise immunity. VCC OR BATT RESET THRESHOLD VTH CE IN CE OUT * RESET-TO-CE OUT DELAY (12µs) tRD RESET tRD tRP tRP RESET * IF CE IN GOES HIGH BEFORE RESET ASSERTS, CE OUT GOES HIGH WITHOUT DELAY AS CE IN GOES HIGH. Figure 1. Reset and Chip-Enable Timing _______________________________________________________________________________________ 9 MAX6365–MAX6368 OUT goes high and stays high regardless of any subsequent transitions on CE IN during the reset event. When CE OUT is disconnected from CE IN, CE OUT is actively pulled up to OUT. The propagation delay through the chip-enable circuitry depends on both the source impedance of the drive to CE IN and the capacitive loading at CE OUT. The chip-enable propagation delay is production tested from the 50% point of CE IN to the 50% point of CE OUT, using a 50Ω driver and 50pF load capacitance. Minimize the capacitive load at CE OUT to minimize propagation delay, and use a low-output-impedance driver. MAX6365–MAX6368 SOT23, Low-Power µP Supervisory Circuits with Battery Backup and Chip-Enable Gating WDI tRP tWD tRP tWD RESET tWD = WATCHDOG TIMEOUT PERIOD tRP = RESET TIMEOUT PERIOD Figure 2. MAX6366 Watchdog Timeout Period and Reset Active Time Watchdog Input (MAX6366 Only) The watchdog monitors µP activity through the watchdog input (WDI). If the µP becomes inactive, reset asserts. To use the watchdog function, connect WDI to a bus line or µP I/O line. A change of state (high to low, low to high, or a minimum 100ns pulse) resets the watchdog timer. If WDI remains high or low for longer than the watchdog timeout period (tWD), the internal watchdog timer runs out and a reset pulse is triggered for the reset timeout period (tRP). The internal watchdog timer clears whenever reset asserts or whenever WDI sees a rising or falling edge. If WDI remains in either a high or low state, a reset pulse asserts periodically after every tWD (Figure 2). Leave WDI unconnected to disable the watchdog function. BATT ON Indicator (MAX6367 Only) BATT ON is a push-pull output that drives high when in battery-backup mode. BATT ON typically sinks 3.2mA at 0.1V saturation voltage. In battery-backup mode, this terminal sources approximately 10µA from OUT. Use BATT ON to indicate battery-switchover status or to supply base drive to an external pass transistor for higher current applications (Figure 3). RESET IN Comparator (MAX6368 Only) RESET IN is compared to an internal 1.235V reference. If the voltage at RESET IN is less than 1.235V, reset asserts. Use the RESET IN comparator as an undervoltage detector to signal a failing power supply or as a secondary power-supply reset monitor. To program the reset threshold (VRTH) of the secondary power supply, use the following (see Typical Operating Circuit): VRTH = VREF (R1 / R2 + 1) where VREF = 1.235V. To simplify the resistor selection, choose a value for R2 and calculate R1: 10 R1 = R2 [(VRTH / VREF) - 1] Since the input current at RESET IN is 25nA (max), large values (up to 1MΩ) can be used for R2 with no significant loss in accuracy. For example, in the Typical Operating Circuit, the MAX6368 monitors two supply voltages. To monitor the secondary 5V logic or analog supply with a 4.60V nominal programmed reset threshold, choose R2 = 100kΩ, and calculate R1 = 273kΩ. Reset Output A µP’s reset input starts the µP in a known state. The MAX6365–MAX6368 µP supervisory circuits assert a reset to prevent code-execution errors during powerup, power-down, and brownout conditions. RESET is guaranteed to be a logic low or logic high, depending on the device chosen (see Ordering Information). RESET or RESET asserts when VCC is below the reset threshold and for at least 150ms (tRP) after VCC rises above the reset threshold. RESET or RESET also asserts when MR is low (MAX6365) and when RESET IN is less than 1.235V (MAX6368). The MAX6366 watchdog function will cause RESET (or RESET) to assert in pulses following a watchdog timeout (Figure 2). Applications Information Operation Without a Backup Power Source The MAX6365–MAX6368 provide battery-backup functions. If a backup power source is not used, connect BATT to GND and OUT to VCC. Watchdog Software Considerations One way to help the watchdog timer monitor the software execution more closely is to set and reset the watchdog at different points in the program rather than pulsing the watchdog input periodically. Figure 4 shows a flow diagram in which the I/O driving the ______________________________________________________________________________________ SOT23, Low-Power µP Supervisory Circuits with Battery Backup and Chip-Enable Gating Replacing the Backup Battery When VCC is above VTH, the backup power source can be removed without danger of triggering a reset pulse. The device does not enter battery-backup mode when VCC stays above the reset threshold voltage. Negative-Going VCC Transients starting at VCC and ending below the reset threshold by the magnitude indicated (reset threshold overdrive). The graph shows the maximum pulse width that a negative-going VCC transient can typically have without triggering a reset pulse. As the amplitude of the transient increases (i.e., goes further below the reset threshold), the maximum allowable pulse width decreases. Typically, a VCC transient that goes 100mV below the reset threshold and lasts for 30µs will not trigger a reset pulse. A 0.1µF bypass capacitor mounted close to the VCC pin provides additional transient immunity. These supervisors are relatively immune to short-duration, negative-going VCC transients. Resetting the µP when VCC experiences only small glitches is usually not desirable. The Typical Operating Characteristics section has a Maximum Transient Duration vs. Reset Threshold Overdrive graph for which reset is not asserted. The graph was produced using negative-going VCC pulses, +2.4V TO +5.5V START 0.1µF SET WDI LOW BATT ON VCC OUT BATT CE OUT CE MAX6367 CMOS RAM CE IN ADDRESS DECODE A0–A15 µP GND RESET SUBROUTINE OR PROGRAM LOOP SET WDI HIGH RESET RETURN Figure 3. MAX6367 BATT ON Driving an External Pass Transistor END Figure 4. Watchdog Flow Diagram ______________________________________________________________________________________ 11 MAX6365–MAX6368 watchdog is set low in the beginning of the program, set high at the beginning of every subroutine or loop, and set low again when the program returns to the beginning. If the program should hang in any subroutine, the problem would be quickly corrected. MAX6365–MAX6368 SOT23, Low-Power µP Supervisory Circuits with Battery Backup and Chip-Enable Gating Reset Threshold Ranges SUFFIX 46 44 31 29 26 23 RESET THRESHOLD RANGES (V) MIN TYP MAX 4.50 4.63 4.75 4.25 4.38 4.50 3.00 3.08 3.15 2.85 2.93 3.00 2.55 2.63 2.70 2.25 2.32 2.38 Device Marking Codes PART MAX6365LKA23 TOP MARK PART TOP MARK PART TOP MARK AAAM MAX6366PKA23 AABK MAX6367HKA23 AACI MAX6365LKA26 AAAL MAX6366PKA26 AABJ MAX6367HKA26 AACH MAX6365LKA29* AAAK MAX6366PKA29* AABI MAX6367HKA29 AACG MAX6365LKA31 AAAJ MAX6366PKA31 AABH MAX6367HKA31 AACF MAX6365LKA44 AAAI MAX6366PKA44 AABG MAX6367HKA44 AACE MAX6365LKA46* AAAH MAX6366PKA46* AABF MAX6367HKA46* AACD MAX6365PKA23 AAAS MAX6366HKA23 AABQ MAX6368LKA23 AACO MAX6365PKA26 AAAR MAX6366HKA26 AABP MAX6368LKA26 AACN MAX6365PKA29* AAAQ MAX6366HKA29 AABO MAX6368LKA29* AACM MAX6365PKA31 AAAP MAX6366HKA31 AABN MAX6368LKA31 AACL AACK MAX6365PKA44 AAAO MAX6366HKA44 AABM MAX6368LKA44 MAX6365PKA46* AAAN MAX6366HKA46* AABL MAX6368LKA46* AACJ MAX6365HKA23 AAAY MAX6367LKA23 AABW MAX6368PKA23 AACU MAX6365HKA26 AAAX MAX6367LKA26 AABV MAX6368PKA26 AACT MAX6365HKA29 AAAW MAX6367LKA29* AABU MAX6368PKA29* AACS MAX6365HKA31 AAAV MAX6367LKA31 AABT MAX6368PKA31 AACR MAX6365HKA44 AAAU MAX6367LKA44 AABS MAX6368PKA44 AACQ MAX6365HKA46* AAAT MAX6367LKA46* AABR MAX6368PKA46* AACP MAX6366LKA23 AABE MAX6367PKA23 AACC MAX6368HKA23 AADA MAX6366LKA26 AABD MAX6367PKA26 AACB MAX6368HKA26 AACZ MAX6366LKA29* AABC MAX6367PKA29* AACA MAX6368HKA29 AACY MAX6366LKA31 AABB MAX6367PKA31 AABZ MAX6368HKA31 AACX MAX6366LKA44 AABA MAX6367PKA44 AABY MAX6368HKA44 AACW MAX6366LKA46* AAAZ MAX6367PKA46* AABX MAX6368HKA46* AACV *These standard versions are available in small quantities through Maxim Distribution. Sample stock is generally held on standard versions only. Contact factory for availability of nonstandard versions. 12 ______________________________________________________________________________________ SOT23, Low-Power µP Supervisory Circuits with Battery Backup and Chip-Enable Gating MANUAL RESET INPUT PART MAX6365LKA__ MAX6365PKA__ MAX6365HKA__ WATCHDOG INPUT BATT ON RESET PUSHPULL RESET IN RESET OPENDRAIN RESET OPENDRAIN MAX6366LKA__ MAX6366PKA__ MAX6366HKA__ MAX6367PKA__ MAX6367HKA__ MAX6368PKA__ MAX6368HKA__ MAX6368LKA__ MAX6367LKA__ CHIPENABLE GATING Pin Configurations (continued) TOP VIEW RESET, RESET 1 CE IN 2 RESET, RESET 1 8 CE OUT 7 BATT 3 6 OUT BATT ON 4 5 VCC 8 CE OUT 7 BATT CE IN 3 6 OUT GND WDI 4 5 VCC 2 MAX6367 MAX6366 GND SOT23 SOT23 RESET, RESET 1 8 CE OUT 7 BATT 3 6 OUT RESET IN 4 5 VCC CE IN 2 MAX6368 GND SOT23 ______________________________________________________________________________________ 13 MAX6365–MAX6368 Selector Guide SOT23, Low-Power µP Supervisory Circuits with Battery Backup and Chip-Enable Gating MAX6365–MAX6368 Typical Operating Circuit +2.4V TO +5.5V CMOS RAM 0.1µF CE VCC BATT OUT MAX6366 MAX6368 SECONDARY DC VOLTAGE REALTIME CLOCK 0.1µF A0–A15 RESET RESET R1 µP I/O RESET IN* WDI** R2 CE IN CE OUT GND ADDRESS DECODE *RESET IN APPLIES TO MAX6368 ONLY. **WDI APPLIES TO MAX6366 ONLY. Chip Information TRANSISTOR COUNT: 729 PROCESS: CMOS 14 ______________________________________________________________________________________ SOT23, Low-Power µP Supervisory Circuits with Battery Backup and Chip-Enable Gating SOT23, 8L.EPS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 © 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX6365–MAX6368 Package Information