FUJITSU SEMICONDUCTOR DATA SHEET DS05-50207-1E Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM CMOS 32M (× 8/×16) FLASH MEMORY & 8M (× 8/×16) STATIC RAM MB84VD2228XEA-90/MB84VD2229XEA-90 MB84VD2228XEE-90/MB84VD2229XEE-90 ■ FEATURES • Power supply voltage of 2.7 V to 3.3 V • High performance 90 ns maximum access time (Flash) 70 ns maximum access time (SRAM) • Operating Temperature –25°C to +85°C • Package 71-ball BGA (Continued) ■ PRODUCT LINE UP Flash Memory Ordering Part No. VCCf, VCCs= 3.0V +0.3 V –0.3 V SRAM MB84VD2228XEA/EE-90/MB84VD2229XEA/EE-90 Max. Address Access Time (ns) 90 70 Max. CE Access Time (ns) 90 70 Max. OE Access Time (ns) 40 35 ■ PACKAGE 71-ball plastic FBGA (BGA-71P-M01) MB84VD2228XEA/EE/2229XEA/EE-90 (Continued) 1.FLASH MEMORY • Simultaneous Read/Write operations (dual bank) Multiple devices available with different bank sizes Host system can program or erase in one bank, then immediately and simultaneously read from the other bank Zero latency between read and write operations Read-while-erase Read-while-program • Minimum 100,000 write/erase cycles • Sector erase architecture Eight 4 K words and sixty three 32 K words. Any combination of sectors can be concurrently erased. Also supports full chip erase. • Boot Code Sector Architecture MB84VD2228X: Top sector MB84VD2229X: Bottom sector • Embedded EraseTM Algorithms Automatically pre-programs and erases the chip or any sector • Embedded ProgramTM Algorithms Automatically writes and verifies data at specified address • Data Polling and Toggle Bit feature for detection of program or erase cycle completion • Ready-Busy output (RY/BY) Hardware method for detection of program or erase cycle completion • Automatic sleep mode When addresses remain stable, automatically switch themselves to low power mode. • Low VCCf write inhibit ≤ 2.5 V • Hidden ROM (Hi-ROM) region 64K byte of Hi-ROM, accessible through a new “Hi-ROM Enable” command sequence Factory serialized and protected to provide a secure electronic serial number (ESN) • WP/ACC input pin At VIL, allows protection of boot sectors, regardless of sector protection/unprotection status (MB84VD2228XEA/EE:SA69,SA70 MB84VD2229XEA/EE:SA0,SA1) At VIH, allows removal of boot sector protection At VACC, program time will reduse by 40%. • Erase Suspend/Resume Suspends the erase operation to allow a read in another sector within the same device • Please refer to “MBM29DL32XTE/BE” data sheet in detailed function 2.SRAM • Power dissipation Operating : 50 mA max. Standby : 25 µA max. • Power down features using CE1s and CE2s • Data retention supply voltage: 1.5 V to 3.3 V • CE1s and CE2s Chip Select • Byte data control: LBs (DQ0 to DQ7), UBs (DQ8 to DQ15) 2 MB84VD2228XEA/EE/2229XEA/EE-90 ■ PIN ASSIGNMENT (Top View) Marking side A8 B8 D8 E8 F8 G8 H8 J8 L8 M8 N.C. N.C. A15 N.C. N.C. A16 CIOf Vss N.C. N.C. A7 B7 C7 D7 E7 F7 G7 H7 J7 K7 L7 M7 N.C. N.C. A11 A12 A13 A14 SA DQ15/A-1 DQ7 DQ14 N.C. N.C. C6 D6 E6 F6 G6 H6 J6 K6 A8 A19 A9 A10 DQ6 DQ13 DQ12 DQ5 C5 D5 E5 H5 J5 K5 WE CE2s A20 DQ4 Vccs CIOs C4 D4 E4 H4 J4 K4 RY/BY DQ3 Vccf DQ11 WP/ACC RESET C3 D3 E3 F3 G3 H3 J3 K3 LBs UBs A18 A17 DQ1 DQ9 DQ10 DQ2 A2 C2 D2 E2 F2 G2 H2 J2 K2 L2 M2 N.C. A7 A6 A5 A4 VSS OE DQ0 DQ8 N.C. N.C. A1 B1 D1 E1 F1 G1 H1 J1 L1 M1 N.C. N.C. A3 A2 A1 A0 CEf CE1s N.C. N.C. (BGA-71P-M01) 3 MB84VD2228XEA/EE/2229XEA/EE-90 ■ PIN DESCRIPTION Pin no. Pin Name G1 A0 F1 A1 E1 A2 D1 A3 F2 A4 E2 A5 D2 A6 C2 A7 C6 A8 E6 A9 F6 A10 C7 A11 D7 A12 E7 A13 F7 A14 D8 A15 G8 A16 F3 A17 E3 A18 H7 A-1 D6 A19 E5 A20 G7 SA Function Input/Output Address Inputs (Common) I Address Input (Flash) I Address Input (SRAM) I (Continued) 4 MB84VD2228XEA/EE/2229XEA/EE-90 (Continued) Pin no. Pin Name Function J2 DQ0 G3 DQ1 K3 DQ2 H4 DQ3 H5 DQ4 K6 DQ5 G6 DQ6 J7 DQ7 K2 DQ8 H3 DQ9 J3 DQ10 K4 DQ11 J6 DQ12 H6 DQ13 K7 DQ14 H7 DQ15 H1 CEf Chip Enable (Flash) I J1 CE1s Chip Enable (SRAM) I D5 CE2s Chip Enable (SRAM) I H2 OE Output Enable (Common) I C5 WE Write Enable (Common) I E4 RY/BY Ready/Busy Outputs (Flash) Open Drain Output O D3 UBs Upper Byte Control (SRAM) I C3 LBs Lower Byte Control (SRAM) I H8 CIOf I/O Configuration (Flash) CIOf=VCCf is Word mode ( ×16), CIOf=VSS is Byte mode ( × 8) I K5 CIOs I/O Configuration (SRAM) CIOs=VCCs is Word mode ( ×16), CIOs=VSS is Byte mode ( × 8) I D4 RESET Hardware Reset Pin / Sector Protection Unlock (Flash) I C4 WP/ACC Write Protect / Acceleration (Flash) I Data Inputs / Outputs (Common) Input/Output I/O (Continued) 5 MB84VD2228XEA/EE/2229XEA/EE-90 (Continued) 6 Pin no. Pin Name Function Input/Output A1,A2,A7,A8 B1,B7,B8, E8,F8, L1,L2,L7,L8, M1,M2,M7,M8 N.C. No Internal Connection J8,G2 VSS Device Ground (Common) Power J4 VCCf Device Power Supply (Flash) Power J5 VCCs Device Power Supply (SRAM) Power — MB84VD2228XEA/EE/2229XEA/EE-90 ■ BLOCK DIAGRAM VCCf VSS A0 to A20 RY/BY A0 to A20 A–1 WP/ACC RESET CEf CIOf 32 M bit Flash Memory DQ0 to DQ15/A–1 DQ0 to DQ15/A–1 VCCs VSS A0 to A18 SA LBs UBs WE OE CE1s CE2s CIOs 8 M bit Static RAM DQ0 to DQ15 7 MB84VD2228XEA/EE/2229XEA/EE-90 ■ DEVICE BUS OPERATIONS Table 1. 1 User Bus Operations (Flash=Word mode; CIOf=VCCf, SRAM=Word mode; CIOs=VCCs) Operation (1), (3) CEf CE1s CE2s OE Full Standby H H Output Disable L Read from Flash (2) L Write to Flash L Read from SRAM Write to SRAM H H Temporary Sector Group Unprotection(4) X Flash Hardware Reset X Boot Block Sector Write Protection X H X X L L H H X X L H X X L H X X L L L H H X X H X X L X X WE WP/ SA LBs UBs DQ0 to DQ7 DQ8 to DQ15 RESET ACC (6) (5) X X X X X HIGH-Z HIGH-Z H H X X X HIGH-Z HIGH-Z X X X H H HIGH-Z HIGH-Z H H X X X HIGH-Z HIGH-Z L H X X X DOUT H L X X X L L X H L X X H X H X DOUT H X DIN DIN H X L DOUT DOUT H L HIGH-Z DOUT H X L H DOUT HIGH-Z L L DIN DIN H L HIGH-Z DIN H X L H DIN HIGH-Z X X X X X X X VID X X X X X X HIGH-Z HIGH-Z L X X X X X X X X X L Legend: L = VIL, H = VIH, X = VIL or VIH. See DC Characteristics for voltage levels. Notes: 8 1. Other operations except for indicated this column are inhibited. 2. WE can be VIL if OE is VIL, OE at VIH initiates the write operations. 3. Do not apply CEf = VIL, CE1s = VIL and CE2s = VIH at a time. 4. It is also used for the extended sector group protections. 5. WP/ACC = VIL; protection of boot sectors. WP/ACC = VIH; removal of boot sectors protection. WP/ACC = VACC (9V) ; Program time will reduce by 40%. 6. SA; Don’t care or Open. MB84VD2228XEA/EE/2229XEA/EE-90 Table 1. 2 User Bus Operations (Flash=Word mode; CIOf=VCCf, SRAM=Byte mode; CIOs=VSS) Operation (1), (3) CEf CE1s CE2s OE Full Standby H H Output Disable L H X X L L H H X X L H X X L H X X L WE WP/ UBs SA LBs (6) (6) DQ0 to DQ7 DQ8 to DQ15 RESET ACC (5) X X X X X HIGH-Z HIGH-Z H X H H X X X HIGH-Z HIGH-Z X X X X X HIGH-Z HIGH-Z H X H H X X X HIGH-Z HIGH-Z L H X X X DOUT DOUT H X H L X X X DIN DIN H X Read from Flash (2) L Write to Flash L Read from SRAM H L H L H SA X X DOUT HIGH-Z H X Write to SRAM H L H X L SA X X DIN HIGH-Z H X Temporary Sector Group Unprotection(4) X X X X X X X X X X VID X Flash Hardware Reset X H X X L X X X X X HIGH-Z HIGH-Z L X Boot Block Sector Write Protection X X X X X X X X X X X L Legend: L = VIL, H = VIH, X = VIL or VIH. See DC Characteristics for voltage levels. Notes: 1. Other operations except for indicated this column are inhibited. 2. WE can be VIL if OE is VIL, OE at VIH initiates the write operations. 3. Do not apply CEf = VIL, CE1s = VIL and CE2s = VIH at a time. 4. It is also used for the extended sector group protections. 5. WP/ACC = VIL; protection of boot sectors. WP/ACC = VIH; removal of boot sectors protection. WP/ACC = VACC (9V); Program time will reduce by 40%. 6. LBS , UBS; Don’t care or Open. 9 MB84VD2228XEA/EE/2229XEA/EE-90 Table 1. 3 User Bus Operations (Flash=Byte mode; CIOf=VSS, SRAM=Byte mode; CIOs=VSS) UBs Operation (1), (3) CEf CE1s CE2s DQ15/A–1 OE WE SA LBs (6) (6) Full Standby H H Output Disable L H X X L L H H X X L H X X L H X X L DQ0 to DQ7 DQ8 to DQ14 X X X X X X HIGH-Z HIGH-Z X H H X X X HIGH-Z HIGH-Z X X X X X X HIGH-Z HIGH-Z A–1 H H X X X HIGH-Z HIGH-Z A–1 L H X X X DOUT A–1 H L X X X H X H X X H X DIN X H X Read from Flash (2) L Write to Flash L Read from SRAM H L H X L H SA X X DOUT HIGH-Z H X Write to SRAM H L H X X L SA X X DIN HIGH-Z H X Temporary Sector Group Unprotection(4) X X X X X X X X X X X VID X Flash Hardware Reset X H X X L X X X X X X HIGH-Z HIGH-Z L X Boot Block Sector Write Protection X X X X X X X X X X X X L Legend: L = VIL, H = VIH, X = VIL or VIH. See DC Characteristics for voltage levels. Notes: 10 WP/ RESET ACC (5) 1. Other operations except for indicated this column are inhibited. 2. WE can be VIL if OE is VIL, OE at VIH initiates the write operations. 3. Do not apply CEf = VIL, CE1s = VIL and CE2s = VIH at a time. 4. It is also used for the extended sector group protections. 5. WP/ACC = VIL; protection of boot sectors. WP/ACC = VIH; removal of boot sectors protection. WP/ACC = VACC (9V); Program time will reduce by 40%. 6. LBS , UBS; Don’t care or Open. MB84VD2228XEA/EE/2229XEA/EE-90 ■ FLEXIBLE SECTOR-ERASE ARCHITECTURE on FLASH MEMORY • Eight 4 K words, and sixty three 32 K words. • Individual-sector, multiple-sector, or bulk-erase capability. Bank 1 MB84VD22281EA/EE Bank 1 MB84VD22282EA/EE Bank 1 MB84VD22283EA/EE Bank 1 MB84VD22284EA/EE Bank 2 MB84VD22281EA/EE Bank 2 MB84VD22282EA/EE Bank 2 MB84VD22283EA/EE Bank 2 MB84VD22284EA/EE SA70 : 8KB (4KW) SA69 : 8KB (4KW) SA68 : 8KB (4KW) SA67 : 8KB (4KW) SA66 : 8KB (4KW) SA65 : 8KB (4KW) SA64 : 8KB (4KW) SA63 : 8KB (4KW) SA62 : 64KB (32KW) SA61 : 64KB (32KW) SA60 : 64KB (32KW) SA59 : 64KB (32KW) SA58 : 64KB (32KW) SA57 : 64KB (32KW) SA56 : 64KB (32KW) SA55 : 64KB (32KW) SA54 : 64KB (32KW) SA53 : 64KB (32KW) SA52 : 64KB (32KW) SA51 : 64KB (32KW) SA50 : 64KB (32KW) SA49 : 64KB (32KW) SA48 : 64KB (32KW) SA47 : 64KB (32KW) SA46 : 64KB (32KW) SA45 : 64KB (32KW) SA44 : 64KB (32KW) SA43 : 64KB (32KW) SA42 : 64KB (32KW) SA41 : 64KB (32KW) SA40 : 64KB (32KW) SA39 : 64KB (32KW) SA38 : 64KB (32KW) SA37 : 64KB (32KW) SA36 : 64KB (32KW) SA35 : 64KB (32KW) SA34 : 64KB (32KW) SA33 : 64KB (32KW) SA32 : 64KB (32KW) SA31 : 64KB (32KW) SA30 : 64KB (32KW) SA29 : 64KB (32KW) SA28 : 64KB (32KW) SA27 : 64KB (32KW) SA26 : 64KB (32KW) SA25 : 64KB (32KW) SA24 : 64KB (32KW) SA23 : 64KB (32KW) SA22 : 64KB (32KW) SA21 : 64KB (32KW) SA20 : 64KB (32KW) SA19 : 64KB (32KW) SA18 : 64KB (32KW) SA17 : 64KB (32KW) SA16 : 64KB (32KW) SA15 : 64KB (32KW) SA14 : 64KB (32KW) SA13 : 64KB (32KW) SA12 : 64KB (32KW) SA11 : 64KB (32KW) SA10 : 64KB (32KW) SA9 : 64KB (32KW) SA8 : 64KB (32KW) SA7 : 64KB (32KW) SA6 : 64KB (32KW) SA5 : 64KB (32KW) SA4 : 64KB (32KW) SA3 : 64KB (32KW) SA2 : 64KB (32KW) SA1 : 64KB (32KW) SA0 : 64KB (32KW) Word Mode 1FFFFFh 1FF000h 1FE000h 1FD000h 1FC000h 1FB000h 1FA000h 1F9000h 1F8000h 1F0000h 1E8000h 1E0000h 1D8000h 1D0000h 1C8000h 1C0000h 1B8000h 1B0000h 1A8000h 1A0000h 198000h 190000h 188000h 180000h 178000h 170000h 168000h 160000h 158000h 150000h 148000h 140000h 138000h 130000h 128000h 120000h 118000h 110000h 108000h 100000h 0F8000h 0F0000h 0E8000h 0E0000h 0D8000h 0D0000h 0C8000h 0C0000h 0B8000h 0B0000h 0A8000h 0A0000h 098000h 090000h 088000h 080000h 078000h 070000h 068000h 060000h 058000h 050000h 048000h 040000h 038000h 030000h 028000h 020000h 018000h 010000h 008000h 000000h Byte Mode 3FFFFFh 3FE000h 3FC000h 3FA000h 3F8000h 3F6000h 3F4000h 3F2000h 3F0000h 3E0000h 3D0000h 3C0000h 3B0000h 3A0000h 390000h 380000h 370000h 360000h 350000h 340000h 330000h 320000h 310000h 300000h 2F0000h 2E0000h 2D0000h 2C0000h 2B0000h 2A0000h 290000h 280000h 270000h 260000h 250000h 240000h 230000h 220000h 210000h 200000h 1F0000h 1E0000h 1D0000h 1C0000h 1B0000h 1A0000h 190000h 180000h 170000h 160000h 150000h 140000h 130000h 120000h 110000h 100000h 0F0000h 0E0000h 0D0000h 0C0000h 0B0000h 0A0000h 090000h 080000h 070000h 060000h 050000h 040000h 030000h 020000h 010000h 000000h MB84VD2228XEA/EE Sector Architecture (Top Boot Block) (Continued) 11 MB84VD2228XEA/EE/2229XEA/EE-90 (Continued) Bank 2 MB84VD22294EA/EE Bank 2 MB84VD22293EA/EE Bank 2 MB84VD22292EA/EE Bank 2 MB84VD22291EA/EE Bank 1 MB84VD22294EA/EE Bank 1 MB84VD22293EA/EE Bank 1 MB84VD22292EA/EE Bank 1 MB84VD22291EA/EE SA70 : 64KB (32KW) SA69 : 64KB (32KW) SA68 : 64KB (32KW) SA67 : 64KB (32KW) SA66 : 64KB (32KW) SA65 : 64KB (32KW) SA64 : 64KB (32KW) SA63 : 64KB (32KW) SA62 : 64KB (32KW) SA61 : 64KB (32KW) SA60 : 64KB (32KW) SA59 : 64KB (32KW) SA58 : 64KB (32KW) SA57 : 64KB (32KW) SA56 : 64KB (32KW) SA55 : 64KB (32KW) SA54 : 64KB (32KW) SA53 : 64KB (32KW) SA52 : 64KB (32KW) SA51 : 64KB (32KW) SA50 : 64KB (32KW) SA49 : 64KB (32KW) SA48 : 64KB (32KW) SA47 : 64KB (32KW) SA46 : 64KB (32KW) SA45 : 64KB (32KW) SA44 : 64KB (32KW) SA43 : 64KB (32KW) SA42 : 64KB (32KW) SA41 : 64KB (32KW) SA40 : 64KB (32KW) SA39 : 64KB (32KW) SA38 : 64KB (32KW) SA37 : 64KB (32KW) SA36 : 64KB (32KW) SA35 : 64KB (32KW) SA34 : 64KB (32KW) SA33 : 64KB (32KW) SA32 : 64KB (32KW) SA31 : 64KB (32KW) SA30 : 64KB (32KW) SA29 : 64KB (32KW) SA28 : 64KB (32KW) SA27 : 64KB (32KW) SA26 : 64KB (32KW) SA25 : 64KB (32KW) SA24 : 64KB (32KW) SA23 : 64KB (32KW) SA22 : 64KB (32KW) SA21 : 64KB (32KW) SA20 : 64KB (32KW) SA19 : 64KB (32KW) SA18 : 64KB (32KW) SA17 : 64KB (32KW) SA16 : 64KB (32KW) SA15 : 64KB (32KW) SA14 : 64KB (32KW) SA13 : 64KB (32KW) SA12 : 64KB (32KW) SA11 : 64KB (32KW) SA10 : 64KB (32KW) SA9 : 64KB (32KW) SA8 : 64KB (32KW) SA7 : 8KB (4KW) SA6 : 8KB (4KW) SA5 : 8KB (4KW) SA4 : 8KB (4KW) SA3 : 8KB (4KW) SA2 : 8KB (4KW) SA1 : 8KB (4KW) SA0 : 8KB (4KW) Word Mode 1FFFFFh 1F8000h 1F0000h 1E8000h 1E0000h 1D8000h 1D0000h 1C8000h 1C0000h 1B8000h 1B0000h 1A8000h 1A0000h 198000h 190000h 188000h 180000h 178000h 170000h 168000h 160000h 158000h 150000h 148000h 140000h 138000h 130000h 128000h 120000h 118000h 110000h 108000h 100000h 0F8000h 0F0000h 0E8000h 0E0000h 0D8000h 0D0000h 0C8000h 0C0000h 0B8000h 0B0000h 0A8000h 0A0000h 098000h 090000h 088000h 080000h 078000h 070000h 068000h 060000h 058000h 050000h 048000h 040000h 038000h 030000h 028000h 020000h 018000h 010000h 008000h 007000h 006000h 005000h 004000h 003000h 002000h 001000h 000000h MB84VD2229XEA/EE Sector Architecture (Bottom Boot Block) 12 Byte Mode 3FFFFFh 3F0000h 3E0000h 3D0000h 3C0000h 3B0000h 3A0000h 390000h 380000h 370000h 360000h 350000h 340000h 330000h 320000h 310000h 300000h 2F0000h 2E0000h 2D0000h 2C0000h 2B0000h 2A0000h 290000h 280000h 270000h 260000h 250000h 240000h 230000h 220000h 210000h 200000h 1F0000h 1E0000h 1D0000h 1C0000h 1B0000h 1A0000h 190000h 180000h 170000h 160000h 150000h 140000h 130000h 120000h 110000h 100000h 0F0000h 0E0000h 0D0000h 0C0000h 0B0000h 0A0000h 090000h 080000h 070000h 060000h 050000h 040000h 030000h 020000h 010000h 00E000h 00C000h 00A000h 008000h 006000h 004000h 002000h 000000h MB84VD2228XEA/EE/2229XEA/EE-90 Table 2. 1 Sector Address Tables (MB84VD22281EA/EE) Sector Address Bank Bank 2 Sector Bank Address Address Range (BYTE mode) Address Range (WORD mode) A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 SA0 0 0 0 0 0 0 X X X X 000000h to 00FFFFh 000000h to 007FFFh SA1 0 0 0 0 0 1 X X X X 010000h to 01FFFFh 008000h to 00FFFFh SA2 0 0 0 0 1 0 X X X X 020000h to 02FFFFh 010000h to 017FFFh SA3 0 0 0 0 1 1 X X X X 030000h to 03FFFFh 018000h to 01FFFFh SA4 0 0 0 1 0 0 X X X X 040000h to 04FFFFh 020000h to 027FFFh SA5 0 0 0 1 0 1 X X X X 050000h to 05FFFFh 028000h to 02FFFFh SA6 0 0 0 1 1 0 X X X X 060000h to 06FFFFh 030000h to 037FFFh SA7 0 0 0 1 1 1 X X X X 070000h to 07FFFFh 038000h to 03FFFFh SA8 0 0 1 0 0 0 X X X X 080000h to 08FFFFh 040000h to 047FFFh SA9 0 0 1 0 0 1 X X X X 090000h to 09FFFFh 048000h to 04FFFFh SA10 0 0 1 0 1 0 X X X X 0A0000h to 0AFFFFh 050000h to 057FFFh SA11 0 0 1 0 1 1 X X X X 0B0000h to 0BFFFFh 058000h to 05FFFFh SA12 0 0 1 1 0 0 X X X X 0C0000h to 0CFFFFh 060000h to 067FFFh SA13 0 0 1 1 0 1 X X X X 0D0000h to 0DFFFFh 068000h to 06FFFFh SA14 0 0 1 1 1 0 X X X X 0E0000h to 0EFFFFh 070000h to 077FFFh SA15 0 0 1 1 1 1 X X X X 0F0000h to 0FFFFFh 078000h to 07FFFFh SA16 0 1 0 0 0 0 X X X X 100000h to 10FFFFh 080000h to 087FFFh SA17 0 1 0 0 0 1 X X X X 110000h to 11FFFFh 088000h to 08FFFFh SA18 0 1 0 0 1 0 X X X X 120000h to 12FFFFh 090000h to 097FFFh SA19 0 1 0 0 1 1 X X X X 130000h to 13FFFFh 098000h to 09FFFFh SA20 0 1 0 1 0 0 X X X X 140000h to 14FFFFh 0A0000h to 0A7FFFh SA21 0 1 0 1 0 1 X X X X 150000h to 15FFFFh 0A8000h to 0AFFFFh SA22 0 1 0 1 1 0 X X X X 160000h to 16FFFFh 0B0000h to 0B7FFFh SA23 0 1 0 1 1 1 X X X X 170000h to 17FFFFh 0B8000h to 0BFFFFh SA24 0 1 1 0 0 0 X X X X 180000h to 18FFFFh 0C0000h to 0C7FFFh SA25 0 1 1 0 0 1 X X X X 190000h to 19FFFFh 0C8000h to 0CFFFFh SA26 0 1 1 0 1 0 X X X X 1A0000h to 1AFFFFh 0D0000h to 0D7FFFh SA27 0 1 1 0 1 1 X X X X 1B0000h to 1BFFFFh 0D8000h to 0DFFFFh SA28 0 1 1 1 0 0 X X X X 1C0000h to 1CFFFFh 0E0000h to 0E7FFFh SA29 0 1 1 1 0 1 X X X X 1D0000h to 1DFFFFh 0E8000h to 0EFFFFh SA30 0 1 1 1 1 0 X X X X 1E0000h to 1EFFFFh 0F0000h to 0F7FFFh SA31 0 1 1 1 1 1 X X X X 1F0000h to 1FFFFFh 0F8000h to 0FFFFFh (Continued) 13 MB84VD2228XEA/EE/2229XEA/EE-90 (Continued) Sector Address Bank Bank 2 Bank 1 14 Sector Bank Address Address Range (BYTE mode) Address Range (WORD mode) A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 SA32 1 0 0 0 0 0 X X X X 200000h to 20FFFFh 100000h to 107FFFh SA33 1 0 0 0 0 1 X X X X 210000h to 21FFFFh 108000h to 10FFFFh SA34 1 0 0 0 1 0 X X X X 220000h to 22FFFFh 110000h to 117FFFh SA35 1 0 0 0 1 1 X X X X 230000h to 23FFFFh 118000h to 11FFFFh SA36 1 0 0 1 0 0 X X X X 240000h to 24FFFFh 120000h to 127FFFh SA37 1 0 0 1 0 1 X X X X 250000h to 25FFFFh 128000h to 12FFFFh SA38 1 0 0 1 1 0 X X X X 260000h to 26FFFFh 130000h to 137FFFh SA39 1 0 0 1 1 1 X X X X 270000h to 27FFFFh 138000h to 13FFFFh SA40 1 0 1 0 0 0 X X X X 280000h to 28FFFFh 140000h to 147FFFh SA41 1 0 1 0 0 1 X X X X 290000h to 29FFFFh 148000h to 14FFFFh SA42 1 0 1 0 1 0 X X X X 2A0000h to 2AFFFFh 150000h to 157FFFh SA43 1 0 1 0 1 1 X X X X 2B0000h to 2BFFFFh 158000h to 15FFFFh SA44 1 0 1 1 0 0 X X X X 2C0000h to 2CFFFFh 160000h to 167FFFh SA45 1 0 1 1 0 1 X X X X 2D0000h to 2DFFFFh 168000h to 16FFFFh SA46 1 0 1 1 1 0 X X X X 2E0000h to 2EFFFFh 170000h to 177FFFh SA47 1 0 1 1 1 1 X X X X 2F0000h to 2FFFFFh 178000h to 17FFFFh SA48 1 1 0 0 0 0 X X X X 300000h to 30FFFFh 180000h to 187FFFh SA49 1 1 0 0 0 1 X X X X 310000h to 31FFFFh 188000h to 18FFFFh SA50 1 1 0 0 1 0 X X X X 320000h to 32FFFFh 190000h to 197FFFh SA51 1 1 0 0 1 1 X X X X 330000h to 33FFFFh 198000h to 19FFFFh SA52 1 1 0 1 0 0 X X X X 340000h to 34FFFFh 1A0000h to 1A7FFFh SA53 1 1 0 1 0 1 X X X X 350000h to 35FFFFh 1A8000h to 1AFFFFh SA54 1 1 0 1 1 0 X X X X 360000h to 36FFFFh 1B0000h to 1B7FFFh SA55 1 1 0 1 1 1 X X X X 370000h to 37FFFFh 1B8000h to 1BFFFFh SA56 1 1 1 0 0 0 X X X X 380000h to 38FFFFh 1C0000h to 1C7FFFh SA57 1 1 1 0 0 1 X X X X 390000h to 39FFFFh 1C8000h to 1CFFFFh SA58 1 1 1 0 1 0 X X X X 3A0000h to 3AFFFFh 1D0000h to 1D7FFFh SA59 1 1 1 0 1 1 X X X X 3B0000h to 3BFFFFh 1D8000h to 1DFFFFh SA60 1 1 1 1 0 0 X X X X 3C0000h to 3CFFFFh 1E0000h to 1E7FFFh SA61 1 1 1 1 0 1 X X X X 3D0000h to 3DFFFFh 1E8000h to 1EFFFFh SA62 1 1 1 1 1 0 X X X X 3E0000h to 3EFFFFh 1F0000h to 1F7FFFh SA63 1 1 1 1 1 1 0 0 0 X 3F0000h to 3F1FFFh 1F8000h to 1F8FFFh SA64 1 1 1 1 1 1 0 0 1 X 3F2000h to 3F3FFFh 1F9000h to 1F9FFFh SA65 1 1 1 1 1 1 0 1 0 X 3F4000h to 3F5FFFh 1FA000h to 1FAFFFh SA66 1 1 1 1 1 1 0 1 1 X 3F6000h to 3F7FFFh 1FB000h to 1FBFFFh SA67 1 1 1 1 1 1 1 0 0 X 3F8000h to 3F9FFFh 1FC000h to 1FCFFFh SA68 1 1 1 1 1 1 1 0 1 X 3FA000h to 3FAFFFh 1FD000h to 1FDFFFh SA69 1 1 1 1 1 1 1 1 0 X 3FC000h to 3FCFFFh 1FE000h to 1FEFFFh SA70 1 1 1 1 1 1 1 1 1 X 3FE000h to 3FFFFFh 1FF000h to 1FFFFFh MB84VD2228XEA/EE/2229XEA/EE-90 Table 2. 2 Sector Address Tables (MB84VD22291EA/EE) Sector Address Bank Bank 1 Bank 2 Sector Band Address Address Range (BYTE mode) Address Range (WORD mode) A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 SA0 0 0 0 0 0 0 0 0 0 X 000000h to 001FFFh 000000h to 000FFFh SA1 0 0 0 0 0 0 0 0 1 X 002000h to 003FFFh 001000h to 001FFFh SA2 0 0 0 0 0 0 0 1 0 X 004000h to 005FFFh 002000h to 002FFFh SA3 0 0 0 0 0 0 0 1 1 X 006000h to 007FFFh 003000h to 003FFFh SA4 0 0 0 0 0 0 1 0 0 X 008000h to 009FFFh 004000h to 004FFFh SA5 0 0 0 0 0 0 1 0 1 X 00A000h to 00BFFFh 005000h to 005FFFh SA6 0 0 0 0 0 0 1 1 0 X 00C000h to 00DFFFh 006000h to 006FFFh SA7 0 0 0 0 0 0 1 1 1 X 00E000h to 00FFFFh 007000h to 007FFFh SA8 0 0 0 0 0 1 X X X X 010000h to 01FFFFh 008000h to 00FFFFh SA9 0 0 0 0 1 0 X X X X 020000h to 02FFFFh 010000h to 017FFFh SA10 0 0 0 0 1 1 X X X X 030000h to 03FFFFh 018000h to 01FFFFh SA11 0 0 0 1 0 0 X X X X 040000h to 04FFFFh 020000h to 027FFFh SA12 0 0 0 1 0 1 X X X X 050000h to 05FFFFh 028000h to 02FFFFh SA13 0 0 0 1 1 0 X X X X 060000h to 06FFFFh 030000h to 037FFFh SA14 0 0 0 1 1 1 X X X X 070000h to 07FFFFh 038000h to 03FFFFh SA15 0 0 1 0 0 0 X X X X 080000h to 08FFFFh 040000h to 047FFFh SA16 0 0 1 0 0 1 X X X X 090000h to 09FFFFh 048000h to 04FFFFh SA17 0 0 1 0 1 0 X X X X 0A0000h to 0AFFFFh 050000h to 057FFFh SA18 0 0 1 0 1 1 X X X X 0B0000h to 0BFFFFh 058000h to 05FFFFh SA19 0 0 1 1 0 0 X X X X 0C0000h to 0CFFFFh 060000h to 067FFFh SA20 0 0 1 1 0 1 X X X X 0D0000h to 0DFFFFh 068000h to 06FFFFh SA21 0 0 1 1 1 0 X X X X 0E0000h to 0EFFFFh 070000h to 077FFFh SA22 0 0 1 1 1 1 X X X X 0F0000h to 0FFFFFh 078000h to 07FFFFh SA23 0 1 0 0 0 0 X X X X 100000h to 10FFFFh 080000h to 087FFFh SA24 0 1 0 0 0 1 X X X X 110000h to 11FFFFh 088000h to 08FFFFh SA25 0 1 0 0 1 0 X X X X 120000h to 12FFFFh 090000h to 097FFFh SA26 0 1 0 0 1 1 X X X X 130000h to 13FFFFh 098000h to 09FFFFh SA27 0 1 0 1 0 0 X X X X 140000h to 14FFFFh 0A0000h to 0A7FFFh SA28 0 1 0 1 0 1 X X X X 150000h to 15FFFFh 0A8000h to 0AFFFFh SA29 0 1 0 1 1 0 X X X X 160000h to 16FFFFh 0B0000h to 0B7FFFh SA30 0 1 0 1 1 1 X X X X 170000h to 17FFFFh 0B8000h to 0BFFFFh SA31 0 1 1 0 0 0 X X X X 180000h to 18FFFFh 0C0000h to 0C7FFFh SA32 0 1 1 0 0 1 X X X X 190000h to 19FFFFh 0C8000h to 0CFFFFh SA33 0 1 1 0 1 0 X X X X 1A0000h to 1AFFFFh 0D0000h to 0D7FFFh SA34 0 1 1 0 1 1 X X X X 1B0000h to 1BFFFFh 0D8000h to 0DFFFFh SA35 0 1 1 1 0 0 X X X X 1C0000h to 1CFFFFh 0E0000h to 0E7FFFh (Continued) 15 MB84VD2228XEA/EE/2229XEA/EE-90 (Continued) Sector Address Bank Bank 2 16 Sector Bank Address Address Range (BYTE mode) Address Range (WORD mode) A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 SA36 0 1 1 1 0 1 X X X X 1D0000h to 1DFFFFh 0E8000h to 0EFFFFh SA37 0 1 1 1 1 0 X X X X 1E0000h to 1EFFFFh 0F0000h to 0F7FFFh SA38 0 1 1 1 1 1 X X X X 1F0000h to 1FFFFFh 0F8000h to 0FFFFFh SA39 1 0 0 0 0 0 X X X X 200000h to 20FFFFh 100000h to 107FFFh SA40 1 0 0 0 0 1 X X X X 210000h to 21FFFFh 108000h to 10FFFFh SA41 1 0 0 0 1 0 X X X X 220000h to 22FFFFh 110000h to 117FFFh SA42 1 0 0 0 1 1 X X X X 230000h to 23FFFFh 118000h to 11FFFFh SA43 1 0 0 1 0 0 X X X X 240000h to 24FFFFh 120000h to 127FFFh SA44 1 0 0 1 0 1 X X X X 250000h to 25FFFFh 128000h to 12FFFFh SA45 1 0 0 1 1 0 X X X X 260000h to 26FFFFh 130000h to 137FFFh SA46 1 0 0 1 1 1 X X X X 270000h to 27FFFFh 138000h to 13FFFFh SA47 1 0 1 0 0 0 X X X X 280000h to 28FFFFh 140000h to 147FFFh SA48 1 0 1 0 0 1 X X X X 290000h to 29FFFFh 148000h to 14FFFFh SA49 1 0 1 0 1 0 X X X X 2A0000h to 2AFFFFh 150000h to 157FFFh SA50 1 0 1 0 1 1 X X X X 2B0000h to 2BFFFFh 158000h to 15FFFFh SA51 1 0 1 1 0 0 X X X X 2C0000h to 2CFFFFh 160000h to 167FFFh SA52 1 0 1 1 0 1 X X X X 2D0000h to 2DFFFFh 168000h to 16FFFFh SA53 1 0 1 1 1 0 X X X X 2E0000h to 2EFFFFh 170000h to 177FFFh SA54 1 0 1 1 1 1 X X X X 2F0000h to 2FFFFFh 178000h to 17FFFFh SA55 1 1 0 0 0 0 X X X X 300000h to 30FFFFh 180000h to 187FFFh SA56 1 1 0 0 0 1 X X X X 310000h to 31FFFFh 188000h to 18FFFFh SA57 1 1 0 0 1 0 X X X X 320000h to 32FFFFh 190000h to 197FFFh SA58 1 1 0 0 1 1 X X X X 330000h to 33FFFFh 198000h to 19FFFFh SA59 1 1 0 1 0 0 X X X X 340000h to 34FFFFh 1A0000h to 1A7FFFh SA60 1 1 0 1 0 1 X X X X 350000h to 35FFFFh 1A8000h to 1AFFFFh SA61 1 1 0 1 1 0 X X X X 360000h to 36FFFFh 1B0000h to 1B7FFFh SA62 1 1 0 1 1 1 X X X X 370000h to 37FFFFh 1B8000h to 1BFFFFh SA63 1 1 1 0 0 0 X X X X 380000h to 38FFFFh 1C0000h to 1C7FFFh SA64 1 1 1 0 0 1 X X X X 390000h to 39FFFFh 1C8000h to 1CFFFFh SA65 1 1 1 0 1 0 X X X X 3A0000h to 3AFFFFh 1D0000h to 1D7FFFh SA66 1 1 1 0 1 1 X X X X 3B0000h to 3BFFFFh 1D8000h to 1DFFFFh SA67 1 1 1 1 0 0 X X X X 3C0000h to 3CFFFFh 1E0000h to 1E7FFFh SA68 1 1 1 1 0 1 X X X X 3D0000h to 3DFFFFh 1E8000h to 1EFFFFh SA69 1 1 1 1 1 0 X X X X 3E0000h to 3EFFFFh 1F0000h to 1F7FFFh SA70 1 1 1 1 1 1 X X X X 3F0000h to 3FFFFFh 1F8000h to 1FFFFFh MB84VD2228XEA/EE/2229XEA/EE-90 Table 2. 3 Sector Address Tables (MB84VD22282EA/EE) Sector Address Bank Bank 2 Sector Bank Address Address Range (BYTE mode) Address Range (WORD mode) A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 SA0 0 0 0 0 0 0 X X X X 000000h to 00FFFFh 000000h to 007FFFh SA1 0 0 0 0 0 1 X X X X 010000h to 01FFFFh 008000h to 00FFFFh SA2 0 0 0 0 1 0 X X X X 020000h to 02FFFFh 010000h to 017FFFh SA3 0 0 0 0 1 1 X X X X 030000h to 03FFFFh 018000h to 01FFFFh SA4 0 0 0 1 0 0 X X X X 040000h to 04FFFFh 020000h to 027FFFh SA5 0 0 0 1 0 1 X X X X 050000h to 05FFFFh 028000h to 02FFFFh SA6 0 0 0 1 1 0 X X X X 060000h to 06FFFFh 030000h to 037FFFh SA7 0 0 0 1 1 1 X X X X 070000h to 07FFFFh 038000h to 03FFFFh SA8 0 0 1 0 0 0 X X X X 080000h to 08FFFFh 040000h to 047FFFh SA9 0 0 1 0 0 1 X X X X 090000h to 09FFFFh 048000h to 04FFFFh SA10 0 0 1 0 1 0 X X X X 0A0000h to 0AFFFFh 050000h to 057FFFh SA11 0 0 1 0 1 1 X X X X 0B0000h to 0BFFFFh 058000h to 05FFFFh SA12 0 0 1 1 0 0 X X X X 0C0000h to 0CFFFFh 060000h to 067FFFh SA13 0 0 1 1 0 1 X X X X 0D0000h to 0DFFFFh 068000h to 06FFFFh SA14 0 0 1 1 1 0 X X X X 0E0000h to 0EFFFFh 070000h to 077FFFh SA15 0 0 1 1 1 1 X X X X 0F0000h to 0FFFFFh 078000h to 07FFFFh SA16 0 1 0 0 0 0 X X X X 100000h to 10FFFFh 080000h to 087FFFh SA17 0 1 0 0 0 1 X X X X 110000h to 11FFFFh 088000h to 08FFFFh SA18 0 1 0 0 1 0 X X X X 120000h to 12FFFFh 090000h to 097FFFh SA19 0 1 0 0 1 1 X X X X 130000h to 13FFFFh 098000h to 09FFFFh SA20 0 1 0 1 0 0 X X X X 140000h to 14FFFFh 0A0000h to 0A7FFFh SA21 0 1 0 1 0 1 X X X X 150000h to 15FFFFh 0A8000h to 0AFFFFh SA22 0 1 0 1 1 0 X X X X 160000h to 16FFFFh 0B0000h to 0B7FFFh SA23 0 1 0 1 1 1 X X X X 170000h to 17FFFFh 0B8000h to 0BFFFFh SA24 0 1 1 0 0 0 X X X X 180000h to 18FFFFh 0C0000h to 0C7FFFh SA25 0 1 1 0 0 1 X X X X 190000h to 19FFFFh 0C8000h to 0CFFFFh SA26 0 1 1 0 1 0 X X X X 1A0000h to 1AFFFFh 0D0000h to 0D7FFFh SA27 0 1 1 0 1 1 X X X X 1B0000h to 1BFFFFh 0D8000h to 0DFFFFh SA28 0 1 1 1 0 0 X X X X 1C0000h to 1CFFFFh 0E0000h to 0E7FFFh SA29 0 1 1 1 0 1 X X X X 1D0000h to 1DFFFFh 0E8000h to 0EFFFFh SA30 0 1 1 1 1 0 X X X X 1E0000h to 1EFFFFh 0F0000h to 0F7FFFh SA31 0 1 1 1 1 1 X X X X 1F0000h to 1FFFFFh 0F8000h to 0FFFFFh (Continued) 17 MB84VD2228XEA/EE/2229XEA/EE-90 (Continued) Sector Address Bank Bank 2 Bank 1 18 Sector Bank Address Address Range (BYTE mode) Address Range (WORD mode) A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 SA32 1 0 0 0 0 0 X X X X 200000h to 20FFFFh 100000h to 107FFFh SA33 1 0 0 0 0 1 X X X X 210000h to 21FFFFh 108000h to 10FFFFh SA34 1 0 0 0 1 0 X X X X 220000h to 22FFFFh 110000h to 117FFFh SA35 1 0 0 0 1 1 X X X X 230000h to 23FFFFh 118000h to 11FFFFh SA36 1 0 0 1 0 0 X X X X 240000h to 24FFFFh 120000h to 127FFFh SA37 1 0 0 1 0 1 X X X X 250000h to 25FFFFh 128000h to 12FFFFh SA38 1 0 0 1 1 0 X X X X 260000h to 26FFFFh 130000h to 137FFFh SA39 1 0 0 1 1 1 X X X X 270000h to 27FFFFh 138000h to 13FFFFh SA40 1 0 1 0 0 0 X X X X 280000h to 28FFFFh 140000h to 147FFFh SA41 1 0 1 0 0 1 X X X X 290000h to 29FFFFh 148000h to 14FFFFh SA42 1 0 1 0 1 0 X X X X 2A0000h to 2AFFFFh 150000h to 157FFFh SA43 1 0 1 0 1 1 X X X X 2B0000h to 2BFFFFh 158000h to 15FFFFh SA44 1 0 1 1 0 0 X X X X 2C0000h to 2CFFFFh 160000h to 167FFFh SA45 1 0 1 1 0 1 X X X X 2D0000h to 2DFFFFh 168000h to 16FFFFh SA46 1 0 1 1 1 0 X X X X 2E0000h to 2EFFFFh 170000h to 177FFFh SA47 1 0 1 1 1 1 X X X X 2F0000h to 2FFFFFh 178000h to 17FFFFh SA48 1 1 0 0 0 0 X X X X 300000h to 30FFFFh 180000h to 187FFFh SA49 1 1 0 0 0 1 X X X X 310000h to 31FFFFh 188000h to 18FFFFh SA50 1 1 0 0 1 0 X X X X 320000h to 32FFFFh 190000h to 197FFFh SA51 1 1 0 0 1 1 X X X X 330000h to 33FFFFh 198000h to 19FFFFh SA52 1 1 0 1 0 0 X X X X 340000h to 34FFFFh 1A0000h to 1A7FFFh SA53 1 1 0 1 0 1 X X X X 350000h to 35FFFFh 1A8000h to 1AFFFFh SA54 1 1 0 1 1 0 X X X X 360000h to 36FFFFh 1B0000h to 1B7FFFh SA55 1 1 0 1 1 1 X X X X 370000h to 37FFFFh 1B8000h to 1BFFFFh SA56 1 1 1 0 0 0 X X X X 380000h to 38FFFFh 1C0000h to 1C7FFFh SA57 1 1 1 0 0 1 X X X X 390000h to 39FFFFh 1C8000h to 1CFFFFh SA58 1 1 1 0 1 0 X X X X 3A0000h to 3AFFFFh 1D0000h to 1D7FFFh SA59 1 1 1 0 1 1 X X X X 3B0000h to 3BFFFFh 1D8000h to 1DFFFFh SA60 1 1 1 1 0 0 X X X X 3C0000h to 3CFFFFh 1E0000h to 1E7FFFh SA61 1 1 1 1 0 1 X X X X 3D0000h to 3DFFFFh 1E8000h to 1EFFFFh SA62 1 1 1 1 1 0 X X X X 3E0000h to 3EFFFFh 1F0000h to 1F7FFFh SA63 1 1 1 1 1 1 0 0 0 X 3F0000h to 3F1FFFh 1F8000h to 1F8FFFh SA64 1 1 1 1 1 1 0 0 1 X 3F2000h to 3F3FFFh 1F9000h to 1F9FFFh SA65 1 1 1 1 1 1 0 1 0 X 3F4000h to 3F5FFFh 1FA000h to 1FAFFFh SA66 1 1 1 1 1 1 0 1 1 X 3F6000h to 3F7FFFh 1FB000h to 1FBFFFh SA67 1 1 1 1 1 1 1 0 0 X 3F8000h to 3F9FFFh 1FC000h to 1FCFFFh SA68 1 1 1 1 1 1 1 0 1 X 3FA000h to 3FAFFFh 1FD000h to 1FDFFFh SA69 1 1 1 1 1 1 1 1 0 X 3FC000h to 3FCFFFh 1FE000h to 1FEFFFh SA70 1 1 1 1 1 1 1 1 1 X 3FE000h to 3FFFFFh 1FF000h to 1FFFFFh MB84VD2228XEA/EE/2229XEA/EE-90 Table 2. 4 Sector Address Tables (MB84VD22292EA/EE) Sector Address Bank Bank 1 Bank 2 Sector Bank Address Address Range (BYTE mode) Address Range (WORD mode) A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 SA0 0 0 0 0 0 0 0 0 0 X 000000h to 001FFFh 000000h to 000FFFh SA1 0 0 0 0 0 0 0 0 1 X 002000h to 003FFFh 001000h to 001FFFh SA2 0 0 0 0 0 0 0 1 0 X 004000h to 005FFFh 002000h to 002FFFh SA3 0 0 0 0 0 0 0 1 1 X 006000h to 007FFFh 003000h to 003FFFh SA4 0 0 0 0 0 0 1 0 0 X 008000h to 009FFFh 004000h to 004FFFh SA5 0 0 0 0 0 0 1 0 1 X 00A000h to 00BFFFh 005000h to 005FFFh SA6 0 0 0 0 0 0 1 1 0 X 00C000h to 00DFFFh 006000h to 006FFFh SA7 0 0 0 0 0 0 1 1 1 X 00E000h to 00FFFFh 007000h to 007FFFh SA8 0 0 0 0 0 1 X X X X 010000h to 01FFFFh 008000h to 00FFFFh SA9 0 0 0 0 1 0 X X X X 020000h to 02FFFFh 010000h to 017FFFh SA10 0 0 0 0 1 1 X X X X 030000h to 03FFFFh 018000h to 01FFFFh SA11 0 0 0 1 0 0 X X X X 040000h to 04FFFFh 020000h to 027FFFh SA12 0 0 0 1 0 1 X X X X 050000h to 05FFFFh 028000h to 02FFFFh SA13 0 0 0 1 1 0 X X X X 060000h to 06FFFFh 030000h to 037FFFh SA14 0 0 0 1 1 1 X X X X 070000h to 07FFFFh 038000h to 03FFFFh SA15 0 0 1 0 0 0 X X X X 080000h to 08FFFFh 040000h to 047FFFh SA16 0 0 1 0 0 1 X X X X 090000h to 09FFFFh 048000h to 04FFFFh SA17 0 0 1 0 1 0 X X X X 0A0000h to 0AFFFFh 050000h to 057FFFh SA18 0 0 1 0 1 1 X X X X 0B0000h to 0BFFFFh 058000h to 05FFFFh SA19 0 0 1 1 0 0 X X X X 0C0000h to 0CFFFFh 060000h to 067FFFh SA20 0 0 1 1 0 1 X X X X 0D0000h to 0DFFFFh 068000h to 06FFFFh SA21 0 0 1 1 1 0 X X X X 0E0000h to 0EFFFFh 070000h to 077FFFh SA22 0 0 1 1 1 1 X X X X 0F0000h to 0FFFFFh 078000h to 07FFFFh SA23 0 1 0 0 0 0 X X X X 100000h to 10FFFFh 080000h to 087FFFh SA24 0 1 0 0 0 1 X X X X 110000h to 11FFFFh 088000h to 08FFFFh SA25 0 1 0 0 1 0 X X X X 120000h to 12FFFFh 090000h to 097FFFh SA26 0 1 0 0 1 1 X X X X 130000h to 13FFFFh 098000h to 09FFFFh SA27 0 1 0 1 0 0 X X X X 140000h to 14FFFFh 0A0000h to 0A7FFFh SA28 0 1 0 1 0 1 X X X X 150000h to 15FFFFh 0A8000h to 0AFFFFh SA29 0 1 0 1 1 0 X X X X 160000h to 16FFFFh 0B0000h to 0B7FFFh SA30 0 1 0 1 1 1 X X X X 170000h to 17FFFFh 0B8000h to 0BFFFFh SA31 0 1 1 0 0 0 X X X X 180000h to 18FFFFh 0C0000h to 0C7FFFh SA32 0 1 1 0 0 1 X X X X 190000h to 19FFFFh 0C8000h to 0CFFFFh SA33 0 1 1 0 1 0 X X X X 1A0000h to 1AFFFFh 0D0000h to 0D7FFFh SA34 0 1 1 0 1 1 X X X X 1B0000h to 1BFFFFh 0D8000h to 0DFFFFh SA35 0 1 1 1 0 0 X X X X 1C0000h to 1CFFFFh 0E0000h to 0E7FFFh (Continued) 19 MB84VD2228XEA/EE/2229XEA/EE-90 (Continued) Sector Address Bank Bank 2 20 Sector Bank Address Address Range (BYTE mode) Address Range (WORD mode) A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 SA36 0 1 1 1 0 1 X X X X 1D0000h to 1DFFFFh 0E8000h to 0EFFFFh SA37 0 1 1 1 1 0 X X X X 1E0000h to 1EFFFFh 0F0000h to 0F7FFFh SA38 0 1 1 1 1 1 X X X X 1F0000h to 1FFFFFh 0F8000h to 0FFFFFh SA39 1 0 0 0 0 0 X X X X 200000h to 20FFFFh 100000h to 107FFFh SA40 1 0 0 0 0 1 X X X X 210000h to 21FFFFh 108000h to 10FFFFh SA41 1 0 0 0 1 0 X X X X 220000h to 22FFFFh 110000h to 117FFFh SA42 1 0 0 0 1 1 X X X X 230000h to 23FFFFh 118000h to 11FFFFh SA43 1 0 0 1 0 0 X X X X 240000h to 24FFFFh 120000h to 127FFFh SA44 1 0 0 1 0 1 X X X X 250000h to 25FFFFh 128000h to 12FFFFh SA45 1 0 0 1 1 0 X X X X 260000h to 26FFFFh 130000h to 137FFFh SA46 1 0 0 1 1 1 X X X X 270000h to 27FFFFh 138000h to 13FFFFh SA47 1 0 1 0 0 0 X X X X 280000h to 28FFFFh 140000h to 147FFFh SA48 1 0 1 0 0 1 X X X X 290000h to 29FFFFh 148000h to 14FFFFh SA49 1 0 1 0 1 0 X X X X 2A0000h to 2AFFFFh 150000h to 157FFFh SA50 1 0 1 0 1 1 X X X X 2B0000h to 2BFFFFh 158000h to 15FFFFh SA51 1 0 1 1 0 0 X X X X 2C0000h to 2CFFFFh 160000h to 167FFFh SA52 1 0 1 1 0 1 X X X X 2D0000h to 2DFFFFh 168000h to 16FFFFh SA53 1 0 1 1 1 0 X X X X 2E0000h to 2EFFFFh 170000h to 177FFFh SA54 1 0 1 1 1 1 X X X X 2F0000h to 2FFFFFh 178000h to 17FFFFh SA55 1 1 0 0 0 0 X X X X 300000h to 30FFFFh 180000h to 187FFFh SA56 1 1 0 0 0 1 X X X X 310000h to 31FFFFh 188000h to 18FFFFh SA57 1 1 0 0 1 0 X X X X 320000h to 32FFFFh 190000h to 197FFFh SA58 1 1 0 0 1 1 X X X X 330000h to 33FFFFh 198000h to 19FFFFh SA59 1 1 0 1 0 0 X X X X 340000h to 34FFFFh 1A0000h to 1A7FFFh SA60 1 1 0 1 0 1 X X X X 350000h to 35FFFFh 1A8000h to 1AFFFFh SA61 1 1 0 1 1 0 X X X X 360000h to 36FFFFh 1B0000h to 1B7FFFh SA62 1 1 0 1 1 1 X X X X 370000h to 37FFFFh 1B8000h to 1BFFFFh SA63 1 1 1 0 0 0 X X X X 380000h to 38FFFFh 1C0000h to 1C7FFFh SA64 1 1 1 0 0 1 X X X X 390000h to 39FFFFh 1C8000h to 1CFFFFh SA65 1 1 1 0 1 0 X X X X 3A0000h to 3AFFFFh 1D0000h to 1D7FFFh SA66 1 1 1 0 1 1 X X X X 3B0000h to 3BFFFFh 1D8000h to 1DFFFFh SA67 1 1 1 1 0 0 X X X X 3C0000h to 3CFFFFh 1E0000h to 1E7FFFh SA68 1 1 1 1 0 1 X X X X 3D0000h to 3DFFFFh 1E8000h to 1EFFFFh SA69 1 1 1 1 1 0 X X X X 3E0000h to 3EFFFFh 1F0000h to 1F7FFFh SA70 1 1 1 1 1 1 X X X X 3F0000h to 3FFFFFh 1F8000h to 1FFFFFh MB84VD2228XEA/EE/2229XEA/EE-90 Table 2. 5 Sector Address Tables (MB84VD22283EA/EE) Sector Address Bank Bank 2 Sector Bank Address Address Range (BYTE mode) Address Range (WORD mode) A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 SA0 0 0 0 0 0 0 X X X X 000000h to 00FFFFh 000000h to 007FFFh SA1 0 0 0 0 0 1 X X X X 010000h to 01FFFFh 008000h to 00FFFFh SA2 0 0 0 0 1 0 X X X X 020000h to 02FFFFh 010000h to 017FFFh SA3 0 0 0 0 1 1 X X X X 030000h to 03FFFFh 018000h to 01FFFFh SA4 0 0 0 1 0 0 X X X X 040000h to 04FFFFh 020000h to 027FFFh SA5 0 0 0 1 0 1 X X X X 050000h to 05FFFFh 028000h to 02FFFFh SA6 0 0 0 1 1 0 X X X X 060000h to 06FFFFh 030000h to 037FFFh SA7 0 0 0 1 1 1 X X X X 070000h to 07FFFFh 038000h to 03FFFFh SA8 0 0 1 0 0 0 X X X X 080000h to 08FFFFh 040000h to 047FFFh SA9 0 0 1 0 0 1 X X X X 090000h to 09FFFFh 048000h to 04FFFFh SA10 0 0 1 0 1 0 X X X X 0A0000h to 0AFFFFh 050000h to 057FFFh SA11 0 0 1 0 1 1 X X X X 0B0000h to 0BFFFFh 058000h to 05FFFFh SA12 0 0 1 1 0 0 X X X X 0C0000h to 0CFFFFh 060000h to 067FFFh SA13 0 0 1 1 0 1 X X X X 0D0000h to 0DFFFFh 068000h to 06FFFFh SA14 0 0 1 1 1 0 X X X X 0E0000h to 0EFFFFh 070000h to 077FFFh SA15 0 0 1 1 1 1 X X X X 0F0000h to 0FFFFFh 078000h to 07FFFFh SA16 0 1 0 0 0 0 X X X X 100000h to 10FFFFh 080000h to 087FFFh SA17 0 1 0 0 0 1 X X X X 110000h to 11FFFFh 088000h to 08FFFFh SA18 0 1 0 0 1 0 X X X X 120000h to 12FFFFh 090000h to 097FFFh SA19 0 1 0 0 1 1 X X X X 130000h to 13FFFFh 098000h to 09FFFFh SA20 0 1 0 1 0 0 X X X X 140000h to 14FFFFh 0A0000h to 0A7FFFh SA21 0 1 0 1 0 1 X X X X 150000h to 15FFFFh 0A8000h to 0AFFFFh SA22 0 1 0 1 1 0 X X X X 160000h to 16FFFFh 0B0000h to 0B7FFFh SA23 0 1 0 1 1 1 X X X X 170000h to 17FFFFh 0B8000h to 0BFFFFh SA24 0 1 1 0 0 0 X X X X 180000h to 18FFFFh 0C0000h to 0C7FFFh SA25 0 1 1 0 0 1 X X X X 190000h to 19FFFFh 0C8000h to 0CFFFFh SA26 0 1 1 0 1 0 X X X X 1A0000h to 1AFFFFh 0D0000h to 0D7FFFh SA27 0 1 1 0 1 1 X X X X 1B0000h to 1BFFFFh 0D8000h to 0DFFFFh SA28 0 1 1 1 0 0 X X X X 1C0000h to 1CFFFFh 0E0000h to 0E7FFFh SA29 0 1 1 1 0 1 X X X X 1D0000h to 1DFFFFh 0E8000h to 0EFFFFh SA30 0 1 1 1 1 0 X X X X 1E0000h to 1EFFFFh 0F0000h to 0F7FFFh SA31 0 1 1 1 1 1 X X X X 1F0000h to 1FFFFFh 0F8000h to 0FFFFFh (Continued) 21 MB84VD2228XEA/EE/2229XEA/EE-90 (Continued) Sector Address Bank Bank 2 Bank 1 22 Sector Bank Address Address Range (BYTE mode) Address Range (WORD mode) A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 SA32 1 0 0 0 0 0 X X X X 200000h to 20FFFFh 100000h to 107FFFh SA33 1 0 0 0 0 1 X X X X 210000h to 21FFFFh 108000h to 10FFFFh SA34 1 0 0 0 1 0 X X X X 220000h to 22FFFFh 110000h to 117FFFh SA35 1 0 0 0 1 1 X X X X 230000h to 23FFFFh 118000h to 11FFFFh SA36 1 0 0 1 0 0 X X X X 240000h to 24FFFFh 120000h to 127FFFh SA37 1 0 0 1 0 1 X X X X 250000h to 25FFFFh 128000h to 12FFFFh SA38 1 0 0 1 1 0 X X X X 260000h to 26FFFFh 130000h to 137FFFh SA39 1 0 0 1 1 1 X X X X 270000h to 27FFFFh 138000h to 13FFFFh SA40 1 0 1 0 0 0 X X X X 280000h to 28FFFFh 140000h to 147FFFh SA41 1 0 1 0 0 1 X X X X 290000h to 29FFFFh 148000h to 14FFFFh SA42 1 0 1 0 1 0 X X X X 2A0000h to 2AFFFFh 150000h to 157FFFh SA43 1 0 1 0 1 1 X X X X 2B0000h to 2BFFFFh 158000h to 15FFFFh SA44 1 0 1 1 0 0 X X X X 2C0000h to 2CFFFFh 160000h to 167FFFh SA45 1 0 1 1 0 1 X X X X 2D0000h to 2DFFFFh 168000h to 16FFFFh SA46 1 0 1 1 1 0 X X X X 2E0000h to 2EFFFFh 170000h to 177FFFh SA47 1 0 1 1 1 1 X X X X 2F0000h to 2FFFFFh 178000h to 17FFFFh SA48 1 1 0 0 0 0 X X X X 300000h to 30FFFFh 180000h to 187FFFh SA49 1 1 0 0 0 1 X X X X 310000h to 31FFFFh 188000h to 18FFFFh SA50 1 1 0 0 1 0 X X X X 320000h to 32FFFFh 190000h to 197FFFh SA51 1 1 0 0 1 1 X X X X 330000h to 33FFFFh 198000h to 19FFFFh SA52 1 1 0 1 0 0 X X X X 340000h to 34FFFFh 1A0000h to 1A7FFFh SA53 1 1 0 1 0 1 X X X X 350000h to 35FFFFh 1A8000h to 1AFFFFh SA54 1 1 0 1 1 0 X X X X 360000h to 36FFFFh 1B0000h to 1B7FFFh SA55 1 1 0 1 1 1 X X X X 370000h to 37FFFFh 1B8000h to 1BFFFFh SA56 1 1 1 0 0 0 X X X X 380000h to 38FFFFh 1C0000h to 1C7FFFh SA57 1 1 1 0 0 1 X X X X 390000h to 39FFFFh 1C8000h to 1CFFFFh SA58 1 1 1 0 1 0 X X X X 3A0000h to 3AFFFFh 1D0000h to 1D7FFFh SA59 1 1 1 0 1 1 X X X X 3B0000h to 3BFFFFh 1D8000h to 1DFFFFh SA60 1 1 1 1 0 0 X X X X 3C0000h to 3CFFFFh 1E0000h to 1E7FFFh SA61 1 1 1 1 0 1 X X X X 3D0000h to 3DFFFFh 1E8000h to 1EFFFFh SA62 1 1 1 1 1 0 X X X X 3E0000h to 3EFFFFh 1F0000h to 1F7FFFh SA63 1 1 1 1 1 1 0 0 0 X 3F0000h to 3F1FFFh 1F8000h to 1F8FFFh SA64 1 1 1 1 1 1 0 0 1 X 3F2000h to 3F3FFFh 1F9000h to 1F9FFFh SA65 1 1 1 1 1 1 0 1 0 X 3F4000h to 3F5FFFh 1FA000h to 1FAFFFh SA66 1 1 1 1 1 1 0 1 1 X 3F6000h to 3F7FFFh 1FB000h to 1FBFFFh SA67 1 1 1 1 1 1 1 0 0 X 3F8000h to 3F9FFFh 1FC000h to 1FCFFFh SA68 1 1 1 1 1 1 1 0 1 X 3FA000h to 3FAFFFh 1FD000h to 1FDFFFh SA69 1 1 1 1 1 1 1 1 0 X 3FC000h to 3FCFFFh 1FE000h to 1FEFFFh SA70 1 1 1 1 1 1 1 1 1 X 3FE000h to 3FFFFFh 1FF000h to 1FFFFFh MB84VD2228XEA/EE/2229XEA/EE-90 Table 2. 6 Sector Address Tables (MB84VD22293EA/EE) Sector Address Bank Bank 1 Bank 2 Sector Bank Address Address Range (BYTE mode) Address Range (WORD mode) A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 SA0 0 0 0 0 0 0 0 0 0 X 000000h to 001FFFh 000000h to 000FFFh SA1 0 0 0 0 0 0 0 0 1 X 002000h to 003FFFh 001000h to 001FFFh SA2 0 0 0 0 0 0 0 1 0 X 004000h to 005FFFh 002000h to 002FFFh SA3 0 0 0 0 0 0 0 1 1 X 006000h to 007FFFh 003000h to 003FFFh SA4 0 0 0 0 0 0 1 0 0 X 008000h to 009FFFh 004000h to 004FFFh SA5 0 0 0 0 0 0 1 0 1 X 00A000h to 00BFFFh 005000h to 005FFFh SA6 0 0 0 0 0 0 1 1 0 X 00C000h to 00DFFFh 006000h to 006FFFh SA7 0 0 0 0 0 0 1 1 1 X 00E000h to 00FFFFh 007000h to 007FFFh SA8 0 0 0 0 0 1 X X X X 010000h to 01FFFFh 008000h to 00FFFFh SA9 0 0 0 0 1 0 X X X X 020000h to 02FFFFh 010000h to 017FFFh SA10 0 0 0 0 1 1 X X X X 030000h to 03FFFFh 018000h to 01FFFFh SA11 0 0 0 1 0 0 X X X X 040000h to 04FFFFh 020000h to 027FFFh SA12 0 0 0 1 0 1 X X X X 050000h to 05FFFFh 028000h to 02FFFFh SA13 0 0 0 1 1 0 X X X X 060000h to 06FFFFh 030000h to 037FFFh SA14 0 0 0 1 1 1 X X X X 070000h to 07FFFFh 038000h to 03FFFFh SA15 0 0 1 0 0 0 X X X X 080000h to 08FFFFh 040000h to 047FFFh SA16 0 0 1 0 0 1 X X X X 090000h to 09FFFFh 048000h to 04FFFFh SA17 0 0 1 0 1 0 X X X X 0A0000h to 0AFFFFh 050000h to 057FFFh SA18 0 0 1 0 1 1 X X X X 0B0000h to 0BFFFFh 058000h to 05FFFFh SA19 0 0 1 1 0 0 X X X X 0C0000h to 0CFFFFh 060000h to 067FFFh SA20 0 0 1 1 0 1 X X X X 0D0000h to 0DFFFFh 068000h to 06FFFFh SA21 0 0 1 1 1 0 X X X X 0E0000h to 0EFFFFh 070000h to 077FFFh SA22 0 0 1 1 1 1 X X X X 0F0000h to 0FFFFFh 078000h to 07FFFFh SA23 0 1 0 0 0 0 X X X X 100000h to 10FFFFh 080000h to 087FFFh SA24 0 1 0 0 0 1 X X X X 110000h to 11FFFFh 088000h to 08FFFFh SA25 0 1 0 0 1 0 X X X X 120000h to 12FFFFh 090000h to 097FFFh SA26 0 1 0 0 1 1 X X X X 130000h to 13FFFFh 098000h to 09FFFFh SA27 0 1 0 1 0 0 X X X X 140000h to 14FFFFh 0A0000h to 0A7FFFh SA28 0 1 0 1 0 1 X X X X 150000h to 15FFFFh 0A8000h to 0AFFFFh SA29 0 1 0 1 1 0 X X X X 160000h to 16FFFFh 0B0000h to 0B7FFFh SA30 0 1 0 1 1 1 X X X X 170000h to 17FFFFh 0B8000h to 0BFFFFh SA31 0 1 1 0 0 0 X X X X 180000h to 18FFFFh 0C0000h to 0C7FFFh SA32 0 1 1 0 0 1 X X X X 190000h to 19FFFFh 0C8000h to 0CFFFFh SA33 0 1 1 0 1 0 X X X X 1A0000h to 1AFFFFh 0D0000h to 0D7FFFh SA34 0 1 1 0 1 1 X X X X 1B0000h to 1BFFFFh 0D8000h to 0DFFFFh SA35 0 1 1 1 0 0 X X X X 1C0000h to 1CFFFFh 0E0000h to 0E7FFFh (Continued) 23 MB84VD2228XEA/EE/2229XEA/EE-90 (Continued) Sector Address Bank Bank 2 24 Sector Bank Address Address Range (BYTE mode) Address Range (WORD mode) A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 SA36 0 1 1 1 0 1 X X X X 1D0000h to 1DFFFFh 0E8000h to 0EFFFFh SA37 0 1 1 1 1 0 X X X X 1E0000h to 1EFFFFh 0F0000h to 0F7FFFh SA38 0 1 1 1 1 1 X X X X 1F0000h to 1FFFFFh 0F8000h to 0FFFFFh SA39 1 0 0 0 0 0 X X X X 200000h to 20FFFFh 100000h to 107FFFh SA40 1 0 0 0 0 1 X X X X 210000h to 21FFFFh 108000h to 10FFFFh SA41 1 0 0 0 1 0 X X X X 220000h to 22FFFFh 110000h to 117FFFh SA42 1 0 0 0 1 1 X X X X 230000h to 23FFFFh 118000h to 11FFFFh SA43 1 0 0 1 0 0 X X X X 240000h to 24FFFFh 120000h to 127FFFh SA44 1 0 0 1 0 1 X X X X 250000h to 25FFFFh 128000h to 12FFFFh SA45 1 0 0 1 1 0 X X X X 260000h to 26FFFFh 130000h to 137FFFh SA46 1 0 0 1 1 1 X X X X 270000h to 27FFFFh 138000h to 13FFFFh SA47 1 0 1 0 0 0 X X X X 280000h to 28FFFFh 140000h to 147FFFh SA48 1 0 1 0 0 1 X X X X 290000h to 29FFFFh 148000h to 14FFFFh SA49 1 0 1 0 1 0 X X X X 2A0000h to 2AFFFFh 150000h to 157FFFh SA50 1 0 1 0 1 1 X X X X 2B0000h to 2BFFFFh 158000h to 15FFFFh SA51 1 0 1 1 0 0 X X X X 2C0000h to 2CFFFFh 160000h to 167FFFh SA52 1 0 1 1 0 1 X X X X 2D0000h to 2DFFFFh 168000h to 16FFFFh SA53 1 0 1 1 1 0 X X X X 2E0000h to 2EFFFFh 170000h to 177FFFh SA54 1 0 1 1 1 1 X X X X 2F0000h to 2FFFFFh 178000h to 17FFFFh SA55 1 1 0 0 0 0 X X X X 300000h to 30FFFFh 180000h to 187FFFh SA56 1 1 0 0 0 1 X X X X 310000h to 31FFFFh 188000h to 18FFFFh SA57 1 1 0 0 1 0 X X X X 320000h to 32FFFFh 190000h to 197FFFh SA58 1 1 0 0 1 1 X X X X 330000h to 33FFFFh 198000h to 19FFFFh SA59 1 1 0 1 0 0 X X X X 340000h to 34FFFFh 1A0000h to 1A7FFFh SA60 1 1 0 1 0 1 X X X X 350000h to 35FFFFh 1A8000h to 1AFFFFh SA61 1 1 0 1 1 0 X X X X 360000h to 36FFFFh 1B0000h to 1B7FFFh SA62 1 1 0 1 1 1 X X X X 370000h to 37FFFFh 1B8000h to 1BFFFFh SA63 1 1 1 0 0 0 X X X X 380000h to 38FFFFh 1C0000h to 1C7FFFh SA64 1 1 1 0 0 1 X X X X 390000h to 39FFFFh 1C8000h to 1CFFFFh SA65 1 1 1 0 1 0 X X X X 3A0000h to 3AFFFFh 1D0000h to 1D7FFFh SA66 1 1 1 0 1 1 X X X X 3B0000h to 3BFFFFh 1D8000h to 1DFFFFh SA67 1 1 1 1 0 0 X X X X 3C0000h to 3CFFFFh 1E0000h to 1E7FFFh SA68 1 1 1 1 0 1 X X X X 3D0000h to 3DFFFFh 1E8000h to 1EFFFFh SA69 1 1 1 1 1 0 X X X X 3E0000h to 3EFFFFh 1F0000h to 1F7FFFh SA70 1 1 1 1 1 1 X X X X 3F0000h to 3FFFFFh 1F8000h to 1FFFFFh MB84VD2228XEA/EE/2229XEA/EE-90 Table 2. 7 Sector Address Tables (MB84VD22284EA/EE) Sector Address Bank Bank 2 Sector Bank Address Address Range (BYTE mode) Address Range (WORD mode) A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 SA0 0 0 0 0 0 0 X X X X 000000h to 00FFFFh 000000h to 007FFFh SA1 0 0 0 0 0 1 X X X X 010000h to 01FFFFh 008000h to 00FFFFh SA2 0 0 0 0 1 0 X X X X 020000h to 02FFFFh 010000h to 017FFFh SA3 0 0 0 0 1 1 X X X X 030000h to 03FFFFh 018000h to 01FFFFh SA4 0 0 0 1 0 0 X X X X 040000h to 04FFFFh 020000h to 027FFFh SA5 0 0 0 1 0 1 X X X X 050000h to 05FFFFh 028000h to 02FFFFh SA6 0 0 0 1 1 0 X X X X 060000h to 06FFFFh 030000h to 037FFFh SA7 0 0 0 1 1 1 X X X X 070000h to 07FFFFh 038000h to 03FFFFh SA8 0 0 1 0 0 0 X X X X 080000h to 08FFFFh 040000h to 047FFFh SA9 0 0 1 0 0 1 X X X X 090000h to 09FFFFh 048000h to 04FFFFh SA10 0 0 1 0 1 0 X X X X 0A0000h to 0AFFFFh 050000h to 057FFFh SA11 0 0 1 0 1 1 X X X X 0B0000h to 0BFFFFh 058000h to 05FFFFh SA12 0 0 1 1 0 0 X X X X 0C0000h to 0CFFFFh 060000h to 067FFFh SA13 0 0 1 1 0 1 X X X X 0D0000h to 0DFFFFh 068000h to 06FFFFh SA14 0 0 1 1 1 0 X X X X 0E0000h to 0EFFFFh 070000h to 077FFFh SA15 0 0 1 1 1 1 X X X X 0F0000h to 0FFFFFh 078000h to 07FFFFh SA16 0 1 0 0 0 0 X X X X 100000h to 10FFFFh 080000h to 087FFFh SA17 0 1 0 0 0 1 X X X X 110000h to 11FFFFh 088000h to 08FFFFh SA18 0 1 0 0 1 0 X X X X 120000h to 12FFFFh 090000h to 097FFFh SA19 0 1 0 0 1 1 X X X X 130000h to 13FFFFh 098000h to 09FFFFh SA20 0 1 0 1 0 0 X X X X 140000h to 14FFFFh 0A0000h to 0A7FFFh SA21 0 1 0 1 0 1 X X X X 150000h to 15FFFFh 0A8000h to 0AFFFFh SA22 0 1 0 1 1 0 X X X X 160000h to 16FFFFh 0B0000h to 0B7FFFh SA23 0 1 0 1 1 1 X X X X 170000h to 17FFFFh 0B8000h to 0BFFFFh SA24 0 1 1 0 0 0 X X X X 180000h to 18FFFFh 0C0000h to 0C7FFFh SA25 0 1 1 0 0 1 X X X X 190000h to 19FFFFh 0C8000h to 0CFFFFh SA26 0 1 1 0 1 0 X X X X 1A0000h to 1AFFFFh 0D0000h to 0D7FFFh SA27 0 1 1 0 1 1 X X X X 1B0000h to 1BFFFFh 0D8000h to 0DFFFFh SA28 0 1 1 1 0 0 X X X X 1C0000h to 1CFFFFh 0E0000h to 0E7FFFh SA29 0 1 1 1 0 1 X X X X 1D0000h to 1DFFFFh 0E8000h to 0EFFFFh SA30 0 1 1 1 1 0 X X X X 1E0000h to 1EFFFFh 0F0000h to 0F7FFFh SA31 0 1 1 1 1 1 X X X X 1F0000h to 1FFFFFh 0F8000h to 0FFFFFh (Continued) 25 MB84VD2228XEA/EE/2229XEA/EE-90 (Continued) Sector Address Bank Bank 1 26 Sector Bank Address Address Range (BYTE mode) Address Range (WORD mode) A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 SA32 1 0 0 0 0 0 X X X X 200000h to 20FFFFh 100000h to 107FFFh SA33 1 0 0 0 0 1 X X X X 210000h to 21FFFFh 108000h to 10FFFFh SA34 1 0 0 0 1 0 X X X X 220000h to 22FFFFh 110000h to 117FFFh SA35 1 0 0 0 1 1 X X X X 230000h to 23FFFFh 118000h to 11FFFFh SA36 1 0 0 1 0 0 X X X X 240000h to 24FFFFh 120000h to 127FFFh SA37 1 0 0 1 0 1 X X X X 250000h to 25FFFFh 128000h to 12FFFFh SA38 1 0 0 1 1 0 X X X X 260000h to 26FFFFh 130000h to 137FFFh SA39 1 0 0 1 1 1 X X X X 270000h to 27FFFFh 138000h to 13FFFFh SA40 1 0 1 0 0 0 X X X X 280000h to 28FFFFh 140000h to 147FFFh SA41 1 0 1 0 0 1 X X X X 290000h to 29FFFFh 148000h to 14FFFFh SA42 1 0 1 0 1 0 X X X X 2A0000h to 2AFFFFh 150000h to 157FFFh SA43 1 0 1 0 1 1 X X X X 2B0000h to 2BFFFFh 158000h to 15FFFFh SA44 1 0 1 1 0 0 X X X X 2C0000h to 2CFFFFh 160000h to 167FFFh SA45 1 0 1 1 0 1 X X X X 2D0000h to 2DFFFFh 168000h to 16FFFFh SA46 1 0 1 1 1 0 X X X X 2E0000h to 2EFFFFh 170000h to 177FFFh SA47 1 0 1 1 1 1 X X X X 2F0000h to 2FFFFFh 178000h to 17FFFFh SA48 1 1 0 0 0 0 X X X X 300000h to 30FFFFh 180000h to 187FFFh SA49 1 1 0 0 0 1 X X X X 310000h to 31FFFFh 188000h to 18FFFFh SA50 1 1 0 0 1 0 X X X X 320000h to 32FFFFh 190000h to 197FFFh SA51 1 1 0 0 1 1 X X X X 330000h to 33FFFFh 198000h to 19FFFFh SA52 1 1 0 1 0 0 X X X X 340000h to 34FFFFh 1A0000h to 1A7FFFh SA53 1 1 0 1 0 1 X X X X 350000h to 35FFFFh 1A8000h to 1AFFFFh SA54 1 1 0 1 1 0 X X X X 360000h to 36FFFFh 1B0000h to 1B7FFFh SA55 1 1 0 1 1 1 X X X X 370000h to 37FFFFh 1B8000h to 1BFFFFh SA56 1 1 1 0 0 0 X X X X 380000h to 38FFFFh 1C0000h to 1C7FFFh SA57 1 1 1 0 0 1 X X X X 390000h to 39FFFFh 1C8000h to 1CFFFFh SA58 1 1 1 0 1 0 X X X X 3A0000h to 3AFFFFh 1D0000h to 1D7FFFh SA59 1 1 1 0 1 1 X X X X 3B0000h to 3BFFFFh 1D8000h to 1DFFFFh SA60 1 1 1 1 0 0 X X X X 3C0000h to 3CFFFFh 1E0000h to 1E7FFFh SA61 1 1 1 1 0 1 X X X X 3D0000h to 3DFFFFh 1E8000h to 1EFFFFh SA62 1 1 1 1 1 0 X X X X 3E0000h to 3EFFFFh 1F0000h to 1F7FFFh SA63 1 1 1 1 1 1 0 0 0 X 3F0000h to 3F1FFFh 1F8000h to 1F8FFFh SA64 1 1 1 1 1 1 0 0 1 X 3F2000h to 3F3FFFh 1F9000h to 1F9FFFh SA65 1 1 1 1 1 1 0 1 0 X 3F4000h to 3F5FFFh 1FA000h to 1FAFFFh SA66 1 1 1 1 1 1 0 1 1 X 3F6000h to 3F7FFFh 1FB000h to 1FBFFFh SA67 1 1 1 1 1 1 1 0 0 X 3F8000h to 3F9FFFh 1FC000h to 1FCFFFh SA68 1 1 1 1 1 1 1 0 1 X 3FA000h to 3FAFFFh 1FD000h to 1FDFFFh SA69 1 1 1 1 1 1 1 1 0 X 3FC000h to 3FCFFFh 1FE000h to 1FEFFFh SA70 1 1 1 1 1 1 1 1 1 X 3FE000h to 3FFFFFh 1FF000h to 1FFFFFh MB84VD2228XEA/EE/2229XEA/EE-90 Table 2. 8 Sector Address Tables (MB84VD22294EA/EE) Sector Address Bank Bank 1 Sector Bank Address Address Range (BYTE mode) Address Range (WORD mode) A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 SA0 0 0 0 0 0 0 0 0 0 X 000000h to 001FFFh 000000h to 000FFFh SA1 0 0 0 0 0 0 0 0 1 X 002000h to 003FFFh 001000h to 001FFFh SA2 0 0 0 0 0 0 0 1 0 X 004000h to 005FFFh 002000h to 002FFFh SA3 0 0 0 0 0 0 0 1 1 X 006000h to 007FFFh 003000h to 003FFFh SA4 0 0 0 0 0 0 1 0 0 X 008000h to 009FFFh 004000h to 004FFFh SA5 0 0 0 0 0 0 1 0 1 X 00A000h to 00BFFFh 005000h to 005FFFh SA6 0 0 0 0 0 0 1 1 0 X 00C000h to 00DFFFh 006000h to 006FFFh SA7 0 0 0 0 0 0 1 1 1 X 00E000h to 00FFFFh 007000h to 007FFFh SA8 0 0 0 0 0 1 X X X X 010000h to 01FFFFh 008000h to 00FFFFh SA9 0 0 0 0 1 0 X X X X 020000h to 02FFFFh 010000h to 017FFFh SA10 0 0 0 0 1 1 X X X X 030000h to 03FFFFh 018000h to 01FFFFh SA11 0 0 0 1 0 0 X X X X 040000h to 04FFFFh 020000h to 027FFFh SA12 0 0 0 1 0 1 X X X X 050000h to 05FFFFh 028000h to 02FFFFh SA13 0 0 0 1 1 0 X X X X 060000h to 06FFFFh 030000h to 037FFFh SA14 0 0 0 1 1 1 X X X X 070000h to 07FFFFh 038000h to 03FFFFh SA15 0 0 1 0 0 0 X X X X 080000h to 08FFFFh 040000h to 047FFFh SA16 0 0 1 0 0 1 X X X X 090000h to 09FFFFh 048000h to 04FFFFh SA17 0 0 1 0 1 0 X X X X 0A0000h to 0AFFFFh 050000h to 057FFFh SA18 0 0 1 0 1 1 X X X X 0B0000h to 0BFFFFh 058000h to 05FFFFh SA19 0 0 1 1 0 0 X X X X 0C0000h to 0CFFFFh 060000h to 067FFFh SA20 0 0 1 1 0 1 X X X X 0D0000h to 0DFFFFh 068000h to 06FFFFh SA21 0 0 1 1 1 0 X X X X 0E0000h to 0EFFFFh 070000h to 077FFFh SA22 0 0 1 1 1 1 X X X X 0F0000h to 0FFFFFh 078000h to 07FFFFh SA23 0 1 0 0 0 0 X X X X 100000h to 10FFFFh 080000h to 087FFFh SA24 0 1 0 0 0 1 X X X X 110000h to 11FFFFh 088000h to 08FFFFh SA25 0 1 0 0 1 0 X X X X 120000h to 12FFFFh 090000h to 097FFFh SA26 0 1 0 0 1 1 X X X X 130000h to 13FFFFh 098000h to 09FFFFh SA27 0 1 0 1 0 0 X X X X 140000h to 14FFFFh 0A0000h to 0A7FFFh SA28 0 1 0 1 0 1 X X X X 150000h to 15FFFFh 0A8000h to 0AFFFFh SA29 0 1 0 1 1 0 X X X X 160000h to 16FFFFh 0B0000h to 0B7FFFh SA30 0 1 0 1 1 1 X X X X 170000h to 17FFFFh 0B8000h to 0BFFFFh SA31 0 1 1 0 0 0 X X X X 180000h to 18FFFFh 0C0000h to 0C7FFFh SA32 0 1 1 0 0 1 X X X X 190000h to 19FFFFh 0C8000h to 0CFFFFh SA33 0 1 1 0 1 0 X X X X 1A0000h to 1AFFFFh 0D0000h to 0D7FFFh SA34 0 1 1 0 1 1 X X X X 1B0000h to 1BFFFFh 0D8000h to 0DFFFFh (Continued) 27 MB84VD2228XEA/EE/2229XEA/EE-90 (Continued) Sector Address Bank Bank 1 Bank 2 28 Sector Address Range (BYTE mode) Bank Address Address Range (WORD mode) A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 SA35 0 1 1 1 0 0 X X X X 1C0000h to 1CFFFFh 0E0000h to 0E7FFFh SA36 0 1 1 1 0 1 X X X X 1D0000h to 1DFFFFh 0E8000h to 0EFFFFh SA37 0 1 1 1 1 0 X X X X 1E0000h to 1EFFFFh 0F0000h to 0F7FFFh SA38 0 1 1 1 1 1 X X X X 1F0000h to 1FFFFFh 0F8000h to 0FFFFFh SA39 1 0 0 0 0 0 X X X X 200000h to 20FFFFh 100000h to 107FFFh SA40 1 0 0 0 0 1 X X X X 210000h to 21FFFFh 108000h to 10FFFFh SA41 1 0 0 0 1 0 X X X X 220000h to 22FFFFh 110000h to 117FFFh SA42 1 0 0 0 1 1 X X X X 230000h to 23FFFFh 118000h to 11FFFFh SA43 1 0 0 1 0 0 X X X X 240000h to 24FFFFh 120000h to 127FFFh SA44 1 0 0 1 0 1 X X X X 250000h to 25FFFFh 128000h to 12FFFFh SA45 1 0 0 1 1 0 X X X X 260000h to 26FFFFh 130000h to 137FFFh SA46 1 0 0 1 1 1 X X X X 270000h to 27FFFFh 138000h to 13FFFFh SA47 1 0 1 0 0 0 X X X X 280000h to 28FFFFh 140000h to 147FFFh SA48 1 0 1 0 0 1 X X X X 290000h to 29FFFFh 148000h to 14FFFFh SA49 1 0 1 0 1 0 X X X X 2A0000h to 2AFFFFh 150000h to 157FFFh SA50 1 0 1 0 1 1 X X X X 2B0000h to 2BFFFFh 158000h to 15FFFFh SA51 1 0 1 1 0 0 X X X X 2C0000h to 2CFFFFh 160000h to 167FFFh SA52 1 0 1 1 0 1 X X X X 2D0000h to 2DFFFFh 168000h to 16FFFFh SA53 1 0 1 1 1 0 X X X X 2E0000h to 2EFFFFh 170000h to 177FFFh SA54 1 0 1 1 1 1 X X X X 2F0000h to 2FFFFFh 178000h to 17FFFFh SA55 1 1 0 0 0 0 X X X X 300000h to 30FFFFh 180000h to 187FFFh SA56 1 1 0 0 0 1 X X X X 310000h to 31FFFFh 188000h to 18FFFFh SA57 1 1 0 0 1 0 X X X X 320000h to 32FFFFh 190000h to 197FFFh SA58 1 1 0 0 1 1 X X X X 330000h to 33FFFFh 198000h to 19FFFFh SA59 1 1 0 1 0 0 X X X X 340000h to 34FFFFh 1A0000h to 1A7FFFh SA60 1 1 0 1 0 1 X X X X 350000h to 35FFFFh 1A8000h to 1AFFFFh SA61 1 1 0 1 1 0 X X X X 360000h to 36FFFFh 1B0000h to 1B7FFFh SA62 1 1 0 1 1 1 X X X X 370000h to 37FFFFh 1B8000h to 1BFFFFh SA63 1 1 1 0 0 0 X X X X 380000h to 38FFFFh 1C0000h to 1C7FFFh SA64 1 1 1 0 0 1 X X X X 390000h to 39FFFFh 1C8000h to 1CFFFFh SA65 1 1 1 0 1 0 X X X X 3A0000h to 3AFFFFh 1D0000h to 1D7FFFh SA66 1 1 1 0 1 1 X X X X 3B0000h to 3BFFFFh 1D8000h to 1DFFFFh SA67 1 1 1 1 0 0 X X X X 3C0000h to 3CFFFFh 1E0000h to 1E7FFFh SA68 1 1 1 1 0 1 X X X X 3D0000h to 3DFFFFh 1E8000h to 1EFFFFh SA69 1 1 1 1 1 0 X X X X 3E0000h to 3EFFFFh 1F0000h to 1F7FFFh SA70 1 1 1 1 1 1 X X X X 3F0000h to 3FFFFFh 1F8000h to 1FFFFFh MB84VD2228XEA/EE/2229XEA/EE-90 Table 3. 1 Sector Group Addresses (MB84VD2228XEA/EE) (Top Boot Block) Sector Group A20 A19 A18 A17 A16 A15 A14 A13 A12 Sectors SGA0 0 0 0 0 0 0 X X X SA0 0 1 1 0 X X X SA1 to SA3 1 1 SGA1 0 0 0 0 SGA2 0 0 0 1 X X X X X SA4 to SA7 SGA3 0 0 1 0 X X X X X SA8 to SA11 SGA4 0 0 1 1 X X X X X SA12 to SA15 SGA5 0 1 0 0 X X X X X SA16 to SA19 SGA6 0 1 0 1 X X X X X SA20 to SA23 SGA7 0 1 1 0 X X X X X SA24 to SA27 SGA8 0 1 1 1 X X X X X SA28 to SA31 SGA9 1 0 0 0 X X X X X SA32 to SA35 SGA10 1 0 0 1 X X X X X SA36 to SA39 SGA11 1 0 1 0 X X X X X SA40 to SA43 SGA12 1 0 1 1 X X X X X SA44 to SA47 SGA13 1 1 0 0 X X X X X SA48 to SA51 SGA14 1 1 0 1 X X X X X SA52 to SA55 SGA15 1 1 1 0 X X X X X SA56 to SA59 0 0 0 1 X X X SA60 to SA62 1 0 SGA16 1 1 1 1 SGA17 1 1 1 1 1 1 0 0 0 SA63 SGA18 1 1 1 1 1 1 0 0 1 SA64 SGA19 1 1 1 1 1 1 0 1 0 SA65 SGA20 1 1 1 1 1 1 0 1 1 SA66 SGA21 1 1 1 1 1 1 1 0 0 SA67 SGA22 1 1 1 1 1 1 1 0 1 SA68 SGA23 1 1 1 1 1 1 1 1 0 SA69 SGA24 1 1 1 1 1 1 1 1 1 SA70 29 MB84VD2228XEA/EE/2229XEA/EE-90 Table 3. 2 Sector Group Addresses (MB84VD2229XEA/EE) (Bottom Boot Block) Sector Group A20 A19 A18 A17 A16 A15 A14 A13 A12 Sectors SGA0 0 0 0 0 0 0 0 0 0 SA0 SGA1 0 0 0 0 0 0 0 0 1 SA1 SGA2 0 0 0 0 0 0 0 1 0 SA2 SGA3 0 0 0 0 0 0 0 1 1 SA3 SGA4 0 0 0 0 0 0 1 0 0 SA4 SGA5 0 0 0 0 0 0 1 0 1 SA5 SGA6 0 0 0 0 0 0 1 1 0 SA6 SGA7 0 0 0 0 0 0 1 1 1 SA7 0 1 1 0 X X X SA8 to SA10 1 1 SGA8 0 0 0 SGA9 0 0 0 1 X X X X X SA11 to SA14 SGA10 0 0 1 0 X X X X X SA15 to SA18 SGA11 0 0 1 1 X X X X X SA19 to SA22 SGA12 0 1 0 0 X X X X X SA23 to SA26 SGA13 0 1 0 1 X X X X X SA27 to SA30 SGA14 0 1 1 0 X X X X X SA31 to SA34 SGA15 0 1 1 1 X X X X X SA35 to SA38 SGA16 1 0 0 0 X X X X X SA39 to SA42 SGA17 1 0 0 1 X X X X X SA43 to SA46 SGA18 1 0 1 0 X X X X X SA47 to SA50 SGA19 1 0 1 1 X X X X X SA51 to SA54 SGA20 1 1 0 0 X X X X X SA55 to SA58 SGA21 1 1 0 1 X X X X X SA59 to SA62 SGA22 1 1 1 0 X X X X X SA63 to SA66 0 0 0 1 X X X SA67 to SA69 1 0 1 1 X X X SA70 SGA23 SGA24 30 0 1 1 1 1 1 1 1 1 MB84VD2228XEA/EE/2229XEA/EE-90 Table 4 Flash Memory Autoselect Codes Type Manufacturer’s Code MB84VD22281EA MB84VD22281EE MB84VD22291EA MB84VD22291EE MB84VD22282EA MB84VD22282EE Device Code MB84VD22292EA MB84VD22292EE MB84VD22283EA MB84VD22283EE MB84VD22293EA MB84VD22293EE MB84VD22284EA MB84VD22284EE MB84VD22294EA MB84VD22294EE Sector Group protect A12 to A19 A6 A1 A0 A–1*1 Code (HEX) X VIL VIL VIL VIL 04h VIL 59h X VIL VIL VIH X 2259h VIL 5Ah X 225Ah VIL 55h X 2255h VIL 56h X 2256h VIL 50h X 2250h VIL 53h X 2253h VIL 5Ch X 225Ch VIL 5Fh X 225Fh VIL 01h*2 Byte Word Byte X VIL VIL VIH Word Byte X VIL VIL VIH Word Byte X VIL VIL VIH Word Byte X VIL VIL VIH Word Byte X VIL VIL VIH Word Byte X VIL VIL VIH Word Byte X VIL VIL VIH Word Sector Group Address VIL VIH VIL *1: A–1 is for Byte mode. *2: Output 01h at protected sector address and output 00h at unprotected sector address. 31 MB84VD2228XEA/EE/2229XEA/EE-90 Table 5 Flash Memory Command Definitions Bus First Bus Second Bus Write Write Cycle Write Cycle Cycles Req’d Addr. Data Addr. Data Command Sequence Read/Reset (Note 1) Read/Reset (Note 1) Word Byte 1 3 Word Autoselect Chip Erase Sector Erase 555h AAAh 3 Word Byte Word Byte Word Byte F0h AAh 555h Byte Program XXXh 6 6 2AAh 555h AAh 555h AAAh 555h AAAh 555h AAAh — 55h 2AAh AAAh 4 — 55h 555h AAh AAh AAh 2AAh 555h 2AAh 555h 2AAh 555h 55h 55h 55h Third Bus Write Cycle Addr. — 555h AAAh (BA) 555h (BA) AAAh 555h AAAh 555h AAAh 555h AAAh Fourth Bus Read/Write Cycle Fifth Bus Sixth Bus Write Cycle Write Cycle Data Addr. Data Addr. Data Addr. Data — — — — — — — F0h RA RD — — — — 90h — — — — — — A0h PA PD — — — — 80h 80h 555h AAAh 555h AAAh AAh AAh 2AAh 555h 2AAh 555h 55h 555h AAAh 55h SA 30h Sector Erase Suspend 1 BA B0h — — — — — — — — — — Sector Erase Resume 1 BA 30h — — — — — — — — — — 20h — — — — — — Set to Fast Mode Word Fast Program (Note 2) Word Reset from Fast Mode (Note 2) Word Extended Sector Group Protection (Note 3) Word Query (Note 4) Word Hi-ROM Entry Byte Byte Byte 3 555h AAAh AAh 2AAh 555h 55h 555h AAAh 2 XXXh A0h PA PD — — — — — — — — 2 BA 90h XXXh F0h (Note6) — — — — — — — — 4 XXXh 60h SPA 60h SPA 40h SPA SD — — — — 98h — — — — — — — — — — 88h — — — — — — A0h PA PD — — — — 55h HRA 30h — — — Byte Byte Word Byte Hi-ROM Program (Note 5) Word Hi-ROM Erase (Note 5) Word Hi-ROM Exit (Note 5) Byte Byte 1 3 55h AAh 555h AAAh 555h 4 AAAh AAAh 555h 555h 555h AAAh 555h 55h 55h 555h 555h AAAh 555h 55h 2AAh AAh AAAh 55h 2AAh AAh 555h 4 2AAh 2AAh AAh 555h 6 Word Byte AAh AAAh (HRBA) 555h (HRBA) AAAh 555h 80h 90h AAAh XXXh 2AAh AAh 00h 555h — Notes: 1. Both Read/Reset commands are functionally equivalent, resetting the device to the read mode. 2. This command is valid while Fast Mode. 3. This command is valid while RESET=VID. 4. The valid Address is A0 to A6. 32 10h MB84VD2228XEA/EE/2229XEA/EE-90 5: This command is valid while Hi-ROM mode. 6: The data “00h” is also acceptable. Address bits A11 to A20 = X = “H” or “L” for all address commands except for Program Address (PA), Sector Address (SA),and Bank Address (BA). Bus operations are defined in Table 2 "User Bus Operations". RA = Address of the memory location to be read. PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of the write pulse. SA = Address of the sector to be erased. The combination of A20, A19, A18, A17, A16, A15, A14, A13, and A12 will uniquely select any sector. BA = Bank address (A15 to A20) SPA = Sector group address to be protected. Set sector group address (SGA) and (A6, A1, A0) = (0, 1, 0). HRA= Address of the Hidden-ROM area. MB84VD2228XEA/EE (Top Boot Type) Word mode: 1F8000h to 1FFFFFh Byte mode: 3F0000h to 3FFFFFh MB84VD2229XEA/EE (Bottom Boot Type) Word mode: 000000h to 007FFFh Byte mode: 000000h to 00FFFFh HRBA = Bank address of the Hidden-ROM area MB84VD2228XEA/EE (Top Boot Type) : A15 = A16 = A17 = A18 = A19 = A20 = 1 MB84VD2229XEA/EE (Bottom Boot Type) : A15 = A16 = A17 = A18 = A19 = A20 = 0 RD = Data read from location RA during read operation. PD = Data to be programmed at location PA. SD = Sector protection verify data. Output 01h at protected sector addresses and output 00h at unprotectedsector addresses. The system should generate the following address patterns; Word mode : 555h or 2AAh to addresses A0 to A10 Byte mode : AAAh or 555h to addresses A–1 and A0 to A10 33 MB84VD2228XEA/EE/2229XEA/EE-90 ■ ABSOLUTE MAXIMUM RATINGS Parameter Rating Symbol Unit Min. Max. Tstg –55 +125 °C Ambient Temperature with Power Applied TA –25 +85 °C Voltage with Respect to Ground All pins except A9, OE, RESET, WP/ACC (Note 1) VIN, VOUT –0.3 VCCf +0.3 V VCCs +0.4 V VCCf/VCCs Supply (Note 1) VCCf,VCCs –0.3 +4.0 V A9 and OE (Note2) VIN –0.3 +13.0 V RESET (Note 2) VIN –0.5 + 13.0 V WP/ACC (Note 3) VIN –0.5 +10.5 V Storage Temperature Notes: 1. Minimum DC voltage on input or I/O pins is –0.3 V. During voltage transitions, input or I/O pins may undershoot VSS to –2.0 V for periods of up to 20 ns. Maximum DC voltage on input or I/O pins is VCCf +0.3 V or VCCs+0.4 V. During voltage transitions, input or I/O pins may overshoot to VCCf+2.0 V or VCCs+2.0 V for periods of up to 20 ns. 2. Minimum DC input voltage on A9 and OE pin is –0.3 V. Minimum DC input voltage on RESET pin is –0.5 V. During voltage transitions, A9, OE, and RESET pins may undershoot VSS to –2.0 V for periods of up to 20 ns. Voltage difference between input and supply voltage (VIN-VCCf or VCCs) does not exceed 9.0 V. Maximum DC input voltage on A9, OE, and RESET pins is +13.0 V which may overshoot to +14.0 V for periods of up to 20 ns. 3. Minimum DC input voltage on WP/ACC pin is –0.5 V. During voltage transitions, WP/ACC pin may undershoot Vss to –2.0 V for periods of up to 20 ns. Maximum DC input voltage on WP/ACC pin is +10.5 V which may overshoot to +12.0 V for periods of up to 20 ns, when VCCf is applied. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. ■ RECOMMENDED OPERATING CONDITIONS Parameter Ambient Temperature VCCf/VCCs Supply Voltages Symbol Value Unit Min. Max. TA –25 +85 °C Vccf, Vccs +2.7 +3.3 V Note: Operating ranges define those limits between which the functionality of the device is guaranteed. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within the recommended operating conditions. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representative beforehand. 34 MB84VD2228XEA/EE/2229XEA/EE-90 ■ ELECTRICAL CHARACTERISTICS 1. DC Characteristics Parameter Symbol Parameter Description Test Conditions Min. Typ. Max. Unit ILI Input Leakage Current VIN = VSS to VCCf, VCCs –1.0 — +1.0 µA ILO Output Leakage Current VOUT = VSS to VCCf, VCCs –1.0 — +1.0 µA ILIT RESET Inputs Leakage Current VCCf = VCCf Max.,VCCs = VCCs Max., RESET = 12.5V — — 35 µA ILIA ACC Input Leakage Current VCCf = VCCf Max.,VCCs = VCCs Max., WP/ACC = VACC Max — — 20 mA tCYCLE = 5 MHz Byte — — 16 tCYCLE = 5 MHz Word — — 18 tCYCLE = 1 MHz Byte — — 7 tCYCLE = 1 MHz Word — — 7 — — 35 Byte — — 51 Word — — 53 Byte — — 51 Word — — 53 — — 35 mA ICC1f Flash VCC Active Current (Read) (Note 1) CEf = VIL, OE = VIH mA mA ICC2f Flash VCC Active Current (Program/Erase) (Note 2) CEf = VIL, OE = VIH ICC3f Flash VCC Active Current (Read-While-Program) (Note 5) CEf = VIL, OE = VIH ICC4f Flash VCC Active Current (Read-While-Erase) (Note 5) CEf = VIL, OE = VIH ICC5f Flash VCC Active Current CEf = VIL, OE = VIH (Erase-Suspend-Program) ICC1s SRAM VCC Active Current VCCs = VCC Max., CE1s = VIL, CE2s = VIH tCYCLE =10 MHz — — 50 mA ICC2s SRAM VCC Active Current tCYCLE = 10 MHz CE1s = 0.2 V, CE2s = VCCs – 0.2 V tCYCLE = 1 MHz — — 50 mA — — 8 mA ISB1f VCCf = VCC Max., CEf = VCCf ± 0.3 V Flash VCC Standby Current RESET = VCCf ± 0.3 V, WP/ACC = VCCf± 0.3 V — 1 5 µA ISB2f Flash VCC Standby Current VCCf = VCC Max., RESET = VSS ± 0.3 V, (RESET) WP/ACC = VCCf± 0.3 V — 1 5 µA ISB3f Flash VCC Current (Automatic Sleep Mode) (Note 3) — 1 5 µA ISB1s SRAM VCC Standby Current CE1s > VCCs – 0.2 V, CE2s > VCCs – 0.2 V — — 25 µA ISB2s SRAM VCC Standby Current CE2s < 0.2 V — — 25 µA VCCf = VCC Max., CEf = VSS ± 0.3 V RESET = VCCf ± 0.3 V, WP/ACC = VCCf± 0.3 V VIN = VCCf± 0.3 V or VSS ± 0.3 V mA mA mA (Continued) 35 MB84VD2228XEA/EE/2229XEA/EE-90 (Continued) Parameter Symbol Parameter Description Test Conditions Min. Typ. Max. Unit 0.5 V VIL Input Low Level — –0.3 — VIH Input High Level — 2.4 — VID Voltage for Sector Protection, and Temporary Sector Unprotection (RESET) (Note 4) — 11.5 — 12.5 V VACC Voltage for Program Acceleration (WP/ACC) (Note4) — 8.5 9.0 9.5 V VOL Output Low Voltage Level VCCf = VCCf Min., VCCs = VCCs Min., IOL=1.0 mA — — 0.4 V VOH Output High Voltage Level VCCf = VCCf Min., VCCs = VCCs Min., IOH=–0.5 mA 2.4 — — V VLKO Flash Low VCCf Lock-Out Voltage 2.3 — 2.5 V — VCC+0.3* V *: VCC indicates lower of VCCf or VCCs. Notes: 1. The ICC current listed includes both the DC operating current and the frequency dependent component. 2. ICC active while Embedded Algorithm (program or erase) is in progress. 3. Automatic sleep mode enables the low power mode when address remain stable for 150 ns. 4. Applicable for only VCCf applying. 5. Embedded Alogorithm (program or erase) is in progress. (@5 MHz) 36 MB84VD2228XEA/EE/2229XEA/EE-90 2. AC Characteristics • CE Timing Parameter Symbols JEDEC Standard — tCCR Description Test Setup CE Recover Time — Min. -90 Unit 0 ns • Timing Diagram for alternating SRAM to Flash CEf tCCR tCCR tCCR tCCR CE1s CE2s 37 MB84VD2228XEA/EE/2229XEA/EE-90 • Read Only Operations Characteristics (Flash) Parameter Symbols Description JEDEC Standard tAVAV tRC Read Cycle Time tAVQV tACC tELQV Unit Min. Max. — 90 — ns Address to Output Delay CEf = VIL OE = VIL — 90 ns tCEf Chip Enable to Output Delay OE = VIL — 90 ns tGLQV tOE Output Enable to Output Delay — — 40 ns tEHQZ tDF Chip Enable to Output High-Z — — 30 ns tGHQZ tDF Output Enable to Output High-Z — — 30 ns tAXQX tOH Output Hold Time From Addresses, CEf or OE, Whichever Occurs First — 0 — ns — tREADY RESET Pin Low to Read Mode — — 20 µs Note: Test Conditions–Output Load: 1 TTL gate and 30 pF Input rise and fall times: 5 ns Input pulse levels: 0.0 V to 3.0 V Timing measurement reference level Input: 1.5 V Output: 1.5 V 38 -90 (Note) Test Setup MB84VD2228XEA/EE/2229XEA/EE-90 • Read Cycle (Flash) tRC Address Addresses Stable tACC CEf tOE tDF OE tOEH WE tCEf HIGH-Z DQ HIGH-Z Output Valid tRC Address Addresses Stable tACC CEf tRH tRP tRH tCEf RESET tOH DQ HIGH-Z Output Valid 39 MB84VD2228XEA/EE/2229XEA/EE-90 • Erase/Program Operations (Flash) Parameter Symbols Description JEDEC Standard tAVAV tWC Write Cycle Time tAVWL tAS — tASO tWLAX -90 Unit Min. Typ. Max. 90 — — ns Address Setup Time (WE to Addr.) 0 — — ns Address Setup Time to CE Low During Toggle Bit Polling 15 — — ns tAH Address Hold Time (WE to Addr.) 45 — — ns — tAHT Address Hold Time from CE or OE High During Toggle Bit Polling 0 — — ns tDVWH tDS Data Setup Time 35 — — ns tWHDX tDH Data Hold Time 0 — — ns — tOES Output Enable Setup Time 0 — — ns — tOEH Output Enable Hold Time — tCEPH — Read 0 — — ns Toggle and Data Polling 10 — — ns CE High During Toggle Bit Polling 20 — — ns tOEPH OE High During Toggle Bit Polling 20 — — ns tGHEL tGHEL Read Recover Time Before Write (OE to CEf) 0 — — ns tGHWL tGHWL Read Recover Time Before Write (OE to WE) 0 — — ns tWLEL tWS WE Setup Time (CEf to WE) 0 — — ns tELWL tCS CEf Setup Time (WE to CEf) 0 — — ns tEHWH tWH WE Hold Time (CEf to WE) 0 — — ns tWHEH tCH CEf Hold Time (WE to CEf) 0 — — ns tWLWH tWP Write Pulse Width 35 — — ns tELEH tCP CEf Pulse Width 35 — — ns tWHWL tWPH Write Pulse Width High 30 — — ns tEHEL tCPH CEf Pulse Width High 30 — — ns tWHWH1 tWHWH1 Byte Programming Operation — 8 — µs Word Programming Operation — 16 — µs tWHWH2 tWHWH2 Sector Erase Operation (Note 1) — 1 — s (Continued) 40 MB84VD2228XEA/EE/2229XEA/EE-90 (Continued) Parameter Symbols JEDEC Standard — tVCS — Description -90 Unit Min. Typ. Max. VCCf Setup Time 50 — — µs tVLHT Voltage Transition Time (Note 2) 4 — — µs Rise Time to VID (Note 2) 500 — — ns Rise Time to VACC 500 — — ns 0 — — ns 500 — — ns — tVIDR — tVACCR — tRB Recover Time from RY/BY — tRP RESET Pulse Width — tEOE Delay Time from Embedded Output Enable — tRH RESET High Level Period Before Read — tBUSY — — — — 90 ns 200 — — ns Program/Erase Valid to RY/BY Delay — — 90 ns tTOW Erase Time-out Time (Note 3) 50 — — µs tSPD Erase Suspend Transition Time (Note 4) — — 20 µs Notes: 1. This does not include the preprogramming time. 2. This timing is for Sector Protection Operation. 3. The time between writes must be less than “tTOW” otherwise that command will not be accepted and erasure will start. A time-out or “tTOW” from the rising edge of last CE or WE whichever happens first will initiate the execution of the Sector Erase command(s). 4. When the Erase Suspend command is written during the Sector Erase operation, the device will take a maximum of “tSPD” to suspend the erase operation. 41 MB84VD2228XEA/EE/2229XEA/EE-90 • Write Cycle (WE control) (Flash) 3rd Bus Cycle Address Data Polling 555h tWC PA tAS PA tRC tAH CEf tCH tCS tCEf OE tGHWL tWP tOE tWHWH1 tWPH WE tOH tDS tDH DQ A0h PD DQ7 DOUT DOUT Notes: • PA is address of the memory location to be programmed. • PD is data to be programmed at byte address. • DQ7 is the output of the complement of the data written to the device. • DOUT is the output of the data written to the device. • Figure indicates last two bus cycles out of four bus cycle sequence. • These waveforms are for the ×16 mode. (The addresses differ from ×8 mode.) 42 MB84VD2228XEA/EE/2229XEA/EE-90 • Write Cycle (CEf control) (Flash) 3rd Bus Cycle Address Data Polling PA 555h tWC tAS PA tAH WE tWH tWS OE tGHEL tCP tWHWH1 tCPH CEf tDS tDH DQ A0h PD DQ7 DOUT Notes: • PA is address of the memory location to be programmed. • PD is data to be programmed at byte address. • DQ7 is the output of the complement of the data written to the device. • DOUT is the output of the data written to the device. • Figure indicates last two bus cycles out of four bus cycle sequence. • These waveforms are for the ×16 mode. (The addresses differ from ×8 mode.) 43 MB84VD2228XEA/EE/2229XEA/EE-90 • AC Waveforms Chip/Sector Erase Operations (Flash) Address 2AAh 555h tWC tAS 555h SA* 2AAh 555h tAH CEf tCS tCH OE tGHWL tWP tWPH WE tDS tDH AAh DQ 30h for Sector Erase 55h 80h AAh 55h tVCS VCCf *: SA is the sector address for Sector Erase. Addresses = 555h for Chip Erase. Note: These waveforms are for the ×16 mode. (The addresses differ from ×8 mode.) 44 10h/ 30h MB84VD2228XEA/EE/2229XEA/EE-90 • AC Waveforms for Data Polling during Embedded Algorithm Operations (Flash) CEf tCH tDF tOE OE tOEH WE tCEf * DQ7 DQ7 = Valid Data DQ7 Data In High-Z tWHWH1 or 2 DQ (DQ0 to DQ6) DQ0 to DQ6 = Output Flag Data In tBUSY DQ0 to DQ6 Valid Data High-Z tEOE RY/BY *: DQ7 = Valid Data (The device has completed the Embedded operation.) 45 MB84VD2228XEA/EE/2229XEA/EE-90 • AC Waveforms for Toggle Bit during Embedded Algorithm Operations (Flash) Address tAHT tASO tAHT tAS CEf tCEPH WE tOEH tOEH tOEPH OE tDH DQ6/DQ2 Data tOE Toggle Data tCEf* Toggle Data Toggle Data tBUSY RY/BY * : DQ6 stops toggling (The device has completed the Embedded operation). 46 Stop Toggling Output Valid MB84VD2228XEA/EE/2229XEA/EE-90 • Back-to-back Read/Write Timing Diagram (Flash) Address Read Command Read Command Read Read tRC tWC tRC tWC tRC tRC BA1 BA2 (555h) BA1 BA2 (PA) BA1 BA2 (PA) tAS tACC tAH tAS tAHT tCE CE tOE tCEPH OE tGHWL tDF tOEH tWP WE tDS DQ Valid Output tDH Valid Intput (A0h) tDF Valid Output Valid Intput (PD) Valid Output Status Note: This is example of Read for Bank 1 and Embedded Algorithm (program) for Bank 2. BA1: Address of Bank 1. BA2: Address of Bank 2. 47 MB84VD2228XEA/EE/2229XEA/EE-90 • RY/BY Timing Diagram during Write/Erase Operations (Flash) CEf The rising edge of the last write pulse WE Entire programming or erase operations RY/BY tBUSY • RESET, RY/BY Timing Diagram (Flash) WE RESET tRP tRB RY/BY tREADY 48 MB84VD2228XEA/EE/2229XEA/EE-90 • Temporary Sector Unprotection (Flash) VCCf tVIDR tVCS tVLHT VID 3V 3V RESET CEf WE tVLHT tVLHT Program or Erase Command Sequence RY/BY Unprotection Period 49 MB84VD2228XEA/EE/2229XEA/EE-90 • Extended Sector Protection (Flash) VCCf tVCS RESET tVLHT tVIDR tWC Add tWC SGAx SGAx SGAy A0 A1 A6 CEf OE TIME-OUT tWP WE Data 60h 60h 40h 01h tOE SGAx: Sector Group Address to be protected SGAy : Next Group Sector Address to be protected TIME-OUT : Time-Out window = 250 µs (Min.) 50 60h MB84VD2228XEA/EE/2229XEA/EE-90 • Accelerated Program (Flash) VCCf tVACCR tVCS tVLHT VACC 3V 3V WP/ACC CE WE tVLHT Program or Erase Command Sequence tVLHT RY/BY Acceleration period 51 MB84VD2228XEA/EE/2229XEA/EE-90 • Read Cycle (SRAM) Parameter Symbol 52 Parameter Description Min. Max. Unit tRC Read Cycle Time 70 — ns tAA Address Access Time — 70 ns tCO1 Chip Enable (CE1s) Access Time — 70 ns tCO2 Chip Enable (CE2s) Access Time — 70 ns tOE Output Enable Access Time — 35 ns tBA LB, UB to Output Valid — 70 ns tCOE Chip Enable (CE1s Low and CE2s High) to Output Active 5 — ns tOEE Output Enable Low to Output Active 0 — ns tBE UB, LB Enable Low to Output Active 0 — ns tOD Chip Enable (CE1s High or CE2s Low) to Output High-Z — 25 ns tODO Output Enable High to Output High-Z — 25 ns tBD UB, LB Output Enable to Output High-Z — 25 ns tOH Output Data Hold Time 10 — ns MB84VD2228XEA/EE/2229XEA/EE-90 • Read Cycle (Note 1) (SRAM) tRC Address tAA tOH tCO1 CE1s tCOE tOD tCO2 CE2s tOD tOE OE tODO tOEE LBs, UBs tBD tBA tBE tCOE DQ VALID DATA OUT Note: WE remains HIGH for the read cycle. 53 MB84VD2228XEA/EE/2229XEA/EE-90 • Write Cycle (SRAM) Parameter Symbol 54 Parameter Description Min. Max. Unit tWC Write Cycle Time 70 — ns tWP Write Pulse Width 55 — ns tCW Chip Enable to End of Write 60 — ns tAW Address valid to End of Write 60 — ns tBW UB, LB to End of Write 60 — ns tAS Address Setup Time 0 — ns tWR Write Recovery Time 0 — ns tODW WE Low to Output High-Z — 25 ns tOEW WE High to Output Active 0 — ns tDS Data Setup Time 30 — ns tDH Data Hold Time 0 — ns MB84VD2228XEA/EE/2229XEA/EE-90 • Write Cycle (Note 3) (WE control) (SRAM) tWC Address tAS tWP tWR WE tAW tCW CE1s CE2s tCW tBW LBs, UBs tOEW tODW DOUT Note 1 Note 2 tDS DIN Note 4 tDH VALID DATA IN Note 4 Notes: 1. If CE1s goes LOW (or CE2s goes HIGH) coincident with or after WE goes LOW, the output will remain at high impedance. 2. If CE1s goes HIGH (or CE2s goes LOW) coincident with or before WE goes HIGH, the output will remain at high impedance. 3. If OE is HIGH during the write cycle, the outputs will remain at high impedance. 4. Because I/O signals may be in the output state at this time, input signals of reverse polarity must not be applied. 55 MB84VD2228XEA/EE/2229XEA/EE-90 • Write Cycle (Note 1) (CE1s control) (SRAM) tWC Address tAS tWP tWR WE tAW tCW CE1s CE2s tCW tBW LBs, UBs tBE tCOE tODW DOUT tDS DIN Note 2 tDH VALID DATA IN Notes: 1. If OE is HIGH during the write cycle, the outputs will remain at high impedance. 2. Because I/O signals may be in the output state at this time, input signals of reverse polarity must not be applied. 56 MB84VD2228XEA/EE/2229XEA/EE-90 • Write Cycle (Note 1) (CE2s Control) (SRAM) tWC Address tAS tWP tWR WE tCW CE1s tAW CE2s tCW tBW LBs, UBs tBE tCOE tODW DOUT tDS DIN Note 2 tDH VALID DATA IN Notes: 1. If OE is HIGH during the write cycle, the outputs will remain at high impedance. 2.Because I/O signals may be in the output state at this time, input signals of reverse polarity must not be applied. 57 MB84VD2228XEA/EE/2229XEA/EE-90 • Write Cycle (Note 1) (LB, UB Control) (SRAM) tWC Address tWP tWR WE tCW CE1s tCW CE2s tAW tAS tBW LBs, UBs tBE tCOE tODW DOUT tDS DIN Note 2 tDH VALID DATA IN Notes: 1. If OE is HIGH during the write cycle, the outputs will remain at high impedance. 2. Because I/O signals may be in the output state at this time, input signals of reverse polarity must not be applied. 58 MB84VD2228XEA/EE/2229XEA/EE-90 ■ ERASE AND PROGRAMMING PERFORMANCE (Flash) Limits Parameter Unit Comment Min. Typ. Max. Sector Erase Time — 1 10 s Excludes programming time prior to erasure Byte Programming Time — 8 300 µs Excludes system-level overhead Word Programming Time — 16 360 µs Excludes system-level overhead Chip Programming Time — — 100 s Excludes system-level overhead 100,000 — — cycle Erase/Program Cycle ■ DATA RETENTION CHARACTERISTICS (SRAM) Parameter Symbol Parameter Description Min. Typ. Max. Unit 1.5 — 3.3 V — TBD TBD µA VDH Data Retention Supply Voltage IDDS2 Standby Current tCDR Chip Deselect to Data Retention Mode Time 0 — — ns Recovery Time tRC — — ns tR VDH = 3.0 V Note: tRC: Read cycle time • CE1s Controlled Data Retention Mode (Note 1) VCCs DATA RETENTION MODE 2.7 V See Note 2 See Note 2 VIH VDH CE1s VCCS –0.2 V tCDR tR GND 59 MB84VD2228XEA/EE/2229XEA/EE-90 • CE2s Controlled Data Retention Mode (Note 3) VCCs DATA RETENTION MODE 2.7 V VDH VIH CE2s tCDR tR VIL 0.2 V GND Notes: 1. In CE1s controlled data retention mode, input level of CE2s should be fixed Vccs to Vccs–0.2 V or Vss to 0.2 V during data retention mode. Other input and input/output pins can be used between –0.3 V to Vccs+0.3 V. 2. When CE1s is operating at the VIH min. level (2.2 V), the standby current is given by ISB1s during the transition of VCCs from 3.6 to 2.2 V. 3. In CE2s controlled data retention mode, input and input/output pins can be used between –0.3 V to Vccs+0.3 V. ■ PIN CAPACITANCE Parameter Symbol Parameter Description Test Setup Typ. Max. Unit CIN Input Capacitance VIN = 0 11 14 pF COUT Output Capacitance VOUT = 0 12 16 pF CIN2 Control Pin Capacitance VIN = 0 14 16 pF CIN3 WP/ACC Pin Capacitance VIN = 0 21.5 26 pF Note: Test conditions TA = 25°C, f = 1.0 MHz ■ HANDLING OF PACKAGE Please handle this package carefully since the sides of packages are right angle. ■ CAUTION 1) The high voltage (VID) can not apply to address pins and control pins except RESET. Therefore, it can not use autoselect and sector protect function by applying the high voltage (VID) to specific pins. 2) For the sector protection, since the high voltage (VID) can be applied to the RESET, it can be protected the sector useing “Extended sector protect” command. 60 MB84VD2228XEA/EE/2229XEA/EE-90 ■ ORDERING INFORMATION MB84VD2228 X EA -90 -PBS PACKAGE TYPE PBS = 71-ball BGA SPEED OPTION See Product Selector Guide Device Revision (Valid Combination) EA EE Bank Size 1 = 0.5Mbit / 31.5Mbit 2 = 4Mbit / 28Mbit 3 = 8Mbit / 24Mbit 4 = 16Mbit / 16Mbit DEVICE NUMBER/DESCRIPTION 32Mega-bit (4M × 8-bit or 2M × 16-bit) Dual Operation Flash Memory 3.0 V-only Read, Program, and Erase 8Mega-bit (1M × 8-bit or 512K × 16-bit) SRAM BOOT CODE SECTOR ARCHITECTURE 84VD2228 = Top sector 84VD2229 = Bottom sector 61 MB84VD2228XEA/EE/2229XEA/EE-90 ■ PACKAGE DIMENSION 71-ball plastic FBGA (BGA-71P-M01) 8.80(.346) +0.15 12.00±0.10(.472±.004) 1.05 ±0.10 .041 +.006 –.004 (Mounting height) 0.38±0.10 (Stand off) (.015±.004) 7.00±0.10 (.276±.004) 7.20(.283) 5.60(.220)REF 0.80 (.031) 8 7 6 5 4 3 2 1 5.60(.220) REF 0.80 (.031) M L K J H G F E D C B A INDEX-MARK AREA +0.10 71-Ø0.45 –0.05 +.004 71-Ø.018 –.002 0.08(.003) M 0.10(.004) C 62 2000 FUJITSU LIMITED B71001S-1c-1 Dimensions in mm (inches) MB84VD2228XEA/EE/2229XEA/EE-90 FUJITSU LIMITED For further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0721, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3386 http://www.fujitsu.co.jp/ North and South America FUJITSU MICROELECTRONICS, INC. 3545 North First Street, San Jose, CA 95134-1804, U.S.A. Tel: +1-408-922-9000 Fax: +1-408-922-9179 Customer Response Center Mon. - Fri.: 7 am - 5 pm (PST) Tel: +1-800-866-8608 Fax: +1-408-922-9179 http://www.fujitsumicro.com/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Am Siebenstein 6-10, D-63303 Dreieich-Buchschlag, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://www.fujitsu-fme.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LTD. #05-08, 151 Lorong Chuan, New Tech Park, Singapore 556741 Tel: +65-281-0770 Fax: +65-281-0220 http://www.fmap.com.sg/ Korea FUJITSU MICROELECTRONICS KOREA LTD. 1702 KOSMO TOWER, 1002 Daechi-Dong, Kangnam-Gu,Seoul 135-280 Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 F0008 FUJITSU LIMITED Printed in Japan All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. 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