AVAGO MGA-684P8-TR1G Low noise active bias low noise amplifi er Datasheet

MGA-684P8
Low Noise Active Bias Low Noise Amplifier
Data Sheet
Description
Features
Avago Technologies’ MGA-684P8 is an economical, easyto-use GaAs MMIC Low Noise Amplifier (LNA). The LNA
has low noise and high linearity achieved through the
use of Avago Technologies’ proprietary 0.25 m GaAs
Enhancement-mode pHEMT process. It is housed in a
miniature 2.0 x 2.0 x 0.75 mm3 8-pin Quad-Flat-Non-Lead
(QFN) package. It is designed for optimum use from 1.5
GHz up to 4 GHz. The compact footprint and low profile
coupled with low noise, high gain and high linearity make
the MGA-684P8 an ideal choice as a low noise amplifier for
cellular infrastructure for GSM and CDMA. For optimum
performance at lower frequency from 450 MHz up to 1.5
GHz, MGA-683P8 is recommended. Both MGA-683P8 and
MGA-684P8 share the same package and pinout configuration.






Pin Configuration and Package Marking
Applications
2.0 x 2.0 x 0.75 mm3 8-lead QFN
[1]
[8]
[2]
[7]
84X
[3]
[6]
[5]
[4]
Low noise Figure
High linearity performance
GaAs E-pHEMT Technology[1]
Low cost small package size: 2.0 x 2.0 x 0.75 mm3
Excellent uniformity in product specifications
Tape-and-Reel packaging option available
Specifications
1.9 GHz; 5 V, 35 mA





17.6 dB Gain
0.56 dB Noise Figure
21 dB Input Return Loss
32.4 dBm Output IP3
22 dBm Output Power at 1dB gain compression
[8]
[7]
[1]
[2]
 Low noise amplifier for cellular infrastructure for GSM
TDS-CDMA, and CDMA.
 Other low noise application.
 Repeater, Metrocell/Picocell application.
[6]
[5]
[3]
[4]
Simplified Schematic
Vdd
Top View
Pin 1
Pin 2
Pin 3
Pin 4
– Vbias
– RFinput
– Not Used
– Not Used
Bottom View
C5
Pin 5 – Not Used
Pin 6 – Not Used
Pin 7 – RFoutput/Vdd
Pin 8 – Not Used
Centre tab - Ground
Note:
Package marking provides orientation and identification
“84” = Device Code, where X is the month code.
R2
L1
C1
L3
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model = 70 V (Class A)
ESD Human Body Model = 500 V (Class 1B)
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.
R1
C3
RFin
C6
Rbias
C4
L2
[1]
[8]
[2]
[7]
[3]
[6]
[4]
[5]
C2
RFout
Note:
 The schematic is shown with the assumption that similar PCB is used
for both MGA-683P8 and MGA-684P8.
 Detail of the components needed for this product is shown in Table 1.
 Enhancement mode technology employs positive gate voltage,
thereby eliminating the need of negative gate voltage associated
with conventional depletion mode devices.
 Good RF practice requires all unused pins to be earthed.
Absolute Maximum Rating [1] TA=25° C
Thermal Resistance
Symbol
Parameter
Units
Absolute Maximum
Vdd
Device Voltage,
RF output to ground
V
5.5
Vbias
Gate Voltage
V
0.7
Idd
Drain Current
mA
90
Pin,max
CW RF Input Power
(Vdd = 5.0 V, Id = 50 mA)
dBm
+20
Pdiss
Total Power Dissipation [2]
W
0.5
Tj
Junction Temperature
°C
150
Tstg
Storage Temperature
°C
-65 to 150
Thermal Resistance [3]
(Vdd = 5.0 V, Idd = 35 mA per channel),
jc = 62°C/W per channel
Notes:
1. Operation of this device in excess of any of
these limits may cause permanent damage.
2. Thermal resistance measured using Infra-Red
Measurement Technique.
3. Power dissipation with unit turned on. Board
temperature TB is 25° C. Derate at 16 mW/°C
for TB > 119° C.
Electrical Specifications [1], [4]
RF performance at TA = 25° C, Vdd = 5 V, Rbias = 6.8 kOhm, 1.9 GHz, measured on demo board in Figure 5 with component
list in Table 1 for 1.9 GHz matching.
Symbol
Parameter and Test Condition
Units
Min.
Typ.
Max.
Idd
Drain Current
mA
23
35.2
47
Gain
Gain
dB
16.1
17.6
19.1
OIP3 [2]
Output Third Order Intercept Point
dBm
29
32.4
NF [3]
Noise Figure
dB
0.56
OP1dB
Output Power at 1dB Gain Compression
dBm
22
IRL
Input Return Loss, 50  source
dB
21
ORL
Output Return Loss, 50  load
dB
12
REV ISOL
Reverse Isolation
dB
30
0.8
Notes:
1. Measurements at 1.9 GHz obtained using demo board described in Figure 1.
2. OIP3 test condition: FRF1 = 1.9 GHz, FRF2 = 1.901 GHz with input power of -10 dBm per tone.
3. For NF data, board losses of the input have not been de-embedded.
4. Use proper bias, heatsink and derating to ensure maximum channel temperature is not exceeded. See absolute maximum ratings and application
note for more details.
2
Product Consistency Distribution Charts (1, 2)
LSL
USL
USL
Noise Figure
Max : 0.8
Mean : 0.56
Id
Max : 47
Min : 23
Mean : 35.2
23
30
40
47
Figure 1. Idd @ 1.9 GHz Mean = 35.2 mA
28
0.5
LSL
OIP3
Min : 29
Mean : 32.4
Gain
Max : 19.1
Min : 16.1
Mean : 17.6
30
31
32
Figure 3. OIP3 @ 1.9 GHz, Mean = 32.4
0.7
0.8
Figure 2. Noise Figure @1.9 GHz, Mean = 0.56
LSL
29
0.6
33
34
35
16
USL
17
18
19
Figure 4. Gain @ 1.9 GHz, Mean = 17.6
Notes:
1. Distribution data samples are 500 samples taken from 3 different wafers. Future wafers allocated to this product may have nominal values anywhere
between the upper and lower limits.
2. Circuit Losses have not been de-embedded from the actual measurements.
3
Gnd
Vdd
Vbias
Jul 10
Demo Board Schematic
Gnd
Demo Board Layout
C5
10nF
Rbias
Vdd
Rbias
6.8KΩ
C6
4.7uF
C5
C3
10pF
C6
R1
R2
L1
L2
C3
R1
49.9Ω
R2
0Ω
C4
22pF
C4
C1
L1
18nH
C2
L3
RFin
Avago
Technologies
L2
6.8nH
L3
4.7nH
Rapala W
MGA-68XP8
C1
3.9pF
[1]
[8]
[2]
[7]
[3]
[6]
[4]
[5]
C2
100pF
RFout
Figure 5. Demo Board Layout Diagram
Figure 6. Demo Board Schematic Diagram
– Recommended PCB material is 10 mils Rogers RO4350.
Notes:
 The schematic is shown with the assumption that similar PCB is used
for both MGA-683P8 and MGA-68P8.
 Detail of the components needed for this product is shown in Table 1.
– Suggested component values may vary according to
layout and PCB material.
Table 1. Component list for 1.9 GHz matching
Part
Size
Value
Detail Part Number
C1
0402
3.9 pF
Murata GRM15
C2
0402
100 pF
Murata GRM15
C3
0402
10 pF
Murata GRM15
C4
0402
22 pF
Murata GRM15
C5
0402
10 nF
Murata GRM15
C6
0805
4.7 F
Murata GRM15
L1
0402
18 nH
Coilcraft CS0402
L2
0402
6.8 nH
Toko FHL1005
L3
0402
4.7 nH
Coilcraft CS0402
Rbias
0402
6.8 KOhm
KOA RK73
R1
0402
49.9 Ohm
KOA RK73
R2
0402
0 Ohm
KOA RK73
Notes:
C2 is a blocking capacitor
L2 output match for OIP3
L1, C1 and L3 are used for IRL matching.
C3, C4, C5, C6 are bypass capacitors
R1 is stabilizing resistor
Rbias is the biasing resistor
4
MGA-684P8 Typical Performance in Demoboard
RF performance at TA = 25° C, Vdd = 5 V, Rbias = 6.8 kOhm, measured on demo board in Figure 5 with component list in
Table1 for 1.9 GHz matching, unless otherwise stated.
25
1.4
1.2
-40° C
25° C
85° C
20
Gain (dB)
NF (dB)
1
0.8
0.6
0.4
-40° C
25° C
85° C
0.2
0
1.5
1.7
1.9
2.5
2.1
2.3
Frequency (GHz)
2.7
2.9
15
10
5
0
3.1
Figure 7. NF vs Frequency vs Temperature
1.5
2
2.5
3
Frequency (GHz)
3.5
4
2.3
2.5
Figure 8. Gain vs Frequency vs Temperature
23
34
33
22.5
31
P1dB (dBm)
OIP3 (dBm)
32
30
29
28
-40° C
25° C
85° C
27
26
1.5
21.5
21
-40° C
25° C
85° C
20.5
20
1.7
1.9
2.1
Frequency (GHz)
Figure 9. OIP3 vs Frequency vs Temperature
5
22
2.3
2.5
1.5
1.7
1.9
2.1
Frequency (GHz)
Figure 10. OP1dB vs Frequency vs Temperature
30
Rev Isol
IRL
ORL
Gain
10
0
K-factor
IRL,ORL,Gain,Rev Isol (dB)
20
-10
-20
-30
-40
1.5
2
2.5
3
Frequency (GHz)
3.5
4
Figure 11. S-Parameter performance with DUT on demoboard shown in
Figure 1.
-6
-5
-7
4
6
8
10 12
Frequency (GHz)
14
16
-15
-20
-35
1.5
1.7
1.9
2.1
Frequency (GHz)
2.3
2.5
65
55
45
35
25
15
Figure 15. Idd vs Rbias
5
6
7
Rbias (Kohm)
8
-10
-11
-14
1.5
1.7
1.9
2.1
Frequency (GHz)
2.3
Figure 14. Output Return Loss vs Frequency vs Temperature
75
4
-9
-13
Figure 13. Input Return Loss vs Frequency vs Temperature
3
9
20
-12
-40°C
25°C
85°C
-30
18
-40°C
25°C
85°C
-8
ORL (dB)
IRL (dB)
2
Figure 12. K-factor vs Frequency vs Temperature
0
-25
Idd (mA)
-40° C
25° C
85° C
0
-10
6
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
10
2.5
MGA-684P8 Typical Scattering Parameters, Vdd = 5 V
Freq
GHz
S11
S21
S12
S22
Mag.
Ang.
dB
Mag.
Ang.
Mag.
Ang.
Mag.
Ang.
0.10
0.91
-16.78
30.68
34.18
158.93
0.00
45.07
0.54
-17.76
0.50
0.62
-58.89
26.12
20.22
116.50
0.01
54.53
0.35
-30.30
0.90
0.45
-81.40
22.58
13.46
93.41
0.01
56.93
0.33
-39.58
1.00
0.42
-85.56
21.83
12.35
88.97
0.02
57.63
0.33
-41.24
1.50
0.33
-101.54
18.76
8.67
70.27
0.02
57.76
0.33
-51.61
1.90
0.29
-113.04
16.88
6.98
57.33
0.03
56.51
0.34
-63.11
2.00
0.28
-115.99
16.47
6.66
54.26
0.03
55.16
0.34
-66.07
2.50
0.27
-131.72
14.62
5.38
39.44
0.03
51.70
0.34
-81.79
3.00
0.28
-146.73
13.02
4.48
25.29
0.04
47.69
0.36
-97.97
4.00
0.35
-164.20
10.29
3.27
-1.28
0.05
38.99
0.41
-128.02
5.00
0.37
-168.83
8.27
2.59
-24.54
0.06
32.11
0.50
-145.67
6.00
0.36
-176.50
7.00
2.24
-46.71
0.08
25.46
0.55
-158.74
7.00
0.36
158.90
5.73
1.93
-72.15
0.10
14.33
0.57
179.26
8.00
0.47
132.96
3.89
1.57
-99.05
0.12
0.48
0.62
148.79
9.00
0.58
123.68
1.47
1.18
-122.64
0.13
-11.23
0.71
126.95
10.00
0.59
115.01
-0.34
0.96
-143.22
0.14
-21.09
0.77
117.70
11.00
0.52
93.03
-1.08
0.88
-166.72
0.19
-35.04
0.77
106.08
12.00
0.49
54.25
-2.56
0.75
161.15
0.22
-58.42
0.76
76.15
13.00
0.58
37.37
-6.12
0.49
132.57
0.21
-78.94
0.82
47.95
14.00
0.65
45.34
-9.98
0.32
115.94
0.20
-87.61
0.87
36.90
15.00
0.65
48.42
-12.83
0.23
100.46
0.22
-94.49
0.86
33.52
16.00
0.57
29.23
-15.49
0.17
72.55
0.26
-111.55
0.80
22.79
17.00
0.55
-6.38
-20.42
0.10
29.92
0.26
-135.35
0.78
2.52
18.00
0.63
-24.55
-26.61
0.05
-29.09
0.23
-152.31
0.83
-10.20
19.00
0.69
-20.93
-26.44
0.05
-92.58
0.21
-162.51
0.85
-19.78
20.00
0.69
-14.10
-23.23
0.07
-128.03
0.21
-173.20
0.83
-32.83
Typical Noise Parameters, Vdd=5V
Freq
Fmin
Γopt
Γopt
GHz
dB
Mag.
Ang.
Rn/50
1.5
0.39
0.135
76.1
1.9
0.45
0.191
118.2
2
0.49
0.174
125.9
0.05
2.2
0.61
0.181
139.4
0.04
2.5
0.69
0.204
151.3
0.05
[1]
RFinput
Reference Plane
bias
[8]
[2]
[7]
0.05
[3]
0.04
[4]
[6]
[5]
RFoutput
Reference Plane
Figure 16.
Notes:
1. The Fmin values are based on noise figure measurements at 100 different impedances using Focus source pull test system. From these
measurements a true Fmin is calculated.
2. Scattering and noise parameters are measured on coplanar waveguide made on 0.010 inch thick ROGER 4350. The input reference plane is at the
end of the RFinput pin and the output reference plane is at the end of the RFoutput pin as shown in Figure 16.
7
SLP4X4 Package
PIN 1 DOT
BY MARKING
2.00±0.050
0.203 Ref.
2.00±0.050
84X
0.000–0.05
0.75±0.05
TOP VIEW
SIDE VIEW
0.60±0.050
Exp. DAP
PIN #1 IDENTIFICATION
R0.100
0.35±0.050
1.20±0.050
Exp. DAP
0.50 Bsc
0.25±0.050
BOTTOM VIEW
Part Number Ordering Information
Part Number
No. of Devices
Container
MGA-684P8-BLKG
100
Antistatic Bag
MGA-684P8-TR1G
3000
7 inch Reel
8
1.50
Ref.
Notes:
1. All dimensions are in millimeters.
2. Dimensions are inclusive of plating.
3. Dimensions are exclusive of mold ash and metal burr.
Device Orientation
REEL
4 mm
8 mm
84X
CARRIER
TAPE
USER FEED
DIRECTION
84X
COVER TAPE
Tape Dimensions
D
P
PO
P2
E
F
W
+
+
D1
t1
Tt
KO
10° MAX
AO
DESCRIPTION
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
PERFORATION DIAMETER
PITCH
POSITION
CARRIER TAPE WIDTH
CAVITY
COVER TAPE
DISTANCE
9
10° MAX
BO
THICKNESS
WIDTH
TAPE THICKNESS
CAVITY TO PERFORATION
(WIDTH DIRECTION)
CAVITY TO PERFORATION
(LENGTH DIRECTION)
SYMBOL
A0
B0
K0
P
D1
D
P0
E
W
t1
C
Tt
F
SIZE (mm)
2.30 ± 0.05
2.30 ± 0.05
1.00 ± 0.05
4.00 ± 0.10
1.00 + 0.25
1.50 ± 0.10
4.00 ± 0.10
1.75 ± 0.10
8.00 ± 0.30
8.00 ± 0.10
0.254 ± 0.02
5.4 ± 0.10
0.062 ± 0.001
3.50 ± 0.05
SIZE (INCHES)
0.091 ± 0.004
0.091 ± 0.004
0.039 ± 0.002
0.157 ± 0.004
0.039 + 0.002
0.060 ± 0.004
0.157 ± 0.004
0.069 ± 0.004
0.315 ± 0.012
0.315 ± 0.004
0.010 ± 0.0008
0.205 ± 0.004
0.0025 ± 0.0004
0.138 ± 0.002
P2
2.00 ± 0.05
0.079 ± 0.002
84X
84X
Reel Dimensions – 7 inch
6.25mm EMBOSSED LETTERS
LETTERING THICKNESS: 1.6mm
SLOT HOLE "a"
SEE DETAIL "X"
Ø178.0±0.5
SLOT HOLE "b"
FRONT
BACK
6
PS
SLOT HOLE(2x)
180° APART.
6
PS
RECYCLE LOGO
SLOT HOLE "a": 3.0±0.5mm(1x)
SLOT HOLE "b": 2.5±0.5mm(1x)
FRONT VIEW
12.4
45°
1.5 MIN.
+1.5*
-0.0
+0.5
Ø13.0 -0.2
Ø20.2 MIN.
°
R10.65
120
65°
R5.2
45°
EMBOSSED RIBS
RAISED: 0.25mm, WIDTH: 1.25mm
Ø178.0±0.5
Ø51.2±0.3
BACK VIEW
For product information and a complete list of distributors, please go to our web site:
DETAIL "X"
18.0*
MAX.
SEE DETAIL "Y"
www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2012 Avago Technologies. All rights reserved.
AV02-2951EN - May 23, 2012
3.5
DETAIL "Y"
(Slot Hole)
1.0
Ø55.0±0.5
BACK
Ø178.0±0.5
FRONT