MM54C90/MM74C90 4-Bit Decade Counter MM54C93/MM74C93 4-Bit Binary Counter General Description The MM54C90/MM74C90 decade counter and the MM54C93/MM74C93 binary counter and complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. The 4-bit decade counter can reset to zero or preset to nine by applying appropriate logic level on the R01, R02, R91 and R92 inputs. Also, a separate flip-flop on the A-bit enables the user to operate it as a divide-by-2, 5 or 10 frequency counter. The 4-bit binary counter can be reset to zero by applying high logic level on inputs R01 and R02, and a separate flip-flop on the A-bit enables the user to operate it as a divide-by-2, -8, or -16 divider. Counting occurs on the negative going edge of the input pulse. All inputs are protected against static discharge damage. Features Y Y Y Y Y Wide supply voltage range Guaranteed noise margin High noise immunity Low power TTL compatiblity The MM54C93/MM74C93 MM74L93 Pinout follows 3V to 15V 1V 0.45 VCC (typ.) Fan out of 2 driving 74L the MM54L93/ Connection and Logic Diagrams MM54C93/MM74C93 Dual-In-Line Package MM54C90/MM74C90 Dual-In-Line Package TL/F/5889 – 2 Top View TL/F/5889 – 4 Top View Order Number MM54C90 or MM74C93 MM54C93/MM74C93 M54C90/MM74C90 TL/F/5889 – 3 TL/F/5889 – 1 C1995 National Semiconductor Corporation TL/F/5889 RRD-B30M105/Printed in U. S. A. MM54C90/MM74C90 4-Bit Decade Counter MM54C93/MM74C93 4-Bit Binary Counter February 1988 Absolute Maximum Ratings Power Dissipation (PD) Dual-In-Line Small Outline If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Voltage at Any Pin (Note 1) Operating VCC Range b 0.3V to VCC a 0.3V Operating Temperature Range (TA) MM54C90, MM54C93 MM74C90, MM74C93 700 mW 500 mW 3V to 15V 18V b 65§ C to a 150§ C Absolute Maximum VCC Storage Temperature Range (TS) Lead Temperature (TL) (Soldering, 10 seconds) b 55§ C to a 125§ C b 40§ C to a 85§ C 260§ C DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS VIN(1) Logical ‘‘1’’ Input Voltage VCC e 5V VCC e 10V 3.5 8.0 VIN(0) Logical ‘‘0’’ Input Voltage VCC e 5V VCC e 10V VOUT(1) Logical ‘‘1’’ Output Voltage VCC e 5V, IO e b10 mA VCC e 10V, IO e b10 mA VOUT(0) Logical ‘‘0’’ Output Voltage VCC e 5V, IO e a 10 mA VCC e 10V, IO e a 10 mA IIN(1) Logical ‘‘1’’ Input Current IIN(0) Logical ‘‘0’’ Input Current VCC e 15V, VIN e 15V VCC e 15V, VIN e 0V ICC Supply Current VCC e 15V V V 1.5 2.0 4.5 9.0 V V 0.005 b 1.0 V V 0.5 1.0 V V 1.0 mA b 0.005 mA 0.05 300 mA CMOS/LPTTL INTERFACE VIN(1) VIN(0) VOUT(1) VOUT(0) Logical ‘‘1’’ Input Voltage MM54C90, MM54C93 MM74C90, MM74C93 VCC e 4.5V VCC e 4.75V Logical ‘‘0’’ Input Voltage MM54C90, MM54C93 MM74C90, MM74C93 VCC e 4.5V VCC e 4.75V Logical ‘‘1’’ Output Voltage MM54C90, MM54C93 MM74C90, MM74C93 VCC e 4.5V, IO e b360 mA VCC e 4.75V, IO e b360 mA Logical ‘‘0’’ Output Voltage MM54C90, MM54C93 MM74C90, MM74C93 VCC e 4.5V, IO e b360 mA VCC e 4.75V, IO e b360 mA VCCb1.5 VCCb1.5 V V 0.8 0.8 2.4 2.4 V V V V 0.4 0.4 V V OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet) (Short Circuit Current) ISOURCE Output Source Current (P-Channel) VCC e 5V, VOUT e 0V TA e 25§ C ISOURCE Output Source Current (P-Channel) ISINK ISINK b 1.75 b 3.3 mA VCC e 10V, VOUT e 0V TA e 25§ C b 8.0 b 15 mA Output Sink Current (N-Channel) VCC e 5V, VOUT e VCC TA e 25§ C 1.75 3.6 mA Output Sink Current (N-Channel) VCC e 10V, VOUT e VCC TA e 25§ C 8.0 16 mA Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’, they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, unless otherwise specified tpd0, tpd1 Symbol Propagation Delay Time from AIN to QA Parameter Conditions VCC e 5V VCC e 10 tpd0, tpd1 Propagation Delay Time from AIN to QB (MM54C93/MM74C93) tpd0, tpd1 Propagation Delay Time from AIN to QB (MM54C90/MM74C90) Typ Max Units 200 80 400 150 ns ns VCC e 5V VCC e 10V 450 160 850 300 ns ns VCC e 5V VCC e 10V 450 160 800 300 ns ns 2 Min AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, unless otherwise specified (Continued) Symbol Parameter tpd0, tpd1 Propagation Delay Time from AIN to QC (MM54C93/MM74C93) Conditions VCC e 5V VCC e 10 tpd0, tpd1 Propagation Delay Time from AIN to QC (MM54C93/MM74C93) tpd0, tpd1 Min Typ Max Units 500 200 1050 400 ns ns VCC e 5V VCC e 10V 500 200 1000 400 ns ns Propagation Delay Time from AIN to QD (MM54C93/MM74C93) VCC e 5V VCC e 10V 600 250 1200 500 ns ns tpd0, tpd1 Propagation Delay Time from AIN to QD (MM54C90/MM74C90) VCC e 5V VCC e 10V 450 160 800 300 ns ns tpd0, tpd1 Propagation Delay Time from R01 or R02 to QA, QB, QC or QD (MM54C93/MM74C93) VCC e 5V VCC e 10V 150 75 300 150 ns ns tpd0, tpd1 Propagation Delay Time from R01 or R02 to QA, QB, QC or QD (MM54C90/MM74C90) VCC e 5V VCC e 10V 200 75 400 150 ns ns tpd0, tpd1 Propagation Delay Time from R91 or R92 to QA or QD (MM54C90/MM74C90) VCC e 5V VCC e 10V 250 100 500 200 ns ns tPW Min. R01 or R02 Pulse Width (MM54C93/MM74C93) VCC e 5V VCC e 10V 600 30 250 125 ns ns tPW Min. R01 or R02 Pulse Width (MM54C90/MM74C90) VCC e 5V VCC e 10V 600 300 250 125 ns ns tPW Min. R91 or R92 Pulse Width (MM54C90/MM74C90) VCC e 5V VCC e 10V 500 250 200 100 ns ns tr, tf Maximum Clock Rise and Fall Time VCC e 10V VCC e 10V tW Minimum Clock Pulse Width VCC e 5V VCC e 10V 250 100 fMAX Maximum Clock Frequency VCC e 5V VCC e 10V 2 5 CIN Input Capacitance Any Input (Note 2) 5 pF CPD Power Dissipation Capacitance Per Package (Note 3) 45 pF 15 5 100 50 ms ms ns ns MHz MHz *AC Parameters are guaranteed by DC correlated testing. Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’, they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: Capacitance is guaranteed by periodic testing. Note 3: CPD determines the no load ac power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics application noteÐ AN-90. AC Test Circuits MM54C90/MM74C90 MM54C93/MM74C93 TL/F/5889 – 6 TL/F/5889 – 5 Clock rise and fall time tr e tf e 20 ns Clock rise and fall time tr e tf e 20 ns 3 Switching Time Waveforms Note 1: MM54C90, MM74C90 and MM54C93, MM74C93 are solid line waveforms. Dashed line waveforms are for MM54C90/MM74C90 only. TL/F/5889 – 7 Truth Table MM54C90/MM74C90 4-Bit Decade Counter BCD Count Sequence MM54C93/MM74C93 4-Bit Binary Counter Binary Count Sequence Output Count QC QB QA L L L L L L L L H H L L L L H H H H L L L L H H L L H H L L L H L H L H L H L H 0 1 2 3 4 5 6 7 8 9 H e High Level L e Low Level X e Irrelevant Reset/Count Function Table R02 R91 R92 QD H H X X L L X H H X L X X L L X H X L X L X L H L X L X L L H QC QB L L L L L L Count Count Count Count QC QB QA L L L L L L L L H H H H H H H H L L L L H H H H L L L L H H H H L L H H L L H H L L H H L L H H L H L H L H L H L H L H L H L H Output QA is connected to input B for binary count sequence. Output R01 QD 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Output QA is connected to Input B for BCD count. Reset Inputs Output Count QD H e High Level L e Low Level X e Irrelevant QA L L H Reset/Count Function Table Reset Inputs 4 Output R01 R02 QD QC QB QA H L X H X L L L L L Count Count Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM54C90J, MM54C93J, MM74C90J or MM74C93J NS Package Number J14A 5 MM54C90/MM74C90 4-Bit Decade Counter MM54C93/MM74C93 4-Bit Binary Counter Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number MM54C90N, MM54C93N, MM74C90N or MM74C93N NS Package Number N14A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 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