NSC MM74C918 Dual cmos 30v relay driver Datasheet

MM74C908/MM74C918 Dual CMOS 30V Relay Driver
General Description
Features
The MM74C908 and MM74C918 are general purpose dual
high voltage drivers, each capable of sourcing a minimum of
250 mA at VOUT e VCC b 3V, and TJ e 65§ C.
The MM74C908 and MM74C918 consist of two CMOS
NAND gates driving an emitter follower Darlington output to
achieve high current drive and high voltage capabilities. In
the ‘‘OFF’’ state the outputs can withstand a maximum of
b 30V across the device. These CMOS drivers are useful in
interfacing normal CMOS voltage levels to driving relays,
regulators, lamps, etc.
Y
Y
Y
Y
Y
Wide supply voltage range
High noise immunity
Low output ‘‘ON’’ resistance
High voltage
High current
3V to 18V
0.45 VCC (typ.)
8X (typ.)
b 30V
250 mA
Connection Diagrams
Dual-In-Line Package
MM74C908
Order Number MM74C908
TL/F/5912 – 1
Top View
Dual-In-Line Package
MM74C918
Order Number MM74C918
TL/F/5912 – 2
Top View
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
TL/F/5912
RRD-B30M105/Printed in U. S. A.
MM74C908/MM74C918 Dual CMOS 30V Relay Driver
November 1990
Absolute Maximum Ratings (Note 1)
Operating VCC Range
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at any Input Pin
Voltage at any Output Pin
Operating Temperature Range
MM74C908/MM74C918
4V to 18V
Absolute Maximum VCC
19V
ISOURCE
Storage Temperature Range (TS)
Lead Temperature (TL)
(Soldering, 10 seconds)
b 0.3V to VCC a 0.3V
32V
b 40§ C to a 85§ C
Power Dissipation (PD)
500 mA
b 65§ C to a 150§ C
260§ C
Refer to Maximum Power
Dissipation vs Ambient
Temperature Graph
DC Electrical Characteristics Min/Max limits apply across temperature range, unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS TO CMOS
VIN(1)
Logical ‘‘1’’ Input Voltage
VCC e 5V
VCC e 10V
3.5
8.0
V
V
VIN(0)
Logical ‘‘0’’ Input Voltage
VCC e 5V
VCC e 10V
IIN(1)
Logical ‘‘1’’ Input Current
IIN(0)
Logical ‘‘0’’ Input Current
VCC e 15V, VIN e 15V
VCC e 15V, VIN e 0V
ICC
Supply Current
VCC e 15V, Outputs Open Circuit
0.05
Output ‘‘OFF’’ Voltage
VIN e VCC, IOUT e b200 mA
b 30
1.5
2.0
0.005
b 1.0
1.0
b 0.005
V
V
mA
mA
15
mA
V
CMOS/LPTTL INTERFACE
VIN(1)
Logical ‘‘1’’ Input Voltage
MM74C908/MM74C918
VCC e 4.75V
VIN(0)
Logical ‘‘0’’ Input Voltage
MM74C908/MM74C918
VCC e 4.75V
VCC b 1.5
V
0.8
V
OUTPUT DRIVE
VOUT
Output Voltage
IOUT e b300 mA, VCC t 5V, TJ e 25§ C
IOUT e b250 mA, VCC t 5V, TJ e 65§ C
IOUT e b175 mA, VCC t 5V, TJ e 150§ C
RON
Output Resistance
IOUT e b300 mA, VCC t 5V, TJ e 25§ C
IOUT e b250 mA, VCC t 5V, TJ e 65§ C
IOUT e b175 mA, VCC t 5V, TJ e 150§ C
VCCb2.7
VCCb3.0
VCCb3.15
Output Resistance
Coefficient
iJA
Thermal Resistance
MM74C908/MM74C918
(Note 3)
(Note 3)
VCCb1.8
VCCb1.9
VCCb2.0
V
V
V
6.0
7.5
10
9.0
12
18
X
X
X
0.55
0.80
%/§ C
100
45
110
55
§ C/W
§ C/W
AC Electrical Characteristics*
Symbol
tpd1
tpd0
CIN
Parameter
Conditions
Propagation Delay
to a Logical ‘‘1’’
VCC e 5V, RL e 50X,
CL e 50 pF, TA e 25§ C
VCC e 10V, RL e 50X,
CL e 50 pF, TA e 25§ C
Propagation Delay
to a Logic ‘‘0’’
Input Capacitance
VCC e 5V, RL e 50X,
CL e 50 pF, TA e 25§ C
VCC e 10V, RL e 50X,
CL e 50 pF, TA e 25§ C
(Note 2)
Min
Typ
Max
Units
150
300
ns
65
120
ns
2.0
10
ms
4.0
20
ms
5.0
pF
*AC Parameters are guaranteed by DC correlated testing.
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2: Capacitance is guaranteed by periodic testing.
Note 3: iJA measured in free air with device soldered into printed circuit board.
2
Typical Performance Characteristics
Maximum Power Dissipation
vs Ambient Temperature
Maximum VCC b VOUT
vs IOUT
Typical IOUT vs Typical VOUT
Typical IOUT vs
Typical VOUT
Typical IOUT vs Typical VOUT
TL/F/5912 – 3
AC Test Circuit
Switching Time Waveforms
TL/F/5912 – 5
tr e tf e 20 ns
TL/F/5912 – 4
3
Power Considerations
Calculating Output ‘‘ON’’ Resistance (RL l 18X)
The output ‘‘ON’’ resistance, RON, is a function of the junction temperature, TJ, and is given by:
(1)
RON e 9 (TJ b 25) (0.008) a 9
and TJ is given by:
TJ e TA a PDAV iJA,
(2)
where TA e ambient temperature, iJA e thermal resistance, and PDAV is the average power dissipated within the
device. PDAV consists of normal CMOS power terms (due to
leakage currents, internal capacitance, switching, etc.)
which are insignificant when compared to the power dissipated in the outputs. Thus, the output power term defines
the allowable limits of operation and includes both outputs,
A and B. PD is given by:
(3)
PD e IOA2 RON a IOB2 RON,
where IO is the output current, given by:
VCC b VL
(4)
IO e
RON a RL
VL is the load voltage.
The average power dissipation, PDAV, is a function of the
duty cycle:
PDAV e IOA2 RON (Duty CycleA) a
(5)
TL/F/5912 – 6
For example, let VCC e 15V, RLA e 100X, RLB e 100X,
VL e 0V, TA e 25§ C, iJA e 110§ C/W, Duty CycleA e
50%, Duty CycleB e 75%.
Assuming RON e 11X, then:
VCC b VL
15
e
e 135.1 mA,
IOA e
RON a RLA
11 a 100
VCC b VL
e 135.1 mA
IOB e
RON a RLB
IOB2 RON (Duty CycleB)
where the duty cycle is the % time in the current source
state. Substituting equations (1) and (5) into (2) yields:
TJ e TA a iJA [9 (TJ b 25) (0.008) a 9]
(6a)
[IOA2 (Duty CycleA) a IOB2 (Duty CycleB)]
simplifying:
TJ e
and
TA a 7.2 iJA [IOA2 (Duty CycleA) a IOB2 (Duty CycleB)]
1 b 0.072 iJA [IOA2 (Duty CycleA) a IOB2 (Duty CycleB)]
TJ e
TA a 7.2 iJA [IOA2 (Duty CycleA) a IOB2 (Duty CycleB)]
1 b 0.072 iJA [IOA2 (Duty CycleA) a IOB2 (Duty CycleB)]
TJ e
25 a (7.2) (110) [(0.1351)2 (0.5) a (0.1351)2 (0.75)]
1 b (0.072) (110) [(0.1351)2 (0.5) a (0.1351)2 (0.75)]
TJ e 52.6§ C
Equations (1), (4), and (6b) can be used in an iterative method to determine the output current, output resistance and
junction temperature.
and RON e 9 (TJ b 25) (0.008) a 9
e 9(52.6 b 25) (0.008) a 9 e 11X
Applications
(See AN-177 for applications)
4
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM74C918J
NS Package Number J14A
Molded Dual-In-Line Package (N)
Order Number MM74C908N
NS Package Number N08E
5
MM74C908/MM74C918 Dual CMOS 30V Relay Driver
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package (N)
Order Number MM74C918N
NS Package Number N14A
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