Fairchild MM74HC132SJ Quad 2-input nand schmitt trigger Datasheet

Revised January 2005
MM74HC132
Quad 2-Input NAND Schmitt Trigger
General Description
Features
The MM74HC132 utilizes advanced silicon-gate CMOS
technology to achieve the low power dissipation and high
noise immunity of standard CMOS, as well as the capability
to drive 10 LS-TTL loads.
■ Typical propagation delay: 12 ns
The 74HC logic family is functionally and pinout compatible
with the standard 74LS logic family. All inputs are protected
from damage due to static discharge by internal diode
clamps to VCC and ground.
■ Wide power supply range: 2V–6V
■ Low quiescent current: 20 µA maximum (74HC Series)
■ Low input current: 1 µA maximum
■ Fanout of 10 LS-TTL loads
■ Typical hysteresis voltage: 0.9V at VCC=4.5V
Ordering Code:
Order Number
Package
Package Description
Number
MM74HC132M
M14A
MM74HC132MX_NL
M14A
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74HC132SJ
M14D
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC132MTC
MM74HC132N
MTC14
N14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. (Tape and Reel not available in N14A.)
Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Logic Diagram
Pin Assignment for DIP, SOIC, SOP, and TSSOP
Top View
© 2005 Fairchild Semiconductor Corporation
DS005309
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MM74HC132 Quad 2-Input NAND Schmitt Trigger
September 1983
MM74HC132
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
(Note 2)
Supply Voltage (VCC)
−0.5 to +7.0V
DC Input Voltage (VIN)
−1.5 to VCC +1.5V
DC Output Voltage (VOUT)
−0.5 to VCC +0.5V
Clamp Diode Current (IIK, IOK)
±20 mA
DC Output Current, per pin (IOUT)
±25 mA
DC VCC or GND Current, per pin (ICC)
±50 mA
Storage Temperature Range (TSTG)
Min
Max
Supply Voltage (VCC)
2
6
Units
V
DC Input or Output Voltage
0
VCC
V
−40
+125
°C
(VIN, VOUT)
Operating Temperature Range (TA)
−65°C to +150°C
Power Dissipation (PD)
(Note 3)
600 mW
S.O. Package only
500 mW
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Lead Temperature (TL)
DC Electrical Characteristics
Symbol
VT+
Parameter
(Note 4)
Conditions
Positive Going
Min
Threshold Voltage
Max
VT−
Negative Going
Min
Threshold Voltage
Max
VH
Hysteresis Voltage
Min
Max
VOH
VOL
Note 3: Power Dissipation temperature derating — plastic “N” package: −
12 mW/°C from 65°C to 85°C.
260°C
(Soldering 10 seconds)
VCC
TA = 25°C
Typ
TA = -40 to 85°C TA = -40 to 125°C
Guaranteed Limits
Units
2.0V
1.0
1.0
1.0
V
4.5V
2.0
2.0
2.0
V
6.0V
3.0
3.0
3.0
V
2.0V
1.5
1.5
1.5
V
4.5V
3.15
3.15
3.15
V
6.0V
4.2
4.2
4.2
V
2.0V
0.3
0.3
0.3
V
4.5V
0.9
0.9
0.9
V
6.0V
1.2
1.2
1.2
V
2.0V
1.0
1.0
1.0
V
4.5V
2.2
2.2
2.2
V
6.0V
3.0
3.0
3.0
V
2.0V
0.2
0.2
0.2
V
4.5V
0.4
0.4
0.4
V
6.0V
0.5
0.5
0.5
V
2.0V
1.0
1.0
1.0
V
4.5V
1.4
1.4
1.4
V
6.0V
1.5
1.5
1.5
V
1.9
1.9
1.9
V
Minimum HIGH Level
VIN = VIH or VIL
2.0V
Output Voltage
|IOUT| ≤ 20 µA
4.5V
4.5
4.4
4.4
4.4
V
VIN = VIH or VIL
6.0V
6.0
5.9
5.9
5.9
V
|IOUT| ≤ 4.0 mA
4.5V
4.2
3.98
3.84
3.7
V
|IOUT| ≤ 5.2 mA
6.0V
5.7
5.48
5.34
5.2
V
Maximum LOW Level
VIN = VIH or VIL
2.0V
0
0.1
0.1
0.1
V
Output Voltage
|IOUT| ≤ 20 µA
4.5V
0
0.1
0.1
0.1
V
VIN = VIH or VIL
6.0V
0
0.1
0.1
0.1
V
|IOUT| ≤ 4.0 mA
4.5V
0.2
0.26
0.33
0.4
V
|IOUT| ≤ 5.2 mA
6.0V
0.2
0.26
0.33
0.4
V
VIN = VCC or GND
6.0V
±0.1
±1.0
±1.0
µA
6.0V
2.0
20
40
µA
IIN
Maximum Input Current
ICC
Maximum Quiescent
VIN = VCC or GND
Supply Current
IOUT = 0 µA
2.0
Note 4: For a power supply of 5V ±10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when
designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
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MM74HC132
AC Electrical Characteristics
VCC = 5V, TA = 25°C, CL = 15 pF, tr = tf = 6 ns
Symbol
tPHL, tPLH
Parameter
Conditions
Maximum Propagation Delay
Typ
Guaranteed
Limit
Units
12
20
ns
AC Electrical Characteristics
VCC = 2.0V to 6.0V, CL = 50 pF, tr = tf = 6 ns (unless otherwise specified)
Symbol
Parameter
Conditions
tPHL, tPLH Maximum
Propagation Delay
tTLH, tTHL Maximum Output
Rise and Fall Time
CPD
Power Dissipation
VCC
TA = 25°C
Typ
TA= −40 to 85°C TA= −55 to 125°C
Guaranteed Limits
Units
2.0V
63
125
158
186
4.5V
13
25
32
37
ns
ns
6.0V
11
21
27
32
ns
ns
2.0V
30
75
95
110
4.5V
8
15
19
22
ns
6.0V
7
13
16
19
ns
(per gate)
130
pF
Capacitance (Note 5)
CIN
Maximum Input Capacitance
5
10
10
pF
Note 5: CPD determines the no load dynamic power consumption, PD = CPD VCC2f + ICC VCC, and the no load dynamic current consumption,
IS = CPD VCC f + ICC.
3
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MM74HC132
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
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4
MM74HC132
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
5
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MM74HC132
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
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6
MM74HC132 Quad 2-Input NAND Schmitt Trigger
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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