ON NTMFS4849NT1G Power mosfet 30 v, 71 a, single n−channel, so−8fl Datasheet

NTMFS4849N
Power MOSFET
30 V, 71 A, Single N−Channel, SO−8FL
Features
•
•
•
•
•
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
Thermally Enhanced SO8 Package
These are Pb−Free Devices*
http://onsemi.com
V(BR)DSS
Applications
•
•
•
•
Refer to Application Note AND8195/D
CPU Power Delivery
DC−DC Converters
High Side Switching
RDS(ON) MAX
5.1 mW @ 10 V
30 V
Symbol
D (5,6)
Value
Unit
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
±16
V
ID
16.1
A
Continuous Drain
Current RqJA
(Note 1)
TA = 25°C
Power Dissipation
RqJA (Note 1)
TA = 25°C
PD
2.17
W
Continuous Drain
Current RqJA v
10 sec
TA = 25°C
ID
26.0
A
Power Dissipation
RqJA, t v 10 sec
TA = 25°C
PD
5.7
W
TA = 25°C
ID
10.2
A
Continuous Drain
Current RqJA
(Note 2)
TA = 85°C
Steady
State
S (1,2,3)
TA = 85°C
7.3
TA = 25°C
PD
0.87
W
Continuous Drain
Current RqJC
(Note 1)
TC = 25°C
ID
71
A
Power Dissipation
RqJC (Note 1)
TC = 25°C
PD
42.4
W
TA = 25°C
IDM
142
A
TA = 25°C
IDmaxpkg
100
A
TJ,
TSTG
−55 to
+150
°C
IS
42
A
TC = 85°C
tp=10ms
Current limited by package
Operating Junction and Storage
Temperature
Source Current (Body Diode)
51
Drain to Source dV/dt
dV/dt
6
V/ns
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 50 V, VGS = 10 V,
IL = 27 Apk, L = 0.3 mH, RG = 25 W)
EAS
109
mJ
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
TL
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
© Semiconductor Components Industries, LLC, 2010
May, 2010 − Rev. 2
N−CHANNEL MOSFET
MARKING
DIAGRAM
18.8
Power Dissipation
RqJA (Note 2)
Pulsed Drain
Current
G (4)
11.6
TA = 85°C
71 A
7.9 mW @ 4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
ID MAX
1
D
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
S
S
S
G
4849N
AYWWG
G
D
D
D
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
NTMFS4849NT1G
SO−8FL
(Pb−Free)
1500 /
Tape & Reel
NTMFS4849NT3G
SO−8FL
(Pb−Free)
5000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy
and soldering details, please download the ON
Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Publication Order Number:
NTMFS4849N/D
NTMFS4849N
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Junction−to−Case (Drain)
Parameter
RqJC
2.95
Junction−to−Ambient – Steady State (Note 1)
RqJA
57.6
Junction−to−Ambient – Steady State (Note 2)
RqJA
143.3
Junction−to−Ambient − t v 10 sec
RqJA
21.95
Unit
°C/W
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
IDSS
V
25.2
VGS = 0 V,
VDS = 24 V
mV/°C
TJ = 25 °C
1
TJ = 125°C
10
IGSS
VDS = 0 V, VGS = ±16 V
VGS(TH)
VGS = VDS, ID = 250 mA
mA
±100
nA
2.5
V
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
Forward Transconductance
VGS(TH)/TJ
RDS(on)
1.45
1.9
5.0
VGS = 10 V to
11.5 V
ID = 30 A
3.9
ID = 15 A
3.9
VGS = 4.5 V
ID = 30 A
6.2
ID = 15 A
6.1
gFS
VDS = 1.5 V, ID = 30 A
mV/°C
5.1
7.9
62
mW
S
CHARGES AND CAPACITANCES
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
181
Total Gate Charge
QG(TOT)
15
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
2040
VGS = 0 V, f = 1 MHz, VDS = 12 V
VGS = 4.5 V, VDS = 15 V; ID = 30 A
361
2.2
5.7
pF
22
nC
5.1
QG(TOT)
VGS = 11.5 V, VDS = 15 V,
ID = 30 A
34.6
nC
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
15.6
tr
td(OFF)
VGS = 4.5 V, VDS = 15 V, ID = 15 A,
RG = 3.0 W
tf
45.1
18.2
5.7
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
http://onsemi.com
2
ns
NTMFS4849N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
td(ON)
Rise Time
9.4
tr
Turn−Off Delay Time
td(OFF)
Fall Time
19.4
VGS = 11.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
ns
25.3
tf
4.4
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
Reverse Recovery Time
VGS = 0 V,
IS = 30 A
TJ = 25°C
0.84
TJ = 125°C
0.7
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
1.0
V
12.5
8.3
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
ns
4.2
QRR
3.0
nC
Source Inductance
LS
0.93
nH
Drain Inductance
LD
Gate Inductance
LG
Gate Resistance
RG
PACKAGE PARASITIC VALUES
0.005
TA = 25°C
1.84
0.9
W
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
130
10 V
120
110
100
90
80
70
60
50
40
30
20
10
0
0
VGS = 4.2 V
TJ = 25°C
4.0 V
5.0 V
3.8 V
4.5 V
3.6 V
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
TYPICAL CHARACTERISTICS
3.4 V
3.2 V
3.0 V
2.8 V
2.6 V
1
2
3
4
5
6
120
110
100
90
80
70
VDS ≥ 10 V
60
50
40
30
20
10
0
TJ = 125°C
TJ = 25°C
TJ = −55°C
0
1
2
3
4
5
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
http://onsemi.com
3
6
NTMFS4849N
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
TYPICAL CHARACTERISTICS
0.020
0.018
ID = 30 A
TJ = 25°C
0.016
0.014
0.012
0.010
0.008
0.006
0.004
0.002
0
2
3
4
5
6
7
8
9
10
11
VGS, GATE−TO−SOURCE VOLTAGE (V)
0.010
0.009
0.008
VGS = 4.5 V
0.007
0.006
0.005
VGS = 11.5 V
0.004
0.003
0.002
0.001
0
15 20
30
35
40
45
50
55
60
65
70
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.75
10,000
VGS = 0 V
ID = 30 A
VGS = 10 V
IDSS, LEAKAGE (nA)
1.50
TJ = 150°C
1000
1.25
1.00
TJ = 125°C
100
0.75
0.50
−50
−25
0
25
50
75
100
125
10
150
2
4
TJ, JUNCTION TEMPERATURE (°C)
1750
1500
TJ = 25°C
1000
Coss
750
500
Crss
250
0
0
5
10
15
20
25
VGS, GATE−TO−SOURCE VOLTAGE (V)
2000
16
QT
14
VDS
VGS
9
8
12
10
7
6
8
5
4
6
Qgd
Qgs
3
4
ID = 30 A
TJ = 25°C
2
1
0
0
5
10
15
20
25
30
2
35
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
http://onsemi.com
4
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
12
11
10
Ciss
1250
8 10 12 14 16 18 20 22 24 26 28 30
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
2500
2250
6
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
C, CAPACITANCE (pF)
25
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
TJ = 25°C
0
NTMFS4849N
TYPICAL CHARACTERISTICS
1000
IS, SOURCE CURRENT (A)
VDS = 15 V
ID = 15 A
VGS = 11.5 V
t, TIME (ns)
100
td(off)
tr
td(on)
10
tf
1
ID, DRAIN CURRENT (A)
1000
10
100
10 ms
100 ms
1 ms
10 ms
dc
RDS(on) Limit
Thermal Limit
Package Limit
0.1
1
10
100
0.7
0.8
0.9
120
ID = 27 A
100
80
60
40
20
0
25
50
75
100
125
150
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ, STARTING JUNCTION TEMPERATURE(°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
120
100
100°C
125°C
100
25°C
10
Id (A)
80
gFS (S)
0.6
Figure 10. Diode Forward Voltage vs. Current
1
60
1
40
20
0
0.5
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
10
0.1
0.4
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
VGS = 20 V
Single Pulse
TC = 25°C
100
VGS = 0 V
TJ = 25°C
RG, GATE RESISTANCE (W)
EAS, SINGLE PULSE DRAIN−TO−
SOURCE AVALANCHE ENERGY (mJ)
1
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
0
VDS = 1.5 V
0
10
20
30
40
50
60 70
80
0.1
90 100 110 120
0.1
1
10
100
1000
DRAIN CURRENT (A)
PULSE WIDTH (ms)
Figure 13. gFS vs. Drain Current
Figure 14. Avalanche Characteristics
http://onsemi.com
5
10,000
NTMFS4849N
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA−01
ISSUE D
2X
0.20 C
D
2
A
B
D1
6
2X
0.20 C
5
4X
E1
2
3
q
E
2
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
c
A1
4
TOP VIEW
C
3X
e
0.10 C
SEATING
PLANE
DETAIL A
A
0.10 C
SIDE VIEW
8X
C A B
0.05
c
3X
4X
1.270
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
e/2
L
1
4
K
0.750
4X
1.000
0.965
1.330
2X
0.905
2X
E2
L1
0.495
M
4.530
3.200
0.475
5
6
G
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.15 BSC
4.50
4.90
5.10
3.50
−−−
4.22
6.15 BSC
5.50
5.80
6.10
3.45
−−−
4.30
1.27 BSC
0.51
0.61
0.71
0.51
−−−
−−−
0.51
0.61
0.71
0.05
0.17
0.20
3.00
3.40
3.80
0_
−−−
12 _
SOLDERING FOOTPRINT*
DETAIL A
b
0.10
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
D2
2X
1.530
BOTTOM VIEW
4.560
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
6
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NTMFS4849N/D