NTB5412N, NTP5412N Power MOSFET 60 Amps, 60 Volts N-Channel D2PAK, TO-220 Features • • • • http://onsemi.com Low RDS(on) High Current Capability Avalanche Energy Specified These are Pb−Free Devices V(BR)DSS 60 V Applications • • • • ID MAX (Note 1) RDS(ON) MAX 60 A 14 mW @ 10 V LED Lighting and LED Backlight Drivers DC−DC Converters DC Motor Drivers Power Supplies Secondary Side Synchronous Rectification N−Channel D MAXIMUM RATINGS (TJ = 25°C Unless otherwise specified) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS 60 V Gate−to−Source Voltage − Continuous VGS $20 V Gate−to−Source Voltage − Nonrepetitive (TP < 10 ms) VGS $30 V ID 60 A Continuous Drain Current RqJC (Note 1) Steady State Power Dissipation RqJC (Note 1) Steady State TC = 25°C TC = 100°C W IDM 155 A TJ, Tstg −55 to 175 °C IS 60 A Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = 50 Vdc, VGS = 10 Vdc, IL(pk) = 60 A, L = 0.1 mH, RG = 25 W) EAS 180 mJ Lead Temperature for Soldering Purposes, 1/8″ from Case for 10 Seconds TL 260 °C Operating and Storage Temperature Range Source Current (Body Diode) 4 4 1 125 tp = 10 ms S 44 PD Pulsed Drain Current TC = 25°C G 3 1 2 Parameter Symbol Max Unit RqJC 1.2 °C/W RqJA 43.2 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface mounted on FR4 board using 1 sq in pad size, (Cu Area 1.127 sq in [1 oz] including traces). D2PAK CASE 418B STYLE 2 TO−220AB CASE 221A STYLE 5 3 MARKING DIAGRAM & PIN ASSIGNMENT 4 Drain 4 Drain NTB 5412NG AYWW NTP 5412NG AYWW THERMAL RESISTANCE RATINGS Junction−to−Case (Drain) Steady State (Note 1) 2 1 Gate 3 Source 2 Drain 1 Gate G A Y WW 2 Drain 3 Source = Pb−Free Device = Assembly Location = Year = Work Week ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. © Semiconductor Components Industries, LLC, 2008 November, 2008 − Rev. 1 1 Publication Order Number: NTB5412N/D NTB5412N, NTP5412N ELECTRICAL CHARACTERISTICS (TJ = 25°C Unless otherwise specified) Characteristics Symbol Test Condition Min V(BR)DSS VDS = 0 V, ID = 250 mA 60 Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Drain−to−Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate−Body Leakage Current V(BR)DSS/TJ IDSS V 54.6 VGS = 0 V VDS = 60 V mV/°C TJ = 25°C 1.0 TJ = 150°C 100 IGSS VDS = 0 V, VGS = $20 V VGS(th) VGS = VDS, ID = 250 mA $100 mA nA ON CHARACTERISTICS (Note 2) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain−to−Source On Voltage VGS(th)/TJ 2.0 3.3 VDS(on) VGS = 10 V, ID = 60 A 0.7 VGS = 10 V, ID = 30 A, 150°C 0.75 RDS(on) VGS = 10 V, ID = 30 A 11.1 gFS VGS = 15 V, ID = 30 A 58 Input Capacitance Ciss 2325 Output Capacitance Coss VDS = 25 V, VGS = 0 V, f = 1 MHz Transfer Capacitance Crss Static Drain−to−Source On−Resistance Forward Transconductance 4.0 6.4 V mV/°C 1.2 V 14 mW S CHARGES, CAPACITANCES & GATE RESISTANCE 3220 pF 85 nC 440 170 VGS = 0 V, VDS = 48 V, ID = 60 A Total Gate Charge QG(TOT) 66 Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS 13.4 Gate−to−Drain Charge QGD 31 2.8 SWITCHING CHARACTERISTICS, VGS = 10 V (Note 3) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(on) tr VGS = 10 V, VDD = 48 V, ID = 60 A, RG = 2.5 W ns 14 115 td(off) 41 tf 89 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V IS = 60 A TJ = 25°C 1.0 TJ = 125°C 0.9 IS = 60 Adc, VGS = 0 Vdc, dIS/dt = 100 A/ms Reverse Recovery Time trr Charge Time ta Discharge Time tb 21 QRR 96 Reverse Recovery Stored Charge 2. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%. 3. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 75 1.2 Vdc ns 54 nC NTB5412N, NTP5412N TYPICAL PERFORMANCE CURVES ID, DRAIN CURRENT (A) 60 5.6 V 40 5.3 V 5.0 V 20 VGS = 4.5 V 0 1 2 3 4 TJ = 125°C 40 TJ = 25°C 20 TJ = −55°C 5 4 5 6 7 VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics ID = 30 A TJ = 25°C 0.045 0.040 0.035 0.030 0.025 0.020 0.015 0.010 5 6 7 8 9 10 8 0.015 TJ = 25°C 0.014 0.013 0.012 VGS = 10 V 0.011 0.010 0.009 0.008 0.007 0.006 0.005 10 20 30 40 50 60 VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 1000 2.4 2.2 VGS = 0 V ID = 60 A VGS = 10 V 2 IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 60 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 0.050 0.005 80 0 3 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) ID, DRAIN CURRENT (A) 100 VDS ≥ 10 V 6V 80 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) TJ = 25°C 10 V 100 1.8 1.6 1.4 1.2 1 TJ = 150°C 100 TJ = 125°C 0.8 0.6 −50 −25 0 25 50 75 100 125 150 175 10 5 10 15 20 25 30 35 40 45 50 55 60 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 NTB5412N, NTP5412N 5000 VGS = 0 V TJ = 25°C C, CAPACITANCE (pF) 4500 4000 3500 3000 Ciss 2500 2000 1500 1000 500 0 Coss Crss 0 10 20 30 40 50 60 VGS, GATE−TO−SOURCE VOLTAGE (V) TYPICAL PERFORMANCE CURVES 10 QT 8 Q1 6 Q2 4 VDS = 48 V ID = 60 A TJ = 25°C 2 0 0 10 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 7. Capacitance Variation t, TIME (ns) IS, SOURCE CURRENT (A) 60 tr 100 tf td(off) td(on) 10 1 1 10 50 50 60 70 40 30 20 10 0 0.4 100 0.5 0.6 0.7 0.8 0.9 1.0 1.1 VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 200 1000 10 ms 100 1 ms 100 ms ID = 60 A 10 ms AVALANCHE ENERGY (mJ) ID, DRAIN CURRENT (A) 40 VGS = 0 V TJ = 25°C RG, GATE RESISTANCE (W) dc 10 0 V ≤ VGS ≤ 10 V Single Pulse TC = 25°C 1 0.1 30 Figure 8. Gate−to−Source Voltage vs. Total Charge 1000 VDD = 48 V ID = 60 A VGS = 10 V 20 Qg, TOTAL GATE CHARGE (nC) RDS(on) Limit Thermal Limit Package Limit 0.1 1 10 150 100 50 0 25 100 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 50 75 100 125 150 TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 4 175 NTB5412N, NTP5412N TYPICAL PERFORMANCE CURVES 100 D = 0.5 r(t), (°C/W) 10 1 0.2 0.1 0.05 0.02 0.01 0.1 0.01 Single Pulse 0.001 0.000001 0.00001 Surface−Mounted on FR4 Board using 1 sq in pad size, 1 oz Cu 0.0001 0.001 0.01 0.1 1 10 100 1000 t, PULSE TIME (s) Figure 13. Thermal Response ORDERING INFORMATION Package Shipping† NTP5412NG TO−220AB (Pb−Free) 50 Units / Rail NTB5412NT4G D2PAK (Pb−Free) 800 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 5 NTB5412N, NTP5412N PACKAGE DIMENSIONS D2PAK 3 CASE 418B−04 ISSUE K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 418B−01 THRU 418B−03 OBSOLETE, NEW STANDARD 418B−04. C E −B− V W 4 1 2 A S 3 −T− SEATING PLANE K J G D 3 PL 0.13 (0.005) VARIABLE CONFIGURATION ZONE W H M T B M N R L M L M F F F VIEW W−W 1 VIEW W−W 2 VIEW W−W 3 SOLDERING FOOTPRINT* 10.49 8.38 16.155 2X 3.504 2X 1.016 5.080 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6 INCHES MIN MAX 0.340 0.380 0.380 0.405 0.160 0.190 0.020 0.035 0.045 0.055 0.310 0.350 0.100 BSC 0.080 0.110 0.018 0.025 0.090 0.110 0.052 0.072 0.280 0.320 0.197 REF 0.079 REF 0.039 REF 0.575 0.625 0.045 0.055 STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN P U L M DIM A B C D E F G H J K L M N P R S V MILLIMETERS MIN MAX 8.64 9.65 9.65 10.29 4.06 4.83 0.51 0.89 1.14 1.40 7.87 8.89 2.54 BSC 2.03 2.79 0.46 0.64 2.29 2.79 1.32 1.83 7.11 8.13 5.00 REF 2.00 REF 0.99 REF 14.60 15.88 1.14 1.40 NTB5412N, NTP5412N PACKAGE DIMENSIONS TO−220 CASE 221A−09 ISSUE AF −T− B F T SEATING PLANE C S 4 DIM A B C D F G H J K L N Q R S T U V Z A Q U 1 2 3 H K Z L R V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. J G D N INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.161 0.095 0.105 0.110 0.155 0.014 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 STYLE 5: PIN 1. 2. 3. 4. MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 4.09 2.42 2.66 2.80 3.93 0.36 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04 GATE DRAIN SOURCE DRAIN ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. 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