TI1 OPA361-Q1 3v video amplifier with internal gain and filter in sc70 Datasheet

OPA361-Q1
SBOS552 – MARCH 2011
www.ti.com
3V Video Amplifier with Internal Gain and Filter in SC70
Check for Samples: OPA361-Q1
FEATURES
DESCRIPTION
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The OPA361-Q1 high-speed amplifier is optimized for
3V portable video applications. It is specifically
designed to be compatible with the video encoders
embedded in Texas Instruments’ OMAP2420 and
DaVinci processors or other application processors
with 0.5VPP video output. The input common-mode
range includes GND, which allows a video-DAC
(digital-to-analog converter) to be DC-coupled to the
OPA361-Q1. The TV-detection feature simplifies the
end-user interface significantly by facilitating the
automatic start/stop of video transmission.
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(1)
Qualified for Automotive Applications
Excellent Video Performance
Internal Gain: 5.2V/V
Supports TV-Detection
Compatible with OMAP242x and
DAVINCI™ Processors
2-Pole Reconstruction Filter
Input Range Includes Ground
– DC-Coupled Input
Integrated Level Shifter
– DC-Coupled Output(1)
– No Output Capacitors Needed
Rail-to-Rail Output
Low Quiescent Current: 5.3mA
Shutdown Current: 1.5µA
Single-Supply: 2.5V to 3.3V
SC70-6 Package: 2.0mm × 2.1mm
RoHS Compliant
The output swings within 5mV of GND and 250mV to
V+ with a standard back-terminated video load
(150Ω). An internal level shift circuit prevents the
output from saturating with 0V input, thus preventing
sync-pulse clipping in common video circuits.
Therefore, the OPA361-Q1 is ideally suited for
DC-coupling to the video load.
The
OPA361-Q1
has
been
optimized
for
space-sensitive applications by integrating internal
gain setting resistors (G = 5.2V/V) and a 2-pole
video-DAC reconstruction filter.
Internal circuitry avoids output saturation, even with 0V sync
tip level at the input video signal.
V+
OPA361
The OPA361-Q1 is available in the tiny 2mm ×
2.1mm SC70-6 package.
10mV
2-Pole
Filter
+In
In shutdown mode, the quiescent current is reduced
to < 1.5µA, dramatically reducing power consumption
and prolonging battery life.
75Ω
Out
500Ω
RSET
4kΩ
G =5.2V/V
Shutdown
Control
Enable
(see note 1)
GND
(1)
Closed when enabled during
operation; open when shut down.
normal
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
OPA361-Q1
SBOS552 – MARCH 2011
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION (1)
(1)
PRODUCT
PACKAGE
PACKAGE DESIGNATOR
PACKAGE MARKING
OPA361-Q1
SC70-6
DCK
QXP
For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see the TI
website at www.ti.com.
PIN CONFIGURATION
DCK PACKAGE
(TOP VIEW)
1
GND
2
RSET
3
QXP
+In
6
V+
5
Enable
4
Out
The location of pin 1 on the OPA361-Q1 is determined by orienting the package marking as shown in the diagram
above.
ABSOLUTE MAXIMUM RATINGS (1)
Supply voltage, V+ to V–
Signal input terminals
Voltage
(2)
Current (2)
VALUE
UNIT
+3.6
V
–0.5 to (V+) + 0.5
V
±10
mA
Output short-circuit through 75Ω to GND (3)
Continuous
Operating temperature
–40 to +125
°C
Storage temperature
–65 to +150
°C
Junction temperature
+160
°C
(1)
(2)
(3)
2
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails should
be current-limited to 10mA or less.
Short-circuit to ground.
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ELECTRICAL CHARACTERISTICS: VS = +2.5V to +3.3V
Boldface limits apply over the temperature range, TA = –40°C to +125°C.
At TA = +25°C, RL = 150Ω connected to GND, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
–3
11
55
UNIT
OFFSET LEVEL-SHIFT VOLTAGE
Output Level-Shift Voltage (1)
VOLS
VS = +2.8V, VIN = GND
Over Temperature
PSRR
vs Power Supply
VS = +2.5V to +3.3V
mV
20
mV
±80
µV/V
INPUT VOLTAGE RANGE
Input Voltage Range (2)
VCM
RIN
Input Resistance (+In)
RSET
RSET Resistance
VS = 2.5V
GND
0.42
V
VS = 2.8V
GND
0.48
V
VS = 3.3V
GND
0.55
V
510
550
Ω
3600
4070
4400
Ω
2%
0.5%
ΔVOUT/ΔVIN, VS = +2.5V, VINMIN = 0V, VINMAX = 0.42V
5.06
5.17
5.28
V/V
ΔVOUT/ΔVIN, VS = +2.8V, VINMIN = 0V, VINMAX = 0.48V
5.06
5.17
5.28
V/V
ΔVOUT/ΔVIN, VS = +3.3V, VINMIN = 0V, VINMAX = 0.55V
5.06
5.17
5.28
V/V
450
Matching of RIN and RSET
VOLTAGE GAIN
FREQUENCY RESPONSE
Filter Response
f−3dB
Cutoff Frequency
MHz
VO = 2VPP
–0.1
dB
fIN = 27MHz
VO = 2VPP
–18
dB
fIN = 54MHz
VO = 2VPP
–23
dB
Differential Gain Error
RL = 150Ω
1.2%
Differential Phase Error
RL = 150Ω
1.6
Group Delay Variation
100kHz, 4.5MHz
26
ns
Signal-to-Noise Ratio
100% White Signal
65
dB
Positive Voltage Output Swing from Rail
VS = +2.8V, VIN = 0.7V,Ω to GND
130
250
mV
Negative Voltage Output Swing from Rail
VS = +2.8V, VIN = –0.05V, RL = 150Ω to GND
0.15
5
mV
Positive Voltage Output Swing from Rail
VS = +2.8V, VIN = 0.7V, RL = 75Ω to GND
260
Negative Voltage Output Swing from Rail
VS = +2.8V, VIN = –0.05V, RL = 75Ω to GND
Output Leakage
VS = +2.8V, Disabled, VO = 2V
0.3
Output Current (3)
VS = +2.8V
±80
Normalized Gain:
SNR
9
fIN = 4.5MHz
degrees
OUTPUT
IO
mV
2
mV
100
nA
mA
POWER SUPPLY
VS
Specified Voltage Range
IQ
Quiescent Current
VS = +2.8V, Enabled, IO = 0, VOUT = 1.4V
2.5
Over Temperature
Specified Temperature Range
5.3
3.3
V
7.5
mA
9
mA
ENABLE/SHUTDOWN FUNCTION
Disabled (logic-LOW threshold)
0
0.35
Enabled (logic-HIGH threshold)
1.3
VS
Enable Time
Shutdown Current
50
VS = +2.8V, Disabled
1.5
V
µs
1.5
Disable Time
V
ns
3
µA
TEMPERATURE RANGE
θJA
Specified/Operating Range
–40
+125
°C
Storage Range
–65
+150
°C
Thermal Resistance
SC70
(1)
(2)
(3)
250
°C/W
Output referred.
Limited by output swing and internal G = 5.2V/V.
See typical characteristics Output Voltage Swing vs Output Current.
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TYPICAL CHARACTERISTICS: VS = 2.8 V
At TA = +25°C and RL = 150, unless otherwise noted.
RIN
vs
TEMPERATURE
RSET
vs
TEMPERATURE
535
4250
530
−
4200
525
4150
RSET (Ω)
RIN (Ω)
520
515
510
4100
4050
505
4000
500
495
−50
−25
0
+25
+50
+75
+100
+125
3950
− 50
+150
− 25
0
+25
+50
+75
Temperature (°C)
Temperature (°C)
RSET/RIN RATIO
vs
TEMPERATURE
GAIN
vs
TEMPERATURE
+100
+125
+150
5.5
8.5
8.4
5.4
8.2
8.1
Gain (V/ V)
RSET/RIN Ratio
8.3
8.0
7.9
5.3
5.2
7.8
5.1
7.7
7.6
7.5
−50
5.0
−25
0
+25
+50
+75
+100
+125
−50
+150
−25
0
+25
OUTPUT VOLTAGE
vs
TEMPERATURE
2.80
VIN = − 50mV
VS = 2. 8V
+100
+125
+150
0.003
0.002
0.001
VIN = 700mV
VS = 2. 8 V
2.75
Outpu t Voltag e (V)
0.004
Outpu t Voltag e ( V)
+75
OUTPUT VOLTAGE
vs
TEMPERATURE
0.005
2.70
2.65
2.60
2.55
2.50
0
−50
−25
0
+25
+50
+75
+100
+125
+150
−50
−25
0
+25
+50
+75
+100
+125
+150
Temperature (°C)
Temperature (°C)
4
+50
Temperature (°C)
Temperature (°C)
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TYPICAL CHARACTERISTICS: VS = 2.8 V (continued)
At TA = +25°C and RL = 150, unless otherwise noted.
VOUT LEVEL SHIFT
vs
TEMPERATURE
QUIESCENT CURRENT
vs
TEMPERATURE
0.05
8
Quiescent Current (mA)
0.04
VOUT Level Shift ( V)
9
VS = 2. 8 V
VIN = 0V
0.03
0.02
0.01
7
6
5
4
0
−0.01
−50
3
−25
0
+25
+50
+75
+100
+125
−50
+150
−25
0
OUTPUT LEAKAGE CURRENT
vs
TEMPERATURE
+75
+100
+125
+150
400
Enable =0V
VPULLUP = 1. 8V
100000
+50
OUTPUT LEAKAGE
vs
IN SHUTDOWN
Enable =0V
350
Output Lea kage Current (pA)
Output Leakage Current (pA)
1000000
+25
Temperature (°C)
Temperature (°C)
10000
1000
100
10
1
300
250
200
150
100
50
0
−50
−100
0.1
−50
−25
0
+25
+50
+75
+100
+125
0
+150
0.5
1
1.5
2
3
2.5
VPULLUP (V)
Temperature (°C)
SHUTDOWN QUIESCENT CURRENT HYSTERESIS
vs
TEMPERATURE
AC RESPONSE
vs
AT VARIOUS TEMPERATURES
10000
3
0
−3
AC Response (dB)
IQSHDN (mA)
1000
−40 C
100
+25 C
+125 C
10
−6
−9
+125 C
−12
−15
−18
−21
+85 C
−24
+25 C
−27
1
0.7
0.75
0.8
0.85
0.9
0.95
1
−30
100k
VSHDN (V)
−40 C
1M
10M
10 0M
Frequency (Hz)
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TYPICAL CHARACTERISTICS: VS = 2.8 V (continued)
At TA = +25°C and RL = 150, unless otherwise noted.
TURN−OFF TIME
Voltage (500mV/div)
Voltage (500mV/div)
TURN−ON TIME
Time (1ms/div)
Time (25ns/div)
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
GROUP DELAY
vs
FREQUENCY
100
3.0
90
2.5
80
70
Grou p Delay (ns)
VOUT (V)
2.0
1.5
1.0
+125 C
0.5
60
50
40
30
0 C −25 C −40 C
+85 C +25 C
20
10
0
100k
0.14
0.15
0.13
0.11
0.12
0.10
0.08
0.09
0.06
0.07
0.04
0.05
0.02
0.03
0
0.01
0
1M
10M
100M
Frequency (Hz)
I OUT (A)
DIFFERENTIAL GAIN
I NP = A − C S Y NC = I N T
−5
− 0. 6
%1
DG1
− 1. 0
%.
DG2
− 1. 1
%.
DG3
− 1. 2
%.
DG4
− 0. 8
%5
DG5
ST EPS
4
5
DIFFERENTIAL PHASE
I N P = A − C S Y NC = INT
−5
DP1
DP2
DP3
DP4
DP5
6
1 .1
1 .6
1 .6
1 .5
1 .1
dg1
dg.
dg.
dg.
dg5
ST EPS
5
4
M T I ME = 10s
0
0
ZO O M
1
2
MT IME = 10s
0
0
L I NE = 3 3 0
+5
MODE
1
LINE = 3 3 0
+5
ZO O M
2
1
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M OD E
1
Copyright © 2011, Texas Instruments Incorporated
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OPA361-Q1
SBOS552 – MARCH 2011
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APPLICATION INFORMATION
The OPA361-Q1 video amplifier has been optimized to fit seamlessly with Texas Instruments’ OMAP242x
Multimedia processor. The following features have been integrated to provide excellent video performance.
• Internal gain setting resistors (G = 5.2V/V) reduce the number of external components needed in the video
circuit.
• Integration of the 500Ω video encoder load resistor and 4kΩ RSET resistor used by the OMAP242x helps
minimize the number of external components and also ensures excellent ratio and temperature tracking. This
feature helps to keep the overall gain accurate and stable over temperature.
• TV-detection support in connection with an OMAP242x multimedia processor. This feature helps to automate
start/stop operation of the TV-out function and minimizes power consumption.
• A 2-pole filter is incorporated for DAC signal reconstruction.
• The OPA361-Q1 employs an internal level shift circuit that avoids sync pulse clipping and allows DC-coupled
output.
• A shutdown feature reduces quiescent current to less than 1.5µA—crucial for portable applications
Although OPA361-Q1 is optimized for the OMAP242x processor, it is also suitable to interface with any digital
media processor that outputs a video signal on the order of 0.4VPP to 0.5VPP.
Figure 1 shows a typical application drawing with the OMAP242x processor and the TWL92230 Energy
Management Chip.
TWL92230
1.8V DAC
0.5V VREF
Regulator VAUX
V+ 2.8V
OMAP2420
1.8V
OPA361
PullUp
10kΩ
10mV
+In
Video
DAC
2-Pole
Filter
Out 75Ω
+
500Ω
75Ω
RSET
G =5.2V/V
4kΩ
Enable
TV Detect
Shutdown
Control
(see note 1)
GPIO (3)
GND
GPIO
TV Detect
100kΩ (2)
Figure 1. Typical Application using the OMAP242x and the TWL92230
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OPERATING VOLTAGE
The OPA361-Q1 is fully specified from 2.5V to 3.3V over a temperature range of –40°C to +125°C. Parameters
that vary significantly with operating voltages or temperature are shown in the Typical Characteristics.
Power-supply pins should be bypassed with 100nF ceramic capacitors.
INPUT VOLTAGE
The input common-mode range of the OPA361-Q1 series extends from GND to 0.55V on a 3.3V supply. The
input range is limited by the internal gain in conjunction with the maximum output swing capability and the
power-supply voltage.
INPUT OVERVOLTAGE PROTECTION
All OPA361-Q1 pins are static-protected with internal ESD protection diodes connected to the supplies. These
diodes will provide input overdrive protection if the current is externally limited to 10mA.
ENABLE/SHUTDOWN
The OPA361-Q1 has a shutdown feature that disables the output and reduces the quiescent current to less than
1.5µA. This feature is especially useful for portable video applications, where the device is infrequently
connected to a television (TV) or other video device.
The Enable logic input voltage is referenced to the OPA361-Q1 GND pin. A logic level HIGH applied to the
enable pin enables the op amp. The logic levels are compatible with 1.8V CMOS logic levels. A valid logic HIGH
is defined as > 1.3V above GND. A valid logic LOW is defined as < 0.35V above GND. If the Enable pin is not
connected, internal pull-up circuitry will enable the amplifier.
When disabling the OPA361-Q1, internal circuitry also disconnects the internal gain setting feedback. This
feature is in support of the TV-detection function. See the TV-Detect Function section for more detailed
information.
INTERNAL 2-POLE FILTER
The OPA361-Q1 filter is a Sallen-Key topology with a 9MHz cutoff frequency. Figure 2 shows a detailed drawing
of the filter components. This filter allows video signals to pass without any visible distortion, as shown in
Figure 3 through Figure 6. The video encoder embedded in the OMAP242x processor typically samples at
54MHz. At this frequency, the attenuation is typically 23dB, which effectively attenuates the sampling aliases.
The internal 500Ω resistor on the input to GND converts the output current of the OMAP2420 internal video DAC
into a voltage. It is also part of the Sallen-Key filter. Using an external resistor to adjust the input voltage range
will also alter the filter characteristics.
3.6pF
OPA361
2.2kΩ
(
Television
2.2kΩ
)
VO
500Ω
75Ω
12.5pF
75Ω
4.22kΩ
1kΩ
Figure 2. Filter Structure of the OPA361-Q1
8
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Video Performance
The color bar signal in Figure 3 shows excellent amplitude characteristics and no attenuation of colors with
respect to the luminance signal.
∆: 2.02V
@: 30.0mV
Figure 3. 100/75 Color Bar Signal at Output of OPA361-Q1
The CCIR330/5 test pattern requires one of the greatest dynamic ranges, and therefore tests the OPA361-Q1
output voltage swing capability. The scope plot shown in Figure 4 has been taken with a 2.8V supply and shows
no clipping on the top side of the signal.
∆: 2.30V
@: 2.31mV
Figure 4. CCIR330/5: No Clipping, Even On 2.8V Supply
The multiburst test patterns have different sine-wave burst sections with the following frequencies: 0.5MHz,
1MHz, 2MHz, 4MHz, 4.8MHz and 5.8MHz with 420mVPP. There is no visible attenuation even at the highest
frequencies, which indicates a very flat frequency response of the OPA361-Q1. As shown in Figure 5 and
Figure 6, the top line illustrates the full signal and the bottom line is a more detailed view of the last three sine
wave bursts.
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Figure 5. Multiburst Signal (CCIR 18/1) Shows Very Flat Frequency Response
The CCIR17 test pattern contains a 2T and a 20T pulse, as shown in Figure 6. The 2T pulse is used to check for
pulse distortion and reflection, and the 20T pulse is used to check for amplitude and group delay between
chrominance and luminance. Neither pulse exhibits any distortion or group delay artifacts.
Figure 6. CCIR 17 2T and 20T Pulses Show No Visible Distortion
INTERNAL LEVEL SHIFT
Many common video DACs embedded in digital media processors, like the new OMAP242x processors, operate
on a single supply (no negative supply). Typically, the lowest point of the sync pulse output by these video DACs
is close to 0V. With a 0V input, the output of a common single-supply op amp saturates at a voltage > 0V. This
effect would clip the sync pulse, and therefore degrade the video signal integrity. The OPA361-Q1 employs an
internal level shift circuit to avoid clipping. The input signal is typically shifted by approximately 11mV. This shift
is well within the linear output voltage range of the OPA361-Q1 with a standard 150Ω video load.
Output Swing Capability
Figure 7 shows the true output swing capability of the OPA361-Q1 by taking the tip of the input sync pulse to a
slightly negative voltage. Even when the output sync tip is at 3mV, the output after the 75Ω series termination still
shows no clipping of the sync pulse.
10
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∆: 305mV
@: 3.00mV
Figure 7. No Clipping of the Sync Pulse
TV-Detect Function
The TV-detection feature of the OPA361-Q1 works in conjunction with the OMAP242x (or other processors) to
detect if a television is connected to the video output of the device. In order to detect a TV load, the OPA361-Q1
is briefly turned off, ideally during the first vertical sync pulse. For the detection, a simple pull-up resistor to the
processor logic supply is used on the output of the OPA361-Q1. The voltage level is pulled LOW if the TV (or
other video equipment) is connected, or HIGH if nothing is connected. A GPIO in the processor can be used to
read this logic level and decide if a video load is connected. Figure 8 shows a scope plot with the TV
disconnected and Figure 9 shows a scope plot with the TV connected; the upper line in both figures is the
disable pulse. Figure 10 shows a circuit drawing using the TV-detect signal to disable or enable the OPA361-Q1.
OPA361 Disable Pulse
∆: 1.84V
@: 1.84V
OPA361 Ouput
Pulled HIGH;
No Video Load
Connected
Equilization Pulses
1st Vertical Sync Pulse
Vertical Sync Pulses
Figure 8. Output of OPA361-Q1 Pulled Up To 1.8V During Disable: TV Disconnected
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OPA361 Disable Pulse
OPA361 Ouput Pulled LOW
Due to Video Load
Equilization Pulses
1st Vertical Sync Pulse
Vertical Sync Pul ses
Figure 9. Output of OPA361-Q1 Pulled Down: TV Connected.
TWL92230
1.8V DAC
Regulator V AUX
0.5V VREF
V+ 2.5Vor 2.8V
OMAP2420
1.8V
OPA361
PullUp
10kΩ
10mV
+In
Video
DAC
2-Pole
Filter
Out 75Ω
+
500Ω
75Ω
RSET
G =5.2V/V
4kΩ
Enable
TV Detect
Shutdown
Control
(see note 1)
GPIO(3)
GND
GPIO
TV Detect
100kΩ(2)
Figure 10. Using TV-Detect Signal to Disable/Enable the OPA361-Q1
Disabling the OPA361-Q1 also disconnects the internal feedback resistors’ path to GND, and therefore there is
no current flowing from the logic supply through the pull-up resistor to GND if no video load is connected; this
helps to conserve battery life. The typical leakage when the output is pulled high and OPA361-Q1 is disabled is
only about 300pA.
The following functionality can be achieved by implementing TV-detection:
• Automatic video start by polling the video line periodically.
• Automatic video stop if the TV (or other equipment) is disconnected.
Proper implementation allows to significantly simplify the user interface.
For more information, see Application Report SBOA109, OPA361-Q1 and TV Detection, available for download
at www.ti.com.
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PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2011
PACKAGING INFORMATION
Orderable Device
OPA361AQDCKRQ1
Status
(1)
Package Type Package
Drawing
ACTIVE
SC70
DCK
Pins
Package Qty
6
3000
Eco Plan
(2)
Green (RoHS
& no Sb/Br)
Lead/
Ball Finish
MSL Peak Temp
(3)
Samples
(Requires Login)
CU NIPDAU Level-2-260C-1 YEAR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF OPA361-Q1 :
• Catalog: OPA361
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Mar-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
OPA361AQDCKRQ1
Package Package Pins
Type Drawing
SC70
DCK
6
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
3000
179.0
8.4
Pack Materials-Page 1
2.2
B0
(mm)
K0
(mm)
P1
(mm)
2.5
1.2
4.0
W
Pin1
(mm) Quadrant
8.0
Q3
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Mar-2011
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
OPA361AQDCKRQ1
SC70
DCK
6
3000
195.0
200.0
45.0
Pack Materials-Page 2
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