SECOS S5J2187

S5J2187
750mA CMOS
Positive Voltage Regulator
Elektronische Bauelemente
RoHS Compliant Product
Description
The S5J2187 of positive,linear regulators feature low quiescent
current (45µA typ.) with low dropout voltage, making them ideal
for battery applications. Output voltage are set at the factory and
trimmed to 1.5% accuracy.These rugged devices have both
Thermal Shutdown and Current Fold-back to prevent device failure
under the "Worst" of operating conditions. An additional feature is a
"Power Good" detector, which pulls low when the output is out of
regulation.The S5J2187 is stable with an output capacitance of
4.7µF or greater.
Features
* Low Temperature Coefficient
* Over-Temperature Shutdown
* Power Good Output Function
* Very Low Dropout Voltage
* Noise Reduction Bypass Capacitor
* Short Circuit Current Fold-back
* Guaranteed 750mA output
REF.
A
B
C
D
P
S
Millimeter
Min.
Max.
6.35
6.73
5.21
5.46
9.40
10.20
2.40
3.00
1.27 REF.
0.50
0.80
REF.
G
H
J
K
L
M
Millimeter
Min.
Max.
0.45
0.60
2.20
2.40
0.46
0.58
0
0.15
0.90
1.50
5.40
5.59
* Current Limiting
* Power-Saving Shutdown Mode
Applications
* PC Peripherals
* Wireless Devices
* Portable Electronics
* Battery Powered Widgets
* Instrumentation
Functional Block Diagram
Typical Application Circuit
S5J2187
http://www.SeCoSGmbH.com/
01-Jun-2002 Rev. A
Any changing of specification will not be informed individual
Page 1 of 7
S5J2187
750mA CMOS
Elektronische Bauelemente
Positive Voltage Regulator
Absolute Maximum Ratings
Parameter
Symbol
Ratings
Unit
Input Voltage
VIN
8
V
Output Current
IOUT
PD/(VIN-VO)
mA
Output Voltage
VOUT
Operating Ambient Temperature
Topr
Max. Junction Temperature
Tj Max.
o
T=100 C)
V
o
C
-40~+85
Tj
Junction Temperature
Power Dissipation (
Gnd-0.3~VIN+0.3
o
C
-40~+125
150
o
C
W
1.2
PD
EDS Classification
B
Electrical Characteristics T A=25
unless otherwise noted
(VIN=VOUT (T) + 2V, VEN=VIN, CIN=1uF, COUT=4.7uF)
Parameter
Output Voltage
Symbol
VOUT (E)
Output Current
Current Limit
Short Circuit Current
Load Regulation
IO
ILIM
ISC
REGLOAD
Dropout Voltage
VDROPOUT
Quiescent Current
Ground Pin Current
Line Regulation
Input Voltage
Over Temperature Shutdown
Over Temperature Hysterisis
Output Voltage
Temperature Coefficient
ADJ Input Bias Current
Minimum Load Current
ADJ Reference Voltage
Power Supply Rejection
Output Voltage Noise
EN Input Threshold
EN Input Bias Current
Shutdown Supply Current
(Note1)
IQ
IGND
REGLINE
Condition
Min
IO=1mA, VIN=VOUT(T)+2V
-1.5
VO>1.2V
750
VO>1.2V
750
VIN=VOUT(T)+1V, VO < 0.4V
-
VIN=VOUT(T)+2V, IO=1mA to 750mA
-1
VOUT(T)=1.5V
IO=750mA
VO=VOUT(E)-2%
TYP
Max
Unit
1.5
%
-
-
mA
-
-
mA
750
-
mA
0.2
1
%
-
-
1000
VOUT(T)=1.8V
-
-
650
VOUT(T) 2.0V
-
-
500
VOUT(T)
(Note2)
VIN=VOUT(T)+2V, IO=0mA
-
45
70
A
VIN=VOUT(T)+2V, IO=1mA to 750mA
-
45
-
A
VOUT(T)<2.0V
IO=1mA
VIN=VOUT(T)+1 to 2.0V VOUT(T)<4.0V
VOUT(T)+2
4.0V VOUT(T)
-0.15
-
0.15
-0.1
0.02
0.1
-0.4
-
0.4
VIN
OTS
OTH
Note3
-
7
-
150
-
-
30
-
TC
-
30
-
IADJ
ILoad
VREF
PSRR
mV
VIN=2.5V
Io=100mA
Co=4.7 F
(ceramic)
V
ppm/
-
1
-
A
-
-
70
A
V
1.221
1.240
1.26
f=1kHz
-
75
-
f=10kHz
-
55
-
f=100kHz
%
dB
-
30
-
eN
VEH
VEL
IEH
IEL
f=10Hz~100kHz, Io=10mA, Co=4.7 F
-
30
-
Vrms
VIN=2.7V to 7V
2.0
-
VIN
V
VIN=2.7V to 7V
0
-
0.4
V
VEN=VIN, VIN=2.7V to 7V
-
-
1
A
VEN= 0V, VIN=2.7V to 7V
-
-
1
A
ISD
VIN=5V, VO=0V, VEN<VEL
-
0.5
2
A
Note 1: V OUT (E) =Effective Output Voltage (i.e. the output voltage when “VOUT (T) + 2.0V” is provided at the VIN pin while maintaining a
certain IOUT value).
2: VOUT (T) =Specified Output Voltage
3: VIN (MIN) =VOUT+VDROPOUT
http://www.SeCoSGmbH.com/
01-Jun-2002 Rev. A
Any changing of specification will not be informed individual
Page 2 of 7
S5J2187
750mA CMOS
Elektronische Bauelemente
Positive Voltage Regulator
Ordering Information(contd.)
Part Number
Marking
Output Voltage
7HAD2
XXXX
Adjustable
S5 J 2187-AD
Part Number
Marking
Output Voltage
Detailed Description
The S5J2187 of COMS regulator contains a PMOS pass transistor, voltage reference, error amplifier, overcurrent protection, and thermal shutdown.
The P-channel pass transistor receives data from the error amplifier, over-current shutdown, and thermal
protection circuits. During normal operation, the error amplifier compares the output voltage to a precision
reference. Over-current and Thermal shutdown circuits become active when the junction temperature exceeds
140 , or the current exceeds 2.2A. During thermal shutdown, the output voltage remains low. Normal
operation is restored when the junction temperature drops below 120 .
The S5J2187 behaves like a current source when the load reaches 2.2A. However, if the load impedance
drops below 0.3ohms, the current drops back to 600mA to prevent excessive power dissipation. Normal
operation is restored when the load resistance exceeds 0.75ohms.
External Capacitors
The S5J2187 is stable with an output capacitance to ground of 4.7 F or greater. Ceramic capacitors have the
lowest ESR, and will offer the best AC performance. Conversely, Aluminum Electrolytic capacitors exhibit the
highest ESR, resulting in the poorest AC response. Unfortunately, large value ceramic capacitors are
comparatively expensive. One option is to parallel a 0.1 F ceramic capacitor with a 10uF Aluminum Electrolytic.
The benefit is low ESR, high capacitance, and low overall cost.
A second capacitor is recommended between the input and ground to stabilize VIN. The input capacitor should
be at least 0.1 F to have a beneficial effect.
All capacitors should be placed in close proximity to the pins. A “Quiet” ground termination is desirable. This
can be achieved with a “Star” connection.
Enable
When EN pin is pulled low, the PMOS pass transistor shuts off, and all internal circuits are powered down. In
this state, the quiescent current is less than 2 A. This pin behaves much like an electronic switch.
100K resistor is necessary between VEN source and EN pin when VEN is high than VIN.
(Note: There is no internal pull-up for EN pin. It can not be floating.)
Adjustable Version
The adjustable version uses external feedback resistors to generate an output voltage anywhere from 1.5V to
5.0V. Vadj is trimmed to 1.24V and Vout is given by the equation:
VOUT=Vadj * (1+R1/R2)
Feedback resistors R1 and R2 should be high enough to keep quiescent current low, but increasing R1+R2 will
reduce stability. In general, R1 and R2 in the 10’s of k will produce adequate stability, given reasonable
layout precautions. To improve stability characteristics, keep parasitic on the ADJ pin to minimum, and lower
R1 and R2 values.
ht tp://www.SeCoSGmbH.com/
01-Jun-2002 Rev. A
Any changing of specification will not be informed individual
Page 3 of 7
S5J2187
Elektronische Bauelemente
750mA CMOS
Positive Voltage Regulator
Characteristics Curve
http://www.SeCoSGmbH.com/
01-Jun-2002 Rev. A
Any changing of specification will not be informed individual
Page 4 of 7
S5J2187
Elektronische Bauelemente
http://www.SeCoSGmbH.com/
01-Jun-2002 Rev. A
750mA CMOS
Positive Voltage Regulator
Any changing of specification will not be informed individual
Page 5 of 7
S5J2187
Elektronische Bauelemente
ht tp://www.SeCoSGmbH.com/
01-Jun-2002 Rev. A
750mA CMOS
Positive Voltage Regulator
Any changing of specification will not be informed individual
Page 6 of 7
S5J2187
750mA CMOS
Elektronische Bauelemente
Positive Voltage Regulator
External Resistor Divider Table
R1(kΩ)
VOUT
1
413.33
3.20
0.63
1.27
3.16
6.33
12.65
225.45
3.25
0.62
1.23
3.08
6.17
12.34
77.50
155.00
3.30
0.60
1.20
3.01
6.02
12.04
59.05
118.10
3.35
0.59
1.18
2.94
5.88
11.75
23.85
47.69
95.38
3.40
0.57
1.15
2.87
5.74
11.48
8.00
20.00
40.00
80.00
3.45
0.56
1.12
2.81
5.61
11.22
3.44
6.89
17.22
34.44
68.89
3.50
0.55
1.10
2.74
5.49
10.97
3.02
6.05
15.12
30.24
60.49
3.55
0.54
1.07
2.68
5.37
10.74
1.70
2.7
5.39
13.48
26.96
53.91
3.60
0.53
1.05
2.63
5.25
10.51
1.75
2.43
4.86
12.16
24.31
48.63
3.65
0.51
1.03
2.57
5.15
10.29
1.80
2.21
4.43
11.07
22.14
44.29
3.70
0.50
1.01
2.52
5.04
10.08
1.85
2.03
4.07
10.16
20.33
40.66
3.75
0.49
0.99
2.47
4.94
9.88
1.90
1.88
3.76
9.39
18.79
37.58
3.80
0.48
0.97
2.42
4.84
9.69
1.95
1.75
3.49
8.73
17.46
34.93
3.85
0.48
0.95
2.38
4.75
9.50
2.00
1.63
3.26
8.16
16.32
32.63
3.90
0.47
0.93
2.33
4.66
9.32
2.05
1.53
3.06
7.65
15.31
30.62
3.95
0.46
0.92
2.29
4.58
9.15
2.10
1.44
2.88
7.21
14.42
28.84
4.00
0.45
0.90
2.25
4.49
8.99
2.15
1.36
2.73
6.81
13.63
27.25
4.05
0.44
0.88
2.21
4.41
8.83
2.20
1.29
2.58
6.46
12.92
25.83
4.10
0.43
0.87
2.17
4.34
8.67
2.25
1.23
2.46
6.14
12.28
24.55
4.15
0.43
0.85
2.13
4.26
8.52
2.30
1.17
2.34
5.85
11.70
23.40
4.20
0.42
0.84
2.09
4.19
8.38
2.35
1.12
2.23
5.59
11.17
23.34
4.25
0.41
0.82
2.06
4.12
8.24
2.40
1.07
2.14
5.34
10.69
21.38
4.30
0.41
0.81
2.03
4.05
8.10
2.45
1.02
2.05
5.12
10.25
20.50
4.35
0.40
0.80
1.99
3.99
7.97
2.50
0.98
1.97
4.92
9.84
19.68
4.40
0.39
0.78
1.96
3.92
7.85
2.55
0.95
1.89
4.73
9.47
18.93
4.45
0.39
0.77
1.93
3.86
7.73
2.60
0.91
1.82
4.56
9.12
18.24
4.50
0.38
0.76
1.90
3.80
7.61
2.65
0.88
1.76
4.40
8.79
17.59
4.55
0.37
0.75
1.87
3.75
7.49
2.70
0.85
1.70
4.25
8.49
16.99
4.60
0.37
0.74
1.85
3.69
7.38
2.75
0.82
1.64
4.11
8.21
16.42
4.65
0.36
0.73
1.82
3.64
7.27
2.80
0.79
1.59
3.97
7.95
15.90
4.70
0.36
0.72
1.79
3.58
7.17
2.85
0.77
1.54
3.85
7.70
15.40
4.75
0.35
0.71
1.77
3.53
7.07
2.90
0.75
1.49
3.73
7.47
14.94
4.80
0.35
0.70
1.74
3.48
6.97
2.95
0.73
1.45
3.63
7.25
14.50
4.85
0.34
0.69
1.72
3.43
6.87
3.00
0.70
1.41
3.52
7.05
14.09
4.90
0.34
0.68
1.69
3.39
6.78
3.05
0.69
1.37
3.43
6.85
13.70
4.95
0.33
0.67
1.67
3.34
6.68
3.10
0.67
1.33
3.33
6.67
13.33
5.00
0.33
0.66
1.65
3.30
6.60
3.15
0.65
1.30
3.25
6.49
12.98
R1(kΩ)
VOUT
1
2
5
10
1.30
20.67
41.33
103.33
206.67
1.35
11.27
22.55
56.36
112.73
1.40
7.75
15.50
38.75
1.45
5.90
11.81
29.52
1.50
4.77
9.54
1.55
4.00
1.60
1.65
20
R2(kΩ)=(1.24*R1(kΩ))/(VOUT-1.24)
2
5
10
20
R2(k Ω)=(1.242*R1(k Ω))/(VOUT-1.242)
Note: Small load (greater than 2mA) is necessary as R1 or R2 is larger than 50k Ω . Otherwise, output voltage probably can not be pulled
down to 0V on disable mode.
ht tp://www.SeCoSGmbH.com/
01-Jun-2002 Rev. A
Any changing of specification will not be informed individual
Page 7 of 7