SN54F521, SN74F521 8-BIT IDENTITY COMPARATORS SDFS091 – MARCH 1987 – REVISED OCTOBER 1993 Compares Two 8-Bit Words Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs SN54F521 . . . J PACKAGE SN74F521 . . . DW OR N PACKAGE (TOP VIEW) OE P0 Q0 P1 Q1 P2 Q2 P3 Q3 GND description These identity comparators perform comparisons on two 8-bit binary or BCD words. They provide P = Q outputs. The SN54F521 is characterized for operation over the full military temperature range of – 55°C to 125°C. The SN74F521 is characterized for operation from 0°C to 70°C. INPUTS P=Q L L P≠Q X H X H H P1 Q1 P2 Q2 P3 logic symbol† P0 P1 P2 P3 P4 P5 P6 P7 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC P=Q Q7 P7 Q6 P6 Q5 P5 Q4 P4 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 Q7 P7 Q6 P6 Q5 Q3 GND P4 Q4 P5 COMP 1 OE 2 Q0 P0 OE VCC OUTPUT P=Q OE 20 SN54F521 . . . FK PACKAGE (TOP VIEW) FUNCTION TABLE P, Q 1 P=Q • • 0 4 6 8 11 P 13 15 17 3 7 1P = Q 0 19 P=Q 5 7 9 12 Q 14 16 18 7 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Copyright 1993, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–1 SN54F521, SN74F521 8-BIT IDENTITY COMPARATORS SDFS091 – MARCH 1987 – REVISED OCTOBER 1993 logic diagram (positive logic) P7 Q7 P6 Q6 P5 Q5 P4 Q4 17 18 15 16 13 14 11 12 19 P3 Q3 P2 Q2 P1 Q1 P0 Q0 OE 2–2 8 9 6 7 4 5 2 3 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 P=Q SN54F521, SN74F521 8-BIT IDENTITY COMPARATORS SDFS091 – MARCH 1987 – REVISED OCTOBER 1993 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 1.2 V to 7 V Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 mA to 5 mA Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA Operating free-air temperature range: SN54F521 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74F521 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed. recommended operating conditions SN54F521 VCC VIH Supply voltage VIL IIK Low-level input voltage IOH IOL High-level output current Low-level output current TA Operating free-air temperature High-level input voltage SN74F521 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 2 2 Input clamp current – 55 UNIT V V 0.8 0.8 V – 18 – 18 mA –1 –1 mA 20 20 mA 70 °C 125 0 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VOL II IIH IIL IOS§ ICC TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V, II = – 18 mA IOH = – 1 mA VCC = 4.75 V, VCC = 4.5 V, IOH = – 1 mA IOL = 20 mA VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 2.7 V VCC = 5.5 V, VCC = 5.5 V, VI = 0.5 V VO = 0 SN54F521 TYP‡ MAX MIN SN74F521 TYP‡ MAX MIN – 1.2 2.5 3.4 – 1.2 2.5 3.4 0.5 0.3 0.5 V 100 100 µA 20 20 µA – 0.6 – 60 – 150 – 60 VCC = 5.5 V, See Note 2 21 32 21 ‡ All typical values are at VCC = 5 V, TA = 25°C. § Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. NOTE 2: ICC is measured with all inputs at 4.5 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V V 2.7 0.3 UNIT – 0.6 mA – 150 mA 32 mA 2–3 SN54F521, SN74F521 8-BIT IDENTITY COMPARATORS SDFS091 – MARCH 1987 – REVISED OCTOBER 1993 switching characteristics (see Note 3) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 5 V, CL = 50 pF, RL = 500 Ω, TA = 25°C VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX† ′F521 tPLH tPHL P or Q P=Q tPLH tPHL OE P=Q SN54F521 SN74F521 MIN TYP MAX MIN MAX MIN MAX 2.7 6.6 10 2.7 14 2.7 11 3.7 6.6 10 3.2 12 3.2 11 2.2 4.6 6.5 2.2 8.5 2.2 7.5 2.7 6.1 9 2.7 13.5 2.7 10 † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. NOTE 3: Load circuits and waveforms are shown in Section 1. 2–4 POST OFFICE BOX 655303 UNIT • DALLAS, TEXAS 75265 ns ns PACKAGE OPTION ADDENDUM www.ti.com 9-Oct-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty 5962-9759101Q2A ACTIVE LCCC FK 20 1 TBD 5962-9759101QRA ACTIVE CDIP J 20 1 TBD 5962-9759101QSA ACTIVE CFP W 20 1 TBD JM38510/34701B2A ACTIVE LCCC FK 20 1 TBD JM38510/34701BRA ACTIVE CDIP J 20 1 TBD JM38510/34701BSA ACTIVE CFP W 20 1 SN54F521J ACTIVE CDIP J 20 1 SN74F521DW ACTIVE SOIC DW 20 SN74F521DWE4 ACTIVE SOIC DW SN74F521DWG4 ACTIVE SOIC SN74F521DWR ACTIVE SN74F521DWRE4 Lead/Ball Finish MSL Peak Temp (3) POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type A42 N / A for Pkg Type POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type TBD A42 N / A for Pkg Type TBD A42 SNPB N / A for Pkg Type 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F521DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F521N ACTIVE PDIP N 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74F521N3 OBSOLETE PDIP N 20 TBD Call TI SN74F521NE4 ACTIVE PDIP N 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74F521NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F521NSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74F521NSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SNJ54F521FK ACTIVE LCCC FK 20 1 TBD SNJ54F521J ACTIVE CDIP J 20 1 TBD A42 SNPB N / A for Pkg Type SNJ54F521W ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type 20 20 Call TI POST-PLATE N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 9-Oct-2007 compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 4-Oct-2007 TAPE AND REEL BOX INFORMATION Device Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74F521DWR DW 20 SITE 41 330 24 10.8 13.0 2.7 12 24 Q1 SN74F521NSR NS 20 SITE 41 330 24 8.2 13.0 2.5 12 24 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 4-Oct-2007 Device Package Pins Site Length (mm) Width (mm) Height (mm) SN74F521DWR DW 20 SITE 41 346.0 346.0 41.0 SN74F521NSR NS 20 SITE 41 346.0 346.0 41.0 Pack Materials-Page 2 MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. 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