TC74LVX273F/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74LVX273F,TC74LVX273FT Octal D-Type Flip-Flop with Clear The TC74LVX273F/ FT is a high-speed CMOS octal D-flip flop fabricated with silicon gate CMOS technology. Designed for use in 3-V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. This device is suitable for low-voltage and battery operated systems. Information signals applied to D inputs are transferred to the Q outputs on the positive going edge of the clock pulse. When the CLR input is held low, the Q outputs are in the low logic level independent of the other inputs. An input protection circuit ensures that 0 to 5.5V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. TC74LVX273F TC74LVX273FT Features • High-speed: fmax = 150 MHz (typ.) (VCC = 3 V) • Low power dissipation: ICC = 4 μA (max) (Ta = 25°C) • Input voltage level: VIL = 0.8 V (max) (VCC = 3 V) VIH = 2.0 V (min) (VCC = 3 V) • • Power-down protection provided on all inputs ∼ tpHL Balanced propagation delays: tpLH − • Low niose: VOLP = 0.8 V (max) • Pin and function compatible with 74HC273 Weight SOP20-P-300-1.27A TSSOP20-P-0044-0.65A 1 : 0.22 g (typ.) : 0.08 g (typ.) 2007-10-17 TC74LVX273F/FT Pin Assignment (top view) IEC Logic Symbol CLR 1 20 VCC Q1 2 19 Q8 D1 3 18 D8 D2 4 17 D7 Q2 5 16 Q7 Q3 6 15 Q6 D3 7 14 D6 D4 8 13 D5 Q4 9 12 Q5 GND 10 11 CK CLR CK D1 D2 D3 D4 D5 D6 D7 D8 (1) (11) R C1 (3) (4) (7) (8) (13) (14) (17) (18) (2) (5) (6) (9) (12) (15) (16) (19) 1D Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Truth Table Inputs Outputs Function CLR D CK Q L X X L Clear H L L ⎯ H H H ⎯ H X Qn No change X: Don’t care System Diagram CLR 1 D1 3 D2 4 D R CK CK D3 7 D R CK Q D4 8 D R CK Q D5 13 D R CK Q D6 14 D R CK Q D7 17 D R CK Q D8 18 D R CK Q D R Q CK Q 11 2 5 Q1 6 Q2 9 Q3 12 Q4 2 Q5 15 Q6 16 19 Q7 Q8 2007-10-17 TC74LVX273F/FT Absolute Maximum Ratings (Note) Characteristics Symbol Rating Unit Supply voltage range VCC −0.5 to 7.0 V DC input voltage VIN −0.5 to 7.0 V VOUT −0.5 to VCC + 0.5 V Input diode current IIK −20 mA Output diode current IOK ±20 mA DC output current IOUT ±25 mA DC VCC/ground current ICC ±75 mA Power dissipation PD 180 mW Storage temperature Tstg −65 to 150 °C DC output voltage Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Operating Ranges (Note) Characteristics Symbol Rating Unit Supply voltage VCC 2.0 to 3.6 V Input voltage VIN 0 to 5.5 V VOUT 0 to VCC V Operating temperature Topr −40 to 85 °C Input rise and fall time dt/dv 0 to 100 ns/V Output voltage Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. 3 2007-10-17 TC74LVX273F/FT Electrical Characteristics DC Characteristics Characteristics H-level Symbol VIH ⎯ Input voltage L-level H-level VIL VOH Output voltage ⎯ IOH = −50 μA VIN = VIH IOH = −50 μA or VIL IOH = −4 mA IOL = 50 μA L-level VOL Ta = −40 to 85°C Ta = 25°C Test Condition VIN = VIH IOL = 50 μA or VIL IOL = 4 mA VCC (V) Min Typ. Max Min Max 2.0 1.5 ⎯ ⎯ 1.5 ⎯ 3.0 2.0 ⎯ ⎯ 2.0 ⎯ 3.6 2.4 ⎯ ⎯ 2.4 ⎯ 2.0 ⎯ ⎯ 0.5 ⎯ 0.5 3.0 ⎯ ⎯ 0.8 ⎯ 0.8 3.6 ⎯ ⎯ 0.8 ⎯ 0.8 2.0 1.9 2.0 ⎯ 1.9 ⎯ 3.0 2.9 3.0 ⎯ 2.9 ⎯ 3.0 2.58 ⎯ ⎯ 2.48 ⎯ 2.0 ⎯ 0 0.1 ⎯ 0.1 3.0 ⎯ 0 0.1 ⎯ 0.1 3.0 ⎯ ⎯ 0.36 ⎯ 0.44 Unit V V Input leakage current IIN VIN = 5.5 V or GND 3.6 ⎯ ⎯ ±0.1 ⎯ ±1.0 μA Quiescent supply current ICC VIN = VCC or GND 3.6 ⎯ ⎯ 4.0 ⎯ 40.0 μA Timing Requirements (input: tr = tf = 3 ns) Characteristics Minimum pulse width (CK) Minimum pulse width Symbol tW (L) tW (H) ⎯ tW (L) ⎯ Minimum set-up time ts ⎯ Minimum hold time th ⎯ trem ⎯ ( CLR ) Minimum removal time ( CLR ) Ta = 25°C Ta = −40 to 85°C VCC (V) Limit Limit 2.7 8.0 9.5 3.3 ± 0.3 5.5 6.5 2.7 7.5 8.5 3.3 ± 0.3 5.0 6.0 2.7 8.0 9.5 3.3 ± 0.3 5.5 6.5 Test Condition 4 2.7 1.0 1.0 3.3 ± 0.3 1.0 1.0 2.7 4.0 4.0 3.3 ± 0.3 2.5 2.5 Unit ns ns ns ns ns 2007-10-17 TC74LVX273F/FT AC Characteristics (input: tr = tf = 3 ns) Characteristics Symbol VCC (V) Propagation delay time (CK-Q) Propagation delay time tpLH CL (pF) Min Typ. Max Min Max 15 ⎯ 9.0 16.9 1.0 20.5 50 ⎯ 11.5 20.4 1.0 24.0 15 ⎯ 7.1 11.0 1.0 13.0 50 ⎯ 9.6 14.5 1.0 16.5 15 ⎯ 9.3 17.6 1.0 20.5 50 ⎯ 11.8 21.1 1.0 24.0 15 ⎯ 7.3 11.5 1.0 13.5 50 ⎯ 9.8 15.0 1.0 17.0 15 55 110 ⎯ 45 ⎯ 50 45 60 ⎯ 40 ⎯ 15 95 150 ⎯ 80 ⎯ 50 60 90 ⎯ 50 ⎯ 2.7 50 ⎯ ⎯ 1.5 ⎯ 1.5 3.3 ± 0.3 50 ⎯ ⎯ 1.5 ⎯ 1.5 2.7 ⎯ 3.3 ± 0.3 tpHL 2.7 tpHL ⎯ ( CLR -Q) 3.3 ± 0.3 2.7 Maximum clock frequency fmax ⎯ 3.3 ± 0.3 Output to output skew tosLH tosHL (Note 1) Ta = −40 to 85°C Ta = 25°C Test Condition Unit ns ns MHz ns Input capacitance CIN (Note 2) ⎯ 4 10 ⎯ 10 pF Power dissipation capacitance CPD (Note 3) ⎯ 31 ⎯ ⎯ ⎯ pF Note 1: Parameter guaranteed by design. (tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|) Note 2: Parameter guaranteed by design. Note 3: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption. Average operating current can be obtained by the equation: ICC (opr) = CPD･VCC･fIN + ICC/8 (per F/F) And the total CPD when n pcs. of F/F operate can be gained by the following equation: CPD (total) = 22 + 9･n 5 2007-10-17 TC74LVX273F/FT Noise Characteristics (Ta = 25°C, input: tr = tf = 3 ns, CL = 50 pF) Characteristics Typ. Limit Unit 3.3 0.5 0.8 V ⎯ 3.3 −0.5 −0.8 V VIHD ⎯ 3.3 ⎯ 2.0 V VILD ⎯ 3.3 ⎯ 0.8 V Symbol Test Condition Quiet output maximum dynamic VOL VOLP ⎯ Quiet output minimum dynamic VOL VOLV Minimum high level dynamic input voltage VIH Maximum low level dynamic input voltage VIL VCC (V) Input Equivalent Circuit INPUT 6 2007-10-17 TC74LVX273F/FT Package Dimensions Weight: 0.22 g (typ.) 7 2007-10-17 TC74LVX273F/FT Package Dimensions Weight: 0.08 g (typ.) 8 2007-10-17 TC74LVX273F/FT RESTRICTIONS ON PRODUCT USE 20070701-EN GENERAL • The information contained herein is subject to change without notice. • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. 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Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. 9 2007-10-17