UC1871 UC2871 UC3871 Resonant Fluorescent Lamp Driver FEATURES DESCRIPTION • 1µA ICC when Disabled • PWM Control for LCD Supply • Zero Voltage Switched (ZVS) on Push-Pull Drivers • Open Lamp Detect Circuitry • The UC1871 Family of IC’s is optimized for highly efficient fluorescent lamp control. An additional PWM controller is integrated on the IC for applications requiring an additional supply, as in LCD displays. When disabled the IC draws only 1µA, providing a true disconnect feature, which is optimum for battery powered systems. The switching frequency of all outputs are synchronized to the resonant frequency of the external passive network, which provides Zero Voltage Switching on the Push-Pull drivers. 4.5V to 20V Operation • Non-saturating Transformer Topology • Smooth 100% Duty Cycle on Buck PWM and 0% to 95% on Flyback PWM Soft-Start and open lamp detect circuitry have been incorporated to minimize component stress. An open lamp is detected on the completion of a soft-start cycle. The Buck controller is optimized for smooth duty cycle control to 100%, while the flyback control ensures a maximum duty cycle of 95%. Other features include a precision 1% reference, under voltage lockout, flyback current limit, and accurate minimum and maximum frequency control. BLOCK DIAGRAM Note: Pin numbers refer to DIL-18 and SOIC-18 packages only. 10/94 Powered by ICminer.com Electronic-Library Service CopyRight 2003 UDG-92061-1 UC1871 UC2871 UC3871 ABSOLUTE MAXIMUM RATINGS Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to +10V VCC, VC Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20V Zero Detect Input Current High Impedance Source . . . . . . . . . . . . . . . . . . +10mA Zero Detect Low Impedance Source. . . . . . . . . . . . . . . . . . . . . +20V Power Dissipation at TA = 25°C . . . . . . . . . . . . . . . . . . . 1W Storage Temperature . . . . . . . . . . . . . . . . -65°C to +150°C Lead Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C Note 1: Currents are positive into, negative out of the specified terminal. Note 2: Consult Packaging Section of Databook for thermal limitations and considerations of package. CONNECTION DIAGRAMS PLCC-20 (Top View) Q Package DIL-18, SOIC-18 (TOP VIEW) J or N, DW Package PACKAGE PIN FUNCTION FUNCTION PIN Gnd B Out A Out VC E/A 1 Comp SS E/A 1(-) N/C CT Zero Detect N/C VREF E/A 2(+) E/A 2(-) E/A 2 Comp VCC Enable Flyback ISENSE D Out C Out 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 ELECTRICAL CHARACTERISTICS Unless otherwise stated, these parameters apply for TA = -55°C to +125°C for the UC1871; -25°C to +85°C for the UC2871; 0°C to +70°C for the UC3871; VCC = 5V, VC = 15V, VENABLE = 5V, CT = 1nF, Zero Det = 1V. PARAMETER Reference Section Output Voltage Line Regulation Load Regulation Oscillator Section Free Running Freq Max Sync Frequency Charge Current Voltage Stability Temperature Stability Zero Detect Threshold Error Amp 1 Section Input Voltage Input Bias Current Open Loop Gain Output High Output Low Output Source Current Output Sink Current Common Mode Range Unity Gain Bandwidth Maximum Source Impedance Powered by ICminer.com Electronic-Library Service CopyRight 2003 TEST CONDITIONS TJ=25°C Overtemp VCC = 4.75V to 18V Io=0 to -5mA TJ=25°C TJ=25°C VCT = 1.5V VO = 2V MIN TYP MAX UNITS 2.963 2.940 3.000 3.000 3.037 3.060 10 10 V V mV mV 57 160 180 68 200 200 0.46 4 0.5 78 240 220 2 8 0.56 kHz kHz µA % % V 1.505 -2 V µA dB V V µA mA V MHz Ω 1.445 VO = 0.5 to 3V VEA(-) = 1.3V VEA(-) = 1.7V VEA(-) = 1.3V, Vo = 2V VEA(-) = 1.7V, Vo = 2V TJ = 25°C (Note 4) Note 5 2 65 3.1 -350 10 0 1.475 -0.4 90 3.5 0.1 -500 20 3.9 0.2 VIN-1V 1 100k UC1871 UC2871 UC3871 ELECTRICAL CHARACTERISTICS (cont.) Unless otherwise stated, these parameters apply for TA = -55°C to +125°C for the UC1871; -25°C to +85°C for the UC2871; 0°C to +70°C for the UC3871; VCC = 5V, VC = 15V, VENABLE = 5V, CT = 1nF, Zero Det = 1V. PARAMETER Open Lamp Detect Section Soft Start Threshold Error Amp Threshold Soft Start Current Error Amp 2 Section Input Offset Voltage Input Bias Current Input Offset Current Open Loop Gain Output High Output Low Output Source Current Output Sink Current Common Mode Range Unity Gain Bandwidth Isense Section Threshold Output Section Output Low Level Output High Level Rise Time Fall Time Output Dynamics Out A and B Duty Cycle Out C Max Duty Cycle Out C Min Duty Cycle Out D Max Duty Cycle Out D Min Duty Cycle Under Voltage Lockout Section Start-Up Threshold Hysterisis Enable Section Input High Threshold Input low Threshold Input Current Supply Current Section VCC Supply Current VC Supply Current ICC Disabled TEST CONDITIONS MIN TYP MAX UNITS 2.9 0.7 10 3.4 1.0 20 3.8 1.3 40 V V µA 0 -0.2 10 -1 0.5 mV µA µA dB V V µA mA V MHz VEA(-) = 0V VSS = 4.2V VSS = 2V VO = 2V VO = 0.5 to 3V VID = 100mV, VO = 2V VID = -100mv, VO = 2V VID = 100mV, VO = 2V VID = -100mV, VO = 2V 65 3.6 -350 10 0 TJ = 25°C (Note 4) VEA1(-) = 1V VEA1(-) = 2V VEA2(+)- VEA2(-) = 100mV VEA2(+)- VEA2(-) = -100mV 14.7 13.5 12.5 48 100 3.7 120 VIN-2V 0.525 0.575 V 0.05 0.1 1.5 14.9 14.3 13.5 30 30 0.2 0.4 2.2 V V V V V V ns ns 49.9 50 92 0 96 0 % % % % % 4.2 200 4.5 280 V mV 150 0.8 400 V V µA 8 7 1 14 12 10 mA mA µA 80 80 2 VENABLE = 5V VCC = 20V VC=20V VCC = 20V, VENABLE = 0V Note 3: Unless otherwise specified, all voltages are with respect to ground. Currents are positive into, and negative out of the specified terminal. Note 4: Guaranteed by design but not 100% tested in production. Note 5: Impedance below specified maximum guarantees proper operation of the Open Lamp Detect. Powered by ICminer.com Electronic-Library Service CopyRight 2003 4.4 0.2 1 0.475 IOUT = 0, Outputs A and B IOUT = 10mA IOUT = 100mA IOUT = 0, Outputs C and D IOUT = -10mA IOUT = -100mA TJ = 25°C, Cl = 1nF(Note 4) TJ = 25°C, Cl = 1nF(Note 4) 90 4 0.1 -500 20 3 UC1871 UC2871 UC3871 TYPICAL APPLICATION Figure 1 APPLICATION INFORMATION comparator senses the primary center-tap voltage, generating a synchronization pulse when the resonant waveform falls to zero. The actual threshold is 0.5 volts, providing a small amount of anticipation to offset propagation delay. Figure 1 shows a complete application circuit using the UC3871 Resonant Fluorescent lamp and LCD driver. The IC provides all drive, control and housekeeping functions to implement CCFL and LCD converters. The buck output voltage (transformer center-tap) provides the zero crossing and synchronization signal. The LCD supply modulator is also synchronized to the resonant tank. The synchronization pulse width is the time that the 4mA current sink takes to discharge the timing capacitor to 0.1 volts. This pulse width sets the LCD supply modulator minimum off time, and also limits the minimum linear control range of the buck modulator. The 200µA current source charges the capacitor to a maximum of 3 volts. A comparator blanks the zero detect signal until the capacitor voltage exceeds 1 volt, preventing multiple synchronization pulse generation and setting the maximum frequency. If the capacitor voltage reaches 3 volts (a zero detection has not occurred) an internal clock pulse is generated to limit the minimum frequency. The buck modulator drives a P-channel MOSFET directly, and operates over a 0-100% duty-cycle range. The modulation range includes 100%, allowing operation with minimal headroom. The LCD supply modulator also directly drives a P-channel MOSFET, but it’s duty-cycle is limited to 95% to prevent flyback supply foldback. The oscillator and synchronization circuitry are shown in Figure 2. The oscillator is designed to synchronize over a 3:1 frequency range. In an actual application however, the frequency range is only about 1.5:1. A zero detect Powered by ICminer.com Electronic-Library Service CopyRight 2003 4 UC1871 UC2871 UC3871 APPLICATION INFORMATION (cont.) UC3871 Oscillator Section Figure 2 requirements. A logic level enable pin shuts down the IC, allowing direct connection to the battery. During shutdown, the IC typically draws less than 1µA. The UC3871, operating from 4.5V to 20V, is compatible with almost all battery voltages used in portable computers. Under-voltage lockout circuitry disables operation until sufficient supply voltage is available, and a 1% voltage reference insures accurate operation. Both inputs to the LCD supply error amplifier are uncommitted, allowing positive or negative supply loop closure without additional circuitry. The LCD supply modulator also incorporates cycle-bycycle current limiting for added protection. A unique protection feature incorporated in the UC3871 is the Open Lamp Detect circuit. An open lamp interrupts the current feedback loop and causes very high secondary voltage. Operation in this mode will usually breakdown the transformer’s insulation, causing permanent damage to the converter. The open lamp detect circuit, shown in Figure 3 senses the lamp current feedback signal at the error amplifiers input, and shuts down the outputs if insufficient signal is present. Soft-start circuitry limits initial turn-on currents and blanks the open lamp detect signal. Other features are included to minimize external circuitry UC1871 Open Lamp Detect Circuitry Figure 3 UNITRODE INTEGRATED CIRCUITS 7 CONTINENTAL BLVD. • MERRIMACK, NH 03054 TEL. (603) 424-2410 • FAX (603) 424-3460 Powered by ICminer.com Electronic-Library Service CopyRight 2003 5 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. 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