TOREX XC25BS8034ER-G

XC25BS8 Series
ETR1506-007a
Ultra Small PLL Clock Generator ICs with Built-In Divider/Multiplier Circuits
■GENERAL DESCRIPTION
The XC25BS8 series is an ultra small PLL clock generator IC which can generate a high multiplier output up to 4095 from an input frequency as
low as 8kHz.
The series includes a divider circuit, phase/frequency comparator, charge pump, and VCO so it is possible to configure a fully
operational circuit with a few external components like one low-pass filter capacitor. The Input divider ratio (M) can be selected from a range of 1
to 2047, the output divider ratio (N) can be selected from a range of 1 to 4095 and they are set internally by using laser timing technologies.
Output frequency (fQ0) is equal to input clock frequency (fCLKin) multiplied by N/M. Output frequency range is 1MHz to 100MHz. Reference clock
from 8kHz to 36MHz can be input as the input clock. The IC stops operation and current drain is suppressed when a low level signal is input to the
CE pin which greatly reduces current consumption and produces a high impedance output.
The setting of the input divider ratio (M), output divider ratio (N), and charge pump current (Ip) are factory fixed semi-custom. Please advise your
Torex sales representative of your particular input/output frequency and supply voltage specifications so that we can see if we will be able to
support your requirements. The series is available in small SOT-26W and USP-6C.
■ APPLICATIONS
Clock for controlling a Imaging dot (LCD)
DSC (Digital still camera)
DVC (Digital video camera)
PND (Car navigation system)
UMPC (Ultra Mobile Personal Computer)
SSD (Solid State Disk)
Digital Photo Frame
Microcomputer and HDD drives
Cordless phones & Wireless communication
equipment
● Various system clocks
●
●
●
●
●
●
●
●
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■TYPICAL APPLICATION CIRCUIT
■FEATURES
Input Frequency Range
Output Frequency Range
Output Divider (N) Range
Input Divider (M) Range
Operating Voltage Range
Low Power Consumption
Small Packages
: 8kHz ~ 36MHz (*1)
: 1MHz ~ 100MHz
(fQ0=fCLKin × N/M) (*1)
: 1 ~ 4095 (*1)
: 1 ~ 2047(*1)
: 2.50V ~ 5.50V (*1)
: 10μA MAX. when stand-by (*2)
: SOT-26W, USP-6C
*1: The series are semi-custom products. Specifications for each
product are limited within the above range. The input frequency
range is set within ±5% of customer’s designated typical frequency.
Please note that setting of your some requirements may not be
possible due to the specification limits of this series.
*2: When the IC is in stand-by mode, the output becomes high impedance
and the IC stops operation.
■ TYPICAL PERFORMANCE
CHARACTERISTICS
PLL Output signal jitter 2 (tJ2) (synchronous to an input signal)
XC25BS8001xx (610 multiplier, input 15kHz (TYP.))
*1
Input Signal
Output jitter
tJ2=20(ns)
Output Signal
*1: CIN (by-pass capacitor, 0.1μF) and C1 ( LPF capacitor, 0.1μ
F) should be connected as close as possible to the IC. Please
refer to the pattern reference layout schematics on page 8 for
details.
1/14
XC25BS8Series
■PIN CONFIGURATION
Q0
VSS
6
5
CE
4
VDD
1
2
3
VDD
LPF
CLKin
SOT-26W
(TOP VIEW)
6
1 Q0
LPF 5
2 VSS
CLKin 4
3 CE
* The dissipation pad (TAB) of the
bottom view of the USP-6C package
should be connected to the VSS (No. 2)
pin.
USP-6C
(BOTTOM VIEW)
■PIN ASSIGNEMNT
PIN NUMBER
SOT-26W
USP-6C
6
5
4
3
2
1
1
2
3
4
5
6
PIN NAME
FUNCTION
Q0
VSS
CE
CLKin
LPF
VDD
Clock Output
Ground
Stand-by Control (*)
Reference Clock Signal Input
Device connection for Low Pass Filter
Power Input
■ FUNCTION LIST
2/14
CE
'H''
'L'' or OPEN
Q0
Signal Output
High Impedance
*H: High level input
L: Low level input (stand-by mode)
XC25BS8
Series
■ PRODUCT CLASSIFICATION
●Ordering Information
XC25BS8①②③④⑤-⑥
(*1)
(*2)
(*1)
DESIGNATOR
DESCRIPTION
SYMBOL
DESCRIPTION
①②③
Product Number
001~
Serial number based on internal standards
e.g. product number 001→①②③=001
④⑤-⑥
Packages
Taping Type (*2)
MR
MR-G
ER
ER-G
SOT-26W
SOT-26W (Halogen & Antimony free)
USP-6C
USP-6C (Halogen & Antimony free)
The “-G” suffix indicates that the products are Halogen and Antimony free as well as being fully RoHS compliant.
The device orientation is fixed in its embossed tape pocket. For reverse orientation, please contact your local Torex sales office or
representative. (Standard orientation: ④R-⑥, Reverse orientation: ④L-⑥)
■BLOCK DIAGRAM
VSS
Q0
Output
Buffer
CE
Rdn
1/N
Counter
VCO
Charge
Pump
Phase
Detector
1/M
Counter
VDD
LPF
C1
CLKin
C1:Low Pass Filter Ceramic Capacitor
(Please set as an external components between LPF Pin and VSS)
Recommended components (1608 Type);
C1:0.1μF ---- Taiyo yuden EMK107BJ104KA
■ABSOLUTE MAXIMUM RATINGS
Ta=25℃
PARAMETER
SYMBOL
RATINGS
UNITS
Supply Voltage
VDD
VSS - 0.3 ~ VSS + 7.0
V
CLKin Pin Input Voltage
VCK
VSS - 0.3 ~ VDD + 0.3
V
CE Pin Input Voltage
VCE
VSS - 0.3 ~ VDD + 0.3
V
Q0 Pin Output Voltage
VQ0
VSS - 0.3 ~ VDD + 0.3
V
Q0 Pin Output Current
IQ0
± 50
mA
250
mW
100
mW
Power Dissipation
SOT-26W
USP-6C
Pd
Operating Temperature Range
Topr
-40 ~+85
℃
Storage Temperature Range
Tstg
-55 ~+125
℃
3/14
XC25BS8Series
■ SELECTION GUIDE
*1: The table below introduces standard products. Please select with seeing the combination of input frequencies and multiplications.
The test condition: VDD=3.3V±10%
*2: For other input frequency and multiplication, please ask your Torex sales contacts.
Multiplication
64
128
192
256
384
512
768
Input Frequency
Synchronization
jitter
/ Output Period (%)
Product Series
MIN
~
MAX
Synchronization
jitter
32kHz
~
192kHz
36ns
10%
XC25BS8044
32kHz
~
192kHz
32ns
18%
XC25BS8027
32kHz
~
96kHz
24ns
14%
XC25BS8028
32kHz
~
48kHz
20ns
11%
XC25BS8057
32kHz
~
192kHz
30ns
25%
XC25BS8030
32kHz
~
96kHz
20ns
17%
XC25BS8031
32kHz
~
48kHz
16ns
14%
XC25BS8058
32kHz
~
192kHz
24ns
27%
XC25BS8033
32kHz
~
96kHz
22ns
25%
XC25BS8026
32kHz
~
48kHz
18ns
20%
XC25BS8025
32kHz
~
192kHz
21ns
36%
XC25BS8035
32kHz
~
96kHz
20ns
34%
XC25BS8036
32kHz
~
48kHz
18ns
30%
XC25BS8037
32kHz
~
96kHz
18ns
41%
XC25BS8039
32kHz
~
48kHz
16ns
36%
XC25BS8040
32kHz
~
96kHz
16ns
54%
XC25BS8042
32kHz
~
48kHz
14ns
47%
XC25BS8043
Amount of Jitter
Synchronization
/ Output Period (%)
Product Series
* Synchronization jitters are tested at fCLKIN=44.1kHz.
Multiplication
Input Frequency
MIN
~
MAX
Amount of Jitter
Synchronization
64
8kHz
~
16kHz
160ns
8%
XC25BS8045
128
8kHz
~
16kHz
140ns
14%
XC25BS8029
192
8kHz
~
16kHz
110ns
17%
XC25BS8032
256
8kHz
~
16kHz
100ns
20%
XC25BS8034
384
8kHz
~
16kHz
96ns
29%
XC25BS8038
512
8kHz
~
16kHz
52ns
21%
XC25BS8041
768
8kHz
~
16kHz
48ns
29%
XC25BS8046
Amount of Jitter
Synchronization
/ Output Period (%)
Product Series
8%
XC25BS8047
* Synchronization jitters are tested at fCLKIN=8kH.
Input Frequency
MIN
~
MAX
Amount of Jitter
Synchronization
1
8MHz
~
74MHz
7ns
2
6MHz
~
37MHz
6ns
11%
XC25BS8048
3
2MHz
~
24MHz
12ns
11%
XC25BS8049
4
2MHz
~
18MHz
7ns
8%
XC25BS8050
5
2MHz
~
14MHz
8ns
12%
XC25BS8051
6
2MHz
~
12MHz
7ns
13%
XC25BS8052
7
2MHz
~
10MHz
7ns
15%
XC25BS8053
8
2MHz
~
9MHz
6ns
14%
XC25BS8054
9
2MHz
~
8MHz
6ns
16%
XC25BS8055
10
2MHz
~
7MHz
7ns
21%
XC25BS8056
Multiplication
* Synchronization jitters are tested in the condition below.
For the XC258047 (1 Multiplication), fCLKIN =12MHz.
Except above, fCLKIN=3MHz is used.
4/14
For the XC258048(2 Multiplication), fCLKIN= 8MHz
XC25BS8
Series
■ELECTRICAL CHARACTERISTICS
●Recommended Operating Conditions: XC25BS8050xx (4 multiplication, Input 3MHz (TYP.)) 3.3V (TYP.)
O
Tested below Ta=25 C
PARAMETER
SYMBOL
CONDITIONS
Supply Voltage 3.3V
VDD
3.3V (TYP.) operation
2.97
3.63
V
Input Frequency
fCLKin
(*1)
2.000
18.500
MHz
Multiplier Ratio
N/M
Typical value is shown (*1)
fQ0
(*1)
8.000
74.000
-
15
pF
fCLKin=2.000MHz
0.05
20
ms
Output Frequency
Load Capacity
(*3)
MIN.
tSTART
UNITS
4
CL
Output Start Time (*2)(*3)
MAX.
MHz
NOTE:
*1: The values are measured when a capacitor CIN=0.1μF is connected between VDD and VSS pins,
a capacitor C1=0.1μF is connected
between LFP and VSS pins
*2: It is a time to get stable output signal from Q0 pin after the CE pin is turned on while applying supply voltage to the VDD pin and applying the
input signal to the CLKin pin.
*3: Values indicated are design values which are not guaranteed 100%.
●DC Characteristics: XC25BS8050xx (4 multiplication, Input 3MHz (TYP.)) 3.3V (TYP.)
PARAMETER
SYMBOL
H Level Input Voltage
CONDITIONS
Ta=25℃
MIN.
TYP.
MAX.
UNITS
CIRCUIT
VIH
2.70
-
-
V
①
L Level Input Voltage
VIL
-
-
0.60
V
①
H Level Input Current
IiH
VCLKin=VDD-0.3V
-
-
3.0
μA
②
L Level Input Current
IiL
VCLKin=0.3V
-3.0
-
-
μA
②
H Level Output Voltage
VOH
VDD=2.97V,IOH=-4mA
2.38
-
-
V
③
L Level Output Voltage
VOL
VDD=2.97V,IOL= 4mA
-
-
0.45
V
③
Supply Current 1
IDD1
VDD=3.63V,CE= 3.63V
-
5.0
10.0
mA
④
Supply Current 2
IDD2
VDD=3.63V,CE= 0.0V
-
-
10
μA
④
CE H Level Voltage
VCEH
2.70
-
-
V
①
CE L Level Voltage
VCEL
-
-
0.45
V
①
CE Pull-Down Resistance 1
Rdn1
CE= VDD
0.1
0.6
1.2
MΩ
⑤
CE Pull-Down Resistance 2
Rdn2
CE= 0.1*VDD
5
30
60
kΩ
⑤
Output Off Leak Current
IOZ
VDD=3.63V,CE= 0.0V
-
-
10
μA
⑥
NOTE:
TEST CONDITION: VDD=3.0V, fCLKin=3MHz, C1=0.1μF, Multiplier ratio=4, No load
●AC Characteristics: XC25BS8050xx (4 multiplication, 3MHz(TYP.)) 3.3V (TYP.)
PARAMETER
Output Rise Time
Output Fall Time
(*1)
(*1)
Output Signal Duty Cycle (*1)
Ta=25℃
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
CIRCUIT
tR
(20% ~ 80%)
-
4.0
8.0
ns
①
tF
(20% ~ 80%)
-
4.0
8.0
ns
①
①
Duty
PLL Output Signal Jitter 1
(*1)
tJ1
PLL Output Signal Jitter 2
(*1)
tJ2
1σ (Output Period)
Peak to Peak (Output Tracking)
45
50
55
%
-
45
-
ps
①
-
8.0
-
ns
①
NOTE:
TEST CONDITION: VDD=3.3V, fCLKin=3MHz, C1=0.1μF, Multiplier ratio=4, CL=15pF
*1: Values indicated are design values, which are not guaranteed 100%.
5/14
XC25BS8Series
■ELECTRICAL CHARACTERISTICS (Continued)
●Recommended Operating Conditions: XC25BS8025xx (256multiplication, Input 44.1kHz (TYP.)) 5.0V (TYP.)
O
Tested below Ta=25 C
PARAMETER
SYMBOL
CONDITIONS
MIN.
MAX.
Supply Voltage 5.0V
VDD
5.0V (TYP.) operation
4.50
5.50
V
Input Frequency
fCLKin
(*1)
32.000
48.000
kHz
Multiplier Ratio
N/M
Typical value is shown (*1)
Output Frequency
fQ0
(*1)
8.693
96.075
MHz
Load Capacity (*3)
CL
-
15
pF
0.05
20
ms
Output Start Time
(*2)(*3)
tSTART
UNITS
256
fCLKin=32.000kHz
NOTE:
*1: The values are measured when a capacitor CIN=0.1μF is connected between VDD and VSS pins,
a capacitor C1=0.1μF is connected
between LFP and VSS pins.
*2: It is a time to get stable output signal from Q0 pin after the CE pin is turned on while applying supply voltage to the VDD pin and applying
the input signal to the CLKin pin.
*3: Values indicated are design values which are not guaranteed 100%.
●DC Characteristics: XC25BS8025xx (256 multiplication, Input 44.1kHz (TYP.) ) 5.0V (TYP.)
PARAMETER
SYMBOL
H Level Input Voltage
VIH
CONDITIONS
Ta=25℃
MIN.
TYP.
MAX.
UNITS
CIRCUIT
4.00
-
-
V
①
L Level Input Voltage
VIL
-
-
1.00
V
①
H Level Input Current
IIH
VCLKin=VDD-0.5V
-
-
5.0
μA
②
L Level Input Current
IIL
VCLKin=0.5V
-5.0
-
-
μA
②
H Level Output Voltage
VOH
VDD=4.50V,IOH=-8mA
3.60
-
-
V
③
L Level Output Voltage
VOL
VDD=4.50V,IOL= 8mA
-
-
0.65
V
③
Supply Current 1
IDD1
VDD=5.50V,CE= 5.50V
-
6.5
13.0
mA
④
VDD=5.50V,CE= 0.0V
Supply Current 2
IDD2
-
-
20
μA
④
CE H Level Voltage
VCEH
4.00
-
-
V
①
CE L Level Voltage
VCEL
-
-
1.00
V
①
CE Pull-Down Resistance 1
Rdn1
CE= VDD
0.1
0.4
0.8
MΩ
⑤
CE Pull-Down Resistance 2
Rdn2
CE= 0.1*VDD
2
20
40
kΩ
⑤
Output Off Leak Current
IOZ
VDD=5.50V,CE= 0.0V
-
-
10
μA
⑥
NOTE:
TEST CONDITION: VDD=5.0V, fCLKin=44.1kHz, C1=0.1μF, Multiplier ratio=256, No load
●AC Characteristics: XC25BS8025xx (256 multiplication, Input 44.1kHz (TYP.)) 5.0V (TYP.)
Ta=25℃
PARAMETER
Output Rise Time
Output Fall Time
(*1)
(*1)
Output Signal Duty Cycle (*1)
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
CIRCUIT
tR
(20% ~ 80%)
-
2.5
5.0
ns
①
tF
(20% ~ 80%)
Duty
PLL Output Signal Jitter 1
(*1)
tJ1
PLL Output Signal Jitter 2
(*1)
tJ2
1σ (Output Period)
Peak to Peak (Output Tracking)
NOTE:
TEST CONDITION: VDD=5.0V, fCLKin=44.1kHz, C1=0.1μF, Multiplier ratio=256, CL=15pF
*1: Values indicated are design values, which are not guaranteed 100%.
6/14
-
2.5
5.0
ns
①
45
50
55
%
①
-
20
-
ps
①
-
18.0
-
ns
①
XC25BS8
Series
■NOTE ON USE
(1) Please use this IC within the stated absolute maximum ratings. The IC is liable to malfunction should the ratings be
exceeded.
(2) The series is an analog IC. Please use a 0.01μF to 0.1μF of a by-pass capacitor.
(3) The constant of the LPF element of this IC is preset. Always use the capacitance value (=0.1μF) specified by us for
the external ceramic capacitor (C1) for LPF. Operating this IC with a capacitor of the wrong capacitance will cause
erroneous operation.
(4) Rq0 shown in the Typical Application Circuit is a matching resistor. The use is recommended in order to counter
unwanted radiations.
(5) Please place the by-pass capacitor and the matching resistor as close to the IC as possible. The IC may not operate
normally if the by-pass capacitor is not close enough to the IC. Further, the unwanted radiation may occur between
the resistor and the IC pin if the matching resistor is not close enough to the IC.
(6)When the CE pin is not controlled by external signals, it is recommended that a time constant circuit of R1=1kΩ ×C2
= 0.1μF be added for stability.
(7) With this IC, output is achieved by dividing and multiplying the reference oscillation by means of the PLL circuit. In
cases where this output is further used as a reference oscillation of another PLL circuit, it may be that the final output
signal's jitter increases; therefore, all necessary precautions should be taken to avoid this.
(8) It is recommended that a low noise power supply, such as a series regulator, be used as the series’ supply voltage.
Using a power supply such as a switching regulator may enlarge the jitter, which in turn may lead to abnormal
operation. Please confirm its operation with the actual device.
(9) For operating the IC normally, please take procedures below when applying voltage to the series’ input pin:
1) Apply power source while the CE pin is "L" level with no clock input (high-Impedance or “L”),
2) Input the clock,
3) At least 100μs after applying clock input, change the CE pin into “H” level and then to enable.
The IC has to be started by inputting the clock once the power rises completely. The CE pin, then, should be enabling.
If the CE pin becomes enable and the clock is inputted before the power rises completely, an internal reset circuit
does not operate normally which may cause to generate extraneous frequency.
●eg.)Matching Resistance (Rq0) and Device for Time constant circuit (R1,C2)are connected,
(Package: SOT-26W)
7/14
XC25BS8Series
■NOTE ON USE (Continued)
●Instructions on Pattern Layout
1. In order to stabilize VDD voltage level, we recommend that a by-pass capacitor (CIN) be connected as close as possible to
the VDD and VSS pins.
2. Please mount the low pass filter capacitor C1(=0.1μF) as close to the IC as possible.
3. Make the pattern as close to the IC as possible and use thick, short connecting traces to reduce the circuit impedance.
4. Make sure that the VSS (GND) traces are as thick as possible, as variations in ground potential caused by noise may
result in instability of this product.
< Reference pattern layout >
* We prepare the evaluation board PCB, which is designed by the below layout pattern.
1. SOT-26W Reference Pattern Layout
VDD
VSS
CE
IC
CIN
CL
QO
C1
CLK
TOREX XC25BS8
8/14
2. USP-6C Reference Pattern Layout
XC25BS8
Series
■TEST CIRCUIT
Determination,
etc of output frequency and duty
出力周波数とDutyの判定その他
①Operating Supply Voltage
H Level Input Voltage
L Level Input Voltage
CE “H” Level Voltage
CE “L” Level Voltage
Output Rise Time
Output Fall Time
Output Signal Duty
PLL Output Signal Jitter 1
PLL Output Signal Jitter 2
Determination, etc of CE input voltage
CE入力電圧の測定その他
②H Level Input Current
L Level Input Current
③H Level Output Voltage
L Level Output Voltage
Checking output waveform
When measuring VOL: turn the switch on to R1
When measuring VOH: turn the switch on to R2
VDD
pulse
Input
in CLK
Q0
SW
CLKin
VSS
LPF
CE
R2
R1
C1
When measuring VOH
Q0 output waveform
When measuring VOL
Q0 output waveform
9/14
XC25BS8Series
■TEST CIRCUIT (Continued)
④Supply Current 1
Supply Current 2
VDD
A
Q0
CLKin
pulse
Input
CLK
in
VSS
LPF
CE
SW=”H” ::
IIDD1測定
DDI measurement
SW=”H”
measurement
SW=”L” ::
IDD2
SW=”L”
IDD2測定
SW=”L”
C1
⑤CE Pull-Down Resistance 1
Measuring IRdn1
Rdn1=VDD / IRdn1
Measuring IRdn2
Rdn2=(0.1 x VDD) / IRdn2
CE Pull-Down Resistance 2
⑥Output Off Leak Current
VDD
Q0
A
CE
VSS
LPF
CLKin
C1
10/14
XC25BS8
Series
■AC CHARACTERISTICS TEST WAVEFORM
1) Output Rise Time, Output Fall Time
Output Waveform
DUTY Test Level
Q0 Output Signal Waveform
tR
tF
2) Duty Cycle
Output Waveform
Q0 Output Signal
Duty Cycle
Measurement
Level
DUTY
測定レベル
Duty Cycle =(TW / T)×100(%)
3) Output Start Time
CE Input Signal Waveform
tSTART
Q0 Output Signal Waveform
11/14
XC25BS8Series
■TYPICAL PERFORMANCE CHARACTERISTICS
●Synchronous Output Frequency vs. Supply Voltage
XC25BS8001xx (610 multiplication, Input 15kHz(TYP.))
XC25BS8001(N/M=610) fQ0 vs VDD
30
fQ0(MHz)
25
MAX_Q0
20
15
85℃
25℃
10
-40℃
5
MIN_Q0
0
2.0
12/14
2.5
3.0
3.5
4.0
4.5
VDD(V)
5.0
5.5
6.0
XC25BS8
Series
■PACKAGE INFORMATION
●SOT-26W
●USP-6C
外形図
(unit : mm)
2.9±0.2
0.4
+0.1
-0.05
6
5
4
2
1
MIN0.1
2.8±0.2
1.8±0.2
0~0.1
3
(0.95)
+0.1
0.15 -0.05
1.3MAX
1.1±0.1
1.9±0.2
SOT-26W Package
* No. 1 pin is wider than the other pins.
Soldering fillet surface is not formed because the
sides of the pins are not plated.
●USP-6C Reference Pattern Layout
●USP-6C 推奨パターン寸法
●USP-6C Reference Metal Mask Design
参考)推奨メタルマスクデザイン
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XC25BS8Series
1. The products and product specifications contained herein are subject to change without
notice to improve performance characteristics.
Consult us, or our representatives
before use, to confirm that the information in this datasheet is up to date.
2. We assume no responsibility for any infringement of patents, patent rights, or other
rights arising from the use of any information and circuitry in this datasheet.
3. Please ensure suitable shipping controls (including fail-safe designs and aging
protection) are in force for equipment employing products listed in this datasheet.
4. The products in this datasheet are not developed, designed, or approved for use with
such equipment whose failure of malfunction can be reasonably expected to directly
endanger the life of, or cause significant injury to, the user.
(e.g. Atomic energy; aerospace; transport; combustion and associated safety
equipment thereof.)
5. Please use the products listed in this datasheet within the specified ranges.
Should you wish to use the products under conditions exceeding the specifications,
please consult us or our representatives.
6. We assume no responsibility for damage or loss due to abnormal use.
7. All rights reserved. No part of this catalog may be copied or reproduced without the
prior permission of TOREX SEMICONDUCTOR LTD.
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