ZC0301 VGA & CIF USB PC Camera Controller ZC0301 VGA USB PC Camera Controller Vimicro Corporation Preliminary Data Sheet Vimicro Corporation reserves the right to make changes without further notice to any product herein to improve reliability, function or design. Vimicro does not assume any liability arising out of the application or use of any project, circuit described herein; neither does it convey any license under its patent nor the right of others. This document contains information of a proprietary nature. None of this information shall be divulged to persons other than Vimicro Microelectronics Corporation employee authorized by the nature of their duties to receive such information, or individuals or organizations authorized by Vimicro Corporation. 1 Mar. 2002 ZC0301 VGA & CIF USB PC Camera Controller Contents 1. Features.................................................................................................. 4 2. Architecture ........................................................................................... 5 2.1. System Controller.................................................................................................................. 5 2.2. Image Signal Processor......................................................................................................... 5 2.3. Sub-Sample & Raster ........................................................................................................... 5 2.4. JPEG Encoder ....................................................................................................................... 6 2.5. USB Device Controller.......................................................................................................... 6 3. Pin Definition ......................................................................................... 7 3.1. Pin Assignment...................................................................................................................... 7 3.2. Pin Description ...................................................................................................................... 7 4. Electrical Characteristics...................................................................... 9 4.1. Absolute Maximum Ratings................................................................................................. 9 4.2. DC Characteristics ................................................................................................................ 9 4.3. USB Transceiver AC Characteristics .................................................................................. 9 4.4. RESET Timing AC Characteristics................................................................................... 10 4.5. Clock AC Characteristics ................................................................................................... 10 4.6. Input Signal AC Characteristics........................................................................................ 11 5. Register Table (Vendor Commands)...................................................11 6. Mechanical Information ..................................................................... 12 Appendix I Sensor Interface Description ................................................ 13 2 Mar. 2002 ZC0301 VGA & CIF USB PC Camera Controller Illustrations FIGURE 1 USB PC CAMERA SYSTEM BLOCK DIAGRAM.......................................................4 FIGURE 2 ZC0301 FUNCTIONAL BLOCK DIAGRAM ..............................................................5 FIGURE 3 28-PIN PLCC PACKAGE........................................................................................7 FIGURE 4 RESET TIMING AC CHARACTERISTICS DIAGRAM ............................................ 10 FIGURE 5 CLOCK TIMING AC CHARACTERISTICS DIAGRAM ............................................. 10 FIGURE 6 INPUT SIGNAL TIMING AC CHARACTERISTICS DIAGRAMS ................................ 11 FIGURE 7 28-PIN PLCC PACKAGE DIAGRAM .................................................................... 12 Tables TABLE 1 SENSOR INTERFACE (15 PINS) ................................................................................7 TABLE 2 USB HOST INTERFACE (2 PINS) .............................................................................8 TABLE 3 CLOCK, RESET, AND MISCELLANEOUS (5 PINS).....................................................8 TABLE 4 POWER AND GROUND (6 PINS)...............................................................................8 TABLE 5 MAXIMUM RATINGS ...............................................................................................9 TABLE 6 DC CHARACTERISTICS ..........................................................................................9 TABLE 7 FULL-SPEED DRIVER ELECTRICAL CHARACTERISTICS ...........................................9 TABLE 8 LOW-SPEED DRIVER ELECTRICAL CHARACTERISTICS............................................9 TABLE 9 RESET SIGNAL AC CHARACTERISTICS ................................................................ 10 TABLE 10 CLOCK SIGNAL AC CHARACTERISTICS ............................................................. 10 TABLE 11 INPUT SIGNAL AC CHARACTERISTICS............................................................... 11 TABLE 12 SYSTEM CONTROL REGISTER ............................................................................ 11 TABLE 13 ZC0301 PACKAGE DIMENSION ......................................................................... 12 3 Mar. 2002 ZC0301 VGA & CIF USB PC Camera Controller 1. Features VSYNC HSYNC DATA[7:0] PCLK ZC0301 ENB USB CABLE Serial Interface PC HYUNDAI CMOS IMAGE SENSORS MCLK (48MHZ) CRYSTAL OSCILLATOR Figure 1 USB PC Camera System Block Diagram With a miniature 28-Pin PLCC package and without external DRAM, ZC0301 provides a cost effective single chip solution for PC camera application. All major image processing functions, image data compression, and data transfer units are built in the chip. The ZC0301 chip communicates with PC host via Universal Serial Bus (USB) port. • • • • • • • • • • • • • • • • • • • 4 Provide most cost effective PC camera solution with 28-pin package Support VGA CMOS sensors from Hyundai Support up to 15 fps VGA video display without DRAM USB Device Controller compliant with USB Protocol 1.1 Support pan function based on 8x8 pixels unit Support 8-bit RGB Bayer pattern raw data input from CMOS image sensors Support 2-wire control interface to CMOS image sensor Support programmable color correction and gamma correction Support AE/AWB and programmable AE/AWB windows Support automatic CMOS sensor Reset Level Control Support automatic Gain Control Support auto/manual Histogram Equalization Support 2x2 Sub-Sampling Support ISO/IEC 10918-1 (JPEG) standard image compression Support JPEG File Interchange Format (JFIF) compressed image data output Support 2 AC and 2 DC Huffman code table Support 4 quantization tables for programmable image quality Adjustable compression ratio Support Custom-ID option Mar. 2002 ZC0301 VGA & CIF USB PC Camera Controller 2. Architecture ISP CMOS image sensor Subsample & Raster JPEG Encoder USB Device Controller PC host System Controller ZC0301 Figure 2 ZC0301 Functional Block Diagram The ZC0301 consists of five major function blocks, System Controller, Image Signal Processor, Sub-Sample & Raster, JPEG Encoder, and USB Device Controller, as illustrated in Figure 1. These blocks provide the following functions. 2.1. System Controller • • • • Providing the control to ISP, JPEG, and USB blocks Configuring the control registers Chip clock generation Error control for the data block through USB interface 2.2. Image Signal Processor • • • • • • • • • • • • Dedicated sensor control and signal processing module. Serial-Bus interface for CMOS Image Sensor 8 bit Bayer format image input 3x3 Interpolation Color Correction Gamma Correction Automatic Exposure Control Automatic White Balance Control Programmable AE windows Automatic Reset Level Control RGB to YCrCb Color Space Convert Histogram Equalization Logic 2.3. Sub-Sample & Raster • 5 The input data format is 4:4:4 for Y component, Cb component and Cr component. The three components for a pixel are input simultaneously. Mar. 2002 ZC0301 VGA & CIF USB PC Camera Controller • • • The output data format is in 4:2:2 for the three components. The output sequence is Y,Y,Cb,Cr for the three components. When scale option is deserted, the output pixel number is the same as the input pixel number; when scale option is asserted, the output pixel number is 1/4 of the pixel number of input image. Change input image data format to 8x8 block data format required by DCT module. 2.4. JPEG Encoder • • Providing register control for image size, compression rate and the image quantity. Compliant with ISO/IEC 10918-1 standard. 2.5. USB Device Controller • • • • • • • • 6 Compliant with USB protocol 1.1 Support full speed USB device Clock and data recovery from USB Bit stripping/stuffing and NRZI decoder/encoder Check all possible error conditions, including CRC error, bit stuffing error, PID error, as well as synchronization error Support all standard request and vendor/class request Configuration can be changed easily to support different applications Support suspend mode Mar. 2002 ZC0301 VGA & CIF USB PC Camera Controller 3. Pin Definition SCK SDA CS_D[2] CS_D[1] CS_D[0] TEST PWUP_RST# 25 24 23 22 21 20 19 3.1. Pin Assignment CLKXIN 26 18 SNAPB CLKXOUT 27 17 DVDD OVSS 28 16 VDD_USB CS_CLK 1 15 D− OVDD 2 14 D+ CS_D[3] 3 13 VSS_USB CS_D[4] 4 12 DVSS 5 6 7 8 9 10 11 CD_D[5] CS_D[6] CS_D[7] CS_RESET# CS_ENB HSYNC VSYNC ZC0301 Figure 3 28-Pin PLCC Package 3.2. Pin Description Table 1 Sensor Interface (15 Pins) Signal CS_D[5] CS_D[6] CS_D[7] CS_RESET# CS_ENB HSYNC VSYNC CS_D[0] CS_D[1] CS_D[2] SDA/ESDA 7 Function Sensor data Sensor data Sensor data Sensor reset Sensor power enable Horizontal sync Vertical sync Sensor data Sensor data Sensor data IIC/EEPROM data Type I/O, PD I, PD I, PD O I/O I, PD I, PD I, PD I, PD I, PD I/O, Schmitt 28 PLCC Pin # 5 6 7 8 9 10 11 21 22 23 24 Mar. 2002 ZC0301 VGA & CIF USB PC Camera Controller SCK/ESCK CS_CLK CS_D[3] CS_D[4] IIC/EEPROM clock Sensor clock Sensor data Sensor data O O I/O, PD I/O, PD 25 1 3 4 Table 2 USB Host Interface (2 Pins) Signal D+ D− Function USB data USB data Type I/O I/O 28 PLCC Pin # 14 15 Table 3 Clock, Reset, and Miscellaneous (5 Pins) Signal SNAPB PWUP_RST# TEST CLKXIN CLKXOUT Function Snap, scan in Power-on reset Manufacturing test enable, Tied to GND on board Crystal input Crystal output Type I, PU I, Schmitt I, PD I O 28 PLCC Pin # 18 19 20 26 27 Table 4 Power and Ground (6 Pins) Signal DVSS VSS_USB VDD_USB DVDD OVSS OVDD 8 Function Core ground USB transceiver ground USB transceiver power Core power (2.5V) I/O ground I/O power (3.3V) Type P P P P P P 28 PLCC Pin # 12 13 16 17 28 2 Mar. 2002 ZC0301 VGA & CIF USB PC Camera Controller 4. Electrical Characteristics 4.1. Absolute Maximum Ratings Table 5 Maximum Ratings 0oC to 70oC -40oC to 125oC -0.3V to 3.6V -0.3V to VDD + 0.3V Ambient temperature Storage temperature DC supply voltage I/O pin voltage with respect to VSS 4.2. DC Characteristics Table 6 DC Characteristics Symbol VDD3V VDD2V Vil Vih Vol Voh Ipd Parameter 3.3V Power Supply 2.5V Power Supply Input Low voltage Input High voltage Output Low Voltage Output High Voltage Powerdown current (suspend current) Active current Ido 4.3. Conditions Min 3.0 2.25 -0.5 2.3 2.4 - Max 3.6 2.75 1.0 5.5 0.4 500 - 60 Unit V V V V V V uA mA USB Transceiver AC Characteristics Table 7 Full-Speed Driver Electrical Characteristics Symbol TFR TFF TFRFF Parameter Rise time Fall time Rise and fall time matching Conditions CL=50p CL=50p TLRLF=TLR/TLF Min Typ Max 4 20 4 20 90 111.11 Unit ns ns % Table 8 Low-Speed Driver Electrical Characteristics Symbol Parameter TLR Rise time 9 TLF Fall time TLRLF Rise and fall time matching Conditions CL=50p CL=600p CL=50p CL=600p TLRLF=TLR/TLF Min Typ Max 75 300 75 300 80 125 Unit ns ns % Mar. 2002 ZC0301 VGA & CIF USB PC Camera Controller 4.4. RESET Timing AC Characteristics Reset Trst Figure 4 RESET Timing AC Characteristics Diagram Table 9 Reset Signal AC Characteristics Symbol Trst 4.5. Parameter Reset Pulse Width Conditions Min 100 Max - Unit ms Conditions Min 48@10PPM - Max - Unit Mhz Clock AC Characteristics Thigh Tlow clock Tcyc Figure 5 Clock Timing AC Characteristics Diagram Table 10 Clock Signal AC Characteristics Symbol 1/Tcyc Thigh Tlow 10 Parameter Oscillator Frequency Oscillator Clock High Time Oscillator Clock Low Time 8.3 - Ns 8.3 - Ns Mar. 2002 ZC0301 VGA & CIF USB PC Camera Controller 4.6. Input Signal AC Characteristics clock Th Tsu valid data data input Figure 6 Input Signal Timing AC Characteristics Diagrams Table 11 Input Signal AC Characteristics Symbol Tsu Th Parameter Input setup time Input hold time Conditions Min 18 0 Max - Unit ns ns 5. Register Table (Vendor Commands) Table 12 System Control Register Address 0180H 0181H 0183H 0184H 0185H 0186H 0187H 0188H 0189H 018AH 018BH 018DH 018EH 018FH 0190H 0191H 0192H 11 Symbol SysCon SysOp ImWidthH ImWidthL ImHeightH ImHeightL TbrcReg QuanReg LEVEL1_ADDR LEVEL2_ADDR LEVEL3_ADDR CustomID FrameConEn Frame State LEVEL1Data_add LEVEL2Data_add LEVEL3Data_add Register Name System control register System enable register Image width high byte Image width low byte Image height high byte Image height low byte JPEG BRC register JPEG Quantization register Target image size for state 1 Target image size for state 2 Target image size for state 3 Custom ID Frame Control Enable Frame Control State Hblank value for state 1 Hblank value for state 2 Hblank value for state 3 Default 00H 00H 02H 80H 01H E0H 00H 00H 40H 60H 80H 01H 0AH 1BH 3CH Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W RO R/W RO R/W R/W R/W Mar. 2002 ZC0301 VGA & CIF USB PC Camera Controller 6. Mechanical Information Figure 7 28-Pin PLCC Package Diagram Table 13 ZC0301 Package Dimension Lead Count Body Size Stand-Off Body Thickness Lead Width Lead Thickness Lead Pitch D1 E1 A1 A2 b c e 28 453 453 20 150 17 10 50 Unit: mil (1mil = 1/1000 inch) 12 Mar. 2002 ZC0301 VGA & CIF USB PC Camera Controller Appendix I Sensor Interface Description ZC0301 supports Hyundai VGA format sensors (HV7131B). 1. INPUT / OUTPUT AC CHARACTERISTICS All output timing delays are measured with output load 60pF Output delay includes the internal clock path delay [6ns] and output driving delay that changes in respect to the output load, the operating environments, and a board design. Due to the variable valid time delay of the output, output signals may be latched in the negative edge of MCLK for the stable data transfer between the image sensor and a host for less than 15MHz operation. 2. MCLK TO HSYNC / VSYNC Timing FIGURE 8.1-1 MCLK TO HSYNC/VSYNC TIMING DIAGRAM T1: MCLK RISING TO HSYNC/VSYNC valid maximum Time: 18ns [output load: 60pF] T2: HSYNC/VSYNC valid Time: minimum 1 clock (subject to T1, T2 timing rule ) 3. MCLK to DATA Timing FIGURE 8.1-2 MCLK TO DATATIMING DIAGRAM T3: MCLK rising to DATA Valid maximum Time: 18ns [output load:60pF] Note: HSYNC signal is high when valid data is on the DATA bus. 4. ENB Timing FIGURE 8.1-3 ENB TIMING DIAGRAM 13 Mar. 2002 ZC0301 VGA & CIF USB PC Camera Controller T4: ENB Setup Time: 5[ns] T5: ENB Hold Time: 5[ns] T6: ENB Valid Time: minimum 2 Clock 5. RESET Timing Must in Valid (active low) state at least 8 MCLK periods 6. I2C Bus (Programming Serial Bus) Timing 7. I2C Bus Interface Timing FIGURE 8.1-4 I2C BUS TIMING DIAGRAM Parameter SCK clock frequency Time that I2C bus must be free before a new transmission can start Hold time for a START LOW period of SCK HIGH period of SCK Setup time for START Data hold time 14 Symbol fsck tbuf Min 0 1.2 Max. 400 - Unit KHz Us thd;Sta tlow thigh tsu;Sta thd;dat 1.0 1.2 1.0 1.2 1.3 - Us Us Us Us Us Mar. 2002 ZC0301 VGA & CIF USB PC Camera Controller tsu;dat tr tf tsu;Stp Cb Data setup time Rise time of both SDA and SCK Fall time of both SDA and SCK Setup time for STOP Capacitive load of each bus lines (SDA, SCK) 250 1.2 - 250 300 - Ns Ns Ns Us Pf Table 8.1 I2C Bus Interface Timing 8. Connection for HV7131B MCLK CS_CLK VSYNC VSYNC HSYNC HSYNC DATA[7:0] CS_D[7:0] SCK SCK 3.3V 4.7K SDA SDA HV7131B ZC0301 FIGURE 8.1-5 PERIPHERAL CONNECTION DIAGRAM Note: 1. For Hyundai sensor, RESETB is active LOW. 15 Mar. 2002