TI1 DEM-SOT223LDO Circuit schematic Datasheet

DEM−SOT223LDO
www.ti.com
SBVU005 − OCTOBER 2003
DESCRIPTION
1
VIN
EN
2
5
4
VOUT
C1
J1
2
2
1
2
(a) Circuit Configuration, Pinout A
U1
4
1
5
VOUT
2
J1
4
R3
J2
VIN
J5
2
R3
2
2
C1
R4/C4
3
1
J5
EN
1
R1
2
GND
2
GND
1
2
FB
J6
R2/C3
1
J4
5
J5
1
J3
GND
C2
1
1
1
1
R1
3
J2
U1
J2
1
2
J4
CIRCUIT
The schematic in Figure 1 illustrates all the possible
connections available to evaluate LDOs in the SOT223
(DCQ) package. Depending on the LDO being evaluated,
different components can be omitted. Each model may
only use some of the components. The schematics in
Figure 2 illustrate the connections required to evaluate the
two common LDO pinouts in the SOT223 package.
U1
J1
The Texas Instruments DEM−SOT223LDO demonstration module (DEM) helps designers evaluate the operation
and performance of Texas Instrument’s low-dropout regulators (LDOs). This module is compatible with most positive output LDOs offered in the SOT223 (DCQ) package.
C2
R2/C3
J4
3
1
1
2
2
FB
2
J3
J3
J6
R2/C3
C2
1
GND
1
2
J6
R4/C4
1
1
2
2
GND
GND
2
GND
(b) Circuit Configuration, Pinout B
Figure 1. Circuit Schematic
Figure 2. Example Board Configurations for
Evaluating SOT223 LDOs
COMPONENTS
This DEM is specifically designed to be assembled using
surface-mount devices with footprints ranging from 0603
to 1210. Additional holes have been provided to
accommodate leaded components. When selecting
components, refer to the product datasheet for specific
guidelines.
BOARD LAYOUT
This DEM is a two-layer printed circuit board (PCB). The
LDO is grounded through pin 3 to the top ground plane.
The bottom layer of the PCB also provides extra pads
where additional surface-mount components can be
added in parallel to the top-side components. Figure 3
shows the top assembly layer for the PCB.
Figure 3. PCB Layout − Top Assembly
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