High Stability Isolated Error Amplifier ADuM4190 Data Sheet FEATURES GENERAL DESCRIPTION Stable over time and temperature 0.5% initial accuracy 1% accuracy over the full temperature range Compatible with Type II or Type III compensation networks Reference voltage: 1.225 V Compatible with DOSA Low power operation: <7 mA total Wide voltage supply range VDD1: 3 V to 20 V VDD2: 3 V to 20 V Bandwidth: 400 kHz Isolation voltage: 5 kV rms reinforced Safety and regulatory approvals (pending) UL recognition: 5000 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice #5A VDE certificate of conformity DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 VIORM = 849 V peak Wide temperature range −40°C to +125°C ambient operation 150°C maximum junction temperature The ADuM41901 is an isolated error amplifier based on Analog Devices, Inc., iCoupler® technology. The ADuM4190 is ideal for linear feedback power supplies. The primary side controllers of the ADuM4190 enable improvements in transient response, power density, and stability as compared to commonly used optocoupler and shunt regulator solutions. Unlike optocoupler-based solutions, which have an uncertain current transfer ratio over lifetime and at high temperatures, the ADuM4190 transfer function does not change over its lifetime and is stable over a wide temperature range of −40°C to +125°C. Included in the ADuM4190 is a wideband operational amplifier for a variety of commonly used power supply loop compensation techniques. The ADuM4190 is fast enough to allow a feedback loop to react to fast transient conditions and overcurrent conditions. Also included is a high accuracy 1.225 V reference to compare with the supply output setpoint. The ADuM4190 is packaged in a wide body, 16-lead SOIC package for a reinforced 5 kV rms isolation voltage rating. APPLICATIONS Linear feedback power supplies Inverters Uninterruptible power supplies (UPS) DOSA-compatible modules Voltage monitors FUNCTIONAL BLOCK DIAGRAM VDD1 1 16 VDD2 GND1 2 15 GND2 VREG1 3 REG UVLO UVLO REF REG REF NC 5 EAOUT2 6 14 VREG2 13 REFOUT 12 +IN Tx Rx EAOUT 7 GND1 8 ADuM4190 11 –IN 10 COMP 9 GND2 11336-001 REFOUT1 4 Figure 1. 1 Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329. Other patents pending. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. 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ADuM4190 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Pin Configuration and Function Descriptions..............................7 Applications ....................................................................................... 1 Typical Performance Characteristics ..............................................8 General Description ......................................................................... 1 Test Circuits..................................................................................... 12 Functional Block Diagram .............................................................. 1 Applications Information .............................................................. 13 Revision History ............................................................................... 2 Accuracy Circuit Operation...................................................... 13 Specifications..................................................................................... 3 Isolated Amplifier Circuit Operation ...................................... 14 Package Characteristics ............................................................... 4 Application Block Diagram ...................................................... 14 Regulatory Information ............................................................... 4 Setting the Output Voltage ........................................................ 15 Insulation and Safety Related Specifications ............................ 4 DOSA Module Application....................................................... 15 Recommended Operating Conditions ...................................... 5 DC Correctness and Magnetic Field Immunity ..................... 15 DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 Insulation Characteristics ............................................................ 5 Insulation Lifetime ..................................................................... 16 Outline Dimensions ....................................................................... 17 Absolute Maximum Ratings ............................................................ 6 Ordering Guide .......................................................................... 17 ESD Caution .................................................................................. 6 REVISION HISTORY 7/13—Revision 0: Initial Version Rev. 0 | Page 2 of 20 Data Sheet ADuM4190 SPECIFICATIONS VDD1 = VDD2 = 3 V to 20 V for TA = TMIN to TMAX. All typical specifications are at TA = 25°C and VDD1 = VDD2 = 5 V, unless otherwise noted. Table 1. Parameter ACCURACY Initial Error Total Error OP AMP Offset Error Open-Loop Gain Input Common-Mode Range Gain Bandwidth Product Common-Mode Rejection Input Capacitance Output Voltage Range Input Bias Current REFERENCE Output Voltage Output Current UVLO Positive Going Threshold Negative Going Threshold EAOUT Impedance OUTPUT CHARACTERISTICS Output Gain 1 Output Offset Voltage Output Linearity 2 Output −3 dB Bandwidth A and S Grades B and T Grades Output Voltage, EAOUT Low Voltage High Voltage Output Voltage, EAOUT2 Low Voltage High Voltage Noise, EAOUT Noise, EAOUT2 POWER SUPPLY Operating Range, Side 1 Operating Range, Side 2 Test Conditions/Comments (1.225 V − EAOUT)/1.225 V × 100%; see Figure 27 TA = 25°C TA = TMIN to TMAX Min −5 66 0.35 Typ Max Unit 0.25 0.5 0.5 1 % % ±2.5 80 +5 mV dB V MHz dB pF V µA 1.5 10 72 2 COMP pin 0.2 2.7 0.01 0 mA to 1 mA load, CREFOUT = 15 pF TA = 25°C TA = TMIN to TMAX CREFOUT = 15 pF VDD2 or VDD1 < UVLO threshold See Figure 29 From COMP to EAOUT, 0.3 V to 2.4 V, ±3 mA From EAOUT to EAOUT2, 0.4 V to 5.0 V, ±1 mA, VDD1 = 20 V From COMP to EAOUT, 0.3 V to 2.4 V, ±3 mA From EAOUT to EAOUT2, 0.4 V to 5.0 V, ±1 mA, VDD1 = 20 V From COMP to EAOUT, 0.3 V to 2.4 V, ±3 mA From EAOUT to EAOUT2, 0.4 V to 5.0 V, ±1 mA, VDD1 = 20 V From COMP to EAOUT, 0.3 V to 2.4 V, ±3 mA, and from COMP to EAOUT2, 0.4 V to 5.0 V, ±1 mA, VDD1 = 20 V 1.215 1.213 2.0 1.225 1.225 1.235 1.237 V V mA 2.8 2.6 High-Z 2.96 2.4 V V Ω 0.83 2.5 1.0 2.6 1.17 2.7 V/V V/V −0.4 −0.1 +0.05 +0.01 +0.4 +0.1 V V −1.0 −1.0 +0.15 +0.1 +1.0 +1.0 % % 100 250 200 400 2.4 2.5 4.8 5.0 0.3 0.3 4.9 5.4 1.7 4.8 kHz kHz ±3 mA output ±1 mA output VDD1 = 4.5 V to 5.5 V VDD1 = 10 V to 20 V VDD1 = 4.5 V to 5.5 V VDD1 = 10 V to 20 V See Figure 15 See Figure 15 VDD1 VDD2 3.0 3.0 Rev. 0 | Page 3 of 20 0.4 V V 0.6 0.6 V V V V mV rms mV rms 20 20 V V ADuM4190 Parameter Power Supply Rejection Supply Current IDD1 IDD2 1 2 Data Sheet Test Conditions/Comments DC, VDD1 = VDD2 = 3 V to 20 V Min 60 See Figure 4 See Figure 5 Typ Max Unit dB 1.4 2.9 2.0 5.0 mA mA Output gain is defined as the slope of the best-fit line of the output voltage vs. the input voltage over the specified input range, with the offset error adjusted out. Output linearity is defined as the peak-to-peak output deviation from the best-fit line of the output gain, expressed as a percentage of the full-scale output voltage. PACKAGE CHARACTERISTICS Table 2. Parameter RESISTANCE Input-to-Output 1 CAPACITANCE Input-to-Output1 Input Capacitance 2 IC JUNCTION-TO-AMBIENT THERMAL RESISTANCE 1 2 Symbol Min Typ Max Unit RI-O 1013 Ω CI-O CI θJA 2.2 4.0 45 pF pF °C/W Test Conditions/Comments f = 1 MHz Thermocouple located at center of package underside The device is considered a 2-terminal device; Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together. Input capacitance is from any input pin to ground. REGULATORY INFORMATION The ADuM4190 is pending approval by the organizations listed in Table 3. See Table 8 and the Insulation Lifetime section for recommended maximum working voltages for specific cross-isolation waveforms and insulation levels. Table 3. UL (Pending) Recognized under UL 1577 component recognition program 1 Single protection, 5000 V rms isolation voltage, 16-lead SOIC File E214100 1 2 CSA (Pending) Approved under CSA Component Acceptance Notice #5A Reinforced insulation per CSA 60950-1-03 and IEC 60950-1, 400 V rms (565 V peak) maximum working voltage Basic insulation per CSA 60950-1-03 and IEC 60950-1, 800 V rms (1131 V peak) maximum working voltage File 205078 VDE (Pending) Certified according to DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 2 Reinforced insulation, 849 V peak File 2471900-4880-0001 In accordance with UL 1577, each ADuM4190 is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 sec (current leakage detection limit = 10 µA). In accordance with DIN V VDE V 0884-10 (VDE V 0884-10):2006-12, each ADuM4190 is proof tested by applying an insulation test voltage ≥ 1590 V peak for 1 sec (partial discharge detection limit = 5 pC). The asterisk (*) marking branded on the component designates DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 approval. INSULATION AND SAFETY RELATED SPECIFICATIONS Table 4. Parameter Rated Dielectric Insulation Voltage Minimum External Air Gap (Clearance) Symbol L(I01) Value 5000 8.0 min Unit V rms mm Minimum External Tracking (Creepage) L(I02) 8.3 min mm Minimum Internal Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) Isolation Group CTI 0.017 min >400 II mm V Rev. 0 | Page 4 of 20 Test Conditions/Comments 1-minute duration Measured from input terminals to output terminals, shortest distance through air along the PCB mounting plane, as an aid to PCB layout Measured from input terminals to output terminals, shortest distance path along body Insulation distance through insulation DIN IEC 112/VDE 0303, Part 1 Material Group DIN VDE 0110, 1/89, Table 1 Data Sheet ADuM4190 RECOMMENDED OPERATING CONDITIONS Table 5. Parameter OPERATING TEMPERATURE ADuM4190A/ADuM4190B ADuM4190S/ADuM4190T SUPPLY VOLTAGES 1 INPUT SIGNAL RISE AND FALL TIMES 1 Symbol TA VDD1, VDD2 tR, tF Min Max Unit −40 −40 3.0 +85 +125 20 1.0 °C °C V ms All voltages are relative to their respective grounds. DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 INSULATION CHARACTERISTICS This isolator is suitable for reinforced isolation only within the safety limit data. Maintenance of the safety data is ensured by protective circuits. The asterisk (*) marking branded on the component designates DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 approval for an 849 V peak working voltage. Table 6. Description Installation Classification per DIN VDE 0110 For Rated Mains Voltage ≤ 150 V rms For Rated Mains Voltage ≤ 300 V rms For Rated Mains Voltage ≤ 400 V rms Climatic Classification Pollution Degree per DIN VDE 0110, Table 1 Maximum Working Insulation Voltage Input-to-Output Test Voltage, Method B1 Test Conditions/Comments VIORM × 1.875 = Vpd(m), 100% production test, tini = 60 sec, tm = 10 sec, partial discharge < 5 pC Input-to-Output Test Voltage, Method A After Environmental Tests Subgroup 1 VIORM × 1.5 = Vpd(m), tini = 60 sec, tm = 10 sec, partial discharge < 5 pC VIORM × 1.2 = Vpd(m), tini = 60 sec, tm = 10 sec, partial discharge < 5 pC After Input and/or Safety Tests Subgroup 2 and Subgroup 3 Highest Allowable Overvoltage Surge Isolation Voltage Safety Limiting Values V peak = 10 kV; 1.2 µs rise time; 50 µs, 50% fall time Maximum value allowed in the event of a failure (see Figure 2) Maximum Junction Temperature Safety Total Dissipated Power Insulation Resistance at TS VIO = 500 V Symbol Characteristic Unit VIORM Vpd(m) I to IV I to III I to II 40/105/21 2 849 1592 V peak V peak Vpd(m) 1273 V peak Vpd(m) 1018 V peak VIOTM VIOSM 6000 6000 V peak V peak TS PS RS 150 2.78 >109 °C W Ω 3.0 SAFE LIMITING POWER (W) 2.5 2.0 1.5 1.0 0 0 50 100 150 AMBIENT TEMPERATURE (°C) 200 11336-002 0.5 Figure 2. Thermal Derating Curve, Dependence of Safety Limiting Values on Case Temperature, per DIN V VDE V 0884-10 Rev. 0 | Page 5 of 20 ADuM4190 Data Sheet ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 7. Parameter Storage Temperature (TST) Range Ambient Operating Temperature (TA) Range Junction Temperature Range Supply Voltages1 VDD1, VDD2 VREG1, VREG2 Input Voltages (+IN, −IN) Output Voltages REFOUT, REFOUT1, COMP, EAOUT EAOUT2 Output Current per Output Pin Common-Mode Transients2 1 2 Rating −65°C to +150°C −40°C to +125°C −40°C to +150°C ESD CAUTION −0.5 V to +24 V −0.5 V to +3.6 V −0.5 V to +3.6 V −0.5 V to +3.6 V −0.5 V to +5.5 V −11 mA to +11 mA −100 kV/µs to +100 kV/µs All voltages are relative to their respective grounds. Refers to common-mode transients across the insulation barrier. Commonmode transients exceeding the absolute maximum ratings may cause latch-up or permanent damage. Table 8. Maximum Continuous Working Voltage1 Parameter AC Voltage, Bipolar Waveform AC Voltage, Unipolar Waveform DC Voltage 1 Max 560 1131 1131 Unit V peak V peak V peak Constraint 50-year minimum lifetime 50-year minimum lifetime 50-year minimum lifetime Refers to the continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more information. Rev. 0 | Page 6 of 20 Data Sheet ADuM4190 VDD1 1 16 VDD2 GND1 2 15 GND2 VREG1 3 14 VREG2 REFOUT1 4 ADuM4190 13 REFOUT NC 5 TOP VIEW (Not to Scale) 12 +IN EAOUT2 6 11 –IN EAOUT 7 10 COMP GND1 8 9 GND2 NC = NO CONNECTION. CONNECT PIN 5 TO GND1; DO NOT LEAVE THIS PIN FLOATING. 11336-003 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 3. Pin Configuration Table 9. Pin Function Descriptions Pin No. 1 2, 8 3 4 5 6 Mnemonic VDD1 GND1 VREG1 REFOUT1 NC EAOUT2 7 9, 15 10 11 12 13 14 16 EAOUT GND2 COMP −IN +IN REFOUT VREG2 VDD2 Description Supply Voltage for Side 1 (3 V to 20 V). Connect a 1 µF capacitor between VDD1 and GND1. Ground Reference for Side 1. Internal Supply Voltage for Side 1. Connect a 1 µF capacitor between VREG1 and GND1. Reference Output Voltage for Side 1. The maximum recommended capacitance for this pin (CREFOUT1) is 15 pF. No Connection. Connect Pin 5 to GND1; do not leave this pin floating. Isolated Output Voltage 2, Open-Drain Output. Connect a pull-up resistor between EAOUT2 and VDD1 for current up to 1 mA. Isolated Output Voltage. Ground Reference for Side 2. Output of the Op Amp. A loop compensation network can be connected between the COMP pin and the −IN pin. Inverting Op Amp Input. Pin 11 is the connection for the power supply setpoint and compensation network. Noninverting Op Amp Input. Pin 12 can be used as a reference input. Reference Output Voltage for Side 2. The maximum recommended capacitance for this pin (CREFOUT) is 15 pF. Internal Supply Voltage for Side 2. Connect a 1 µF capacitor between VREG2 and GND2. Supply Voltage for Side 2 (3 V to 20 V). Connect a 1 µF capacitor between VDD2 and GND2. Rev. 0 | Page 7 of 20 ADuM4190 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 3 1.228 VDDx = 20V VDDx = 5V REFOUT ACCURACY (V) 1.227 IDD1 (mA) 2 1 1.226 1.225 1.224 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) 1.222 –40 11336-004 0 –40 0 –20 20 40 60 80 100 120 11336-007 1.223 140 TEMPERATURE (°C) Figure 7. REFOUT Accuracy vs. Temperature Figure 4. Typical IDD1 Supply Current vs. Temperature 1.0 5 VDDx = 20V VDDx = 5V EAOUT ACCURACY (%) IDD2 (mA) 4 3 2 0.5 0 –0.5 0 20 40 60 80 100 120 140 TEMPERATURE (°C) –1.0 –40 2 OP AMP OFFSET VOLTAGE (mV) 10 8 6 4 2 20 40 60 80 100 120 TEMPERATURE (°C) 140 40 60 80 100 120 140 1 0 –1 –2 –3 –40 11336-006 INPUT BIAS CURRENT (nA) 3 0 20 Figure 8. EAOUT Accuracy vs. Temperature 12 –20 0 TEMPERATURE (°C) Figure 5. Typical IDD2 Supply Current vs. Temperature 0 –40 –20 –20 0 20 40 60 80 100 120 TEMPERATURE (°C) Figure 6. +IN, −IN Input Bias Current vs. Temperature Figure 9. Op Amp Offset Voltage vs. Temperature Rev. 0 | Page 8 of 20 140 11336-009 –20 11336-005 0 –40 11336-008 1 ADuM4190 0 90 –20 80 70 60 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) –60 –80 –100 –40 20 40 60 80 100 120 140 Figure 13. EAOUT Offset Voltage vs. Temperature 1.05 100 EAOUT2 OFFSET VOLTAGE (mV) 1.04 EAOUT GAIN (V/V) 0 TEMPERATURE (°C) Figure 10. Op Amp Open-Loop Gain vs. Temperature 1.03 1.02 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) 11336-011 1.01 1.00 –40 –20 50 0 –50 –100 –40 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) Figure 14. EAOUT2 Offset Voltage vs. Temperature Figure 11. EAOUT Gain vs. Temperature 2.66 2.64 2.62 2.60 2 2.56 –40 –20 0 20 40 60 80 100 TEMPERATURE (°C) 120 140 CH1 10mV Ω CH2 10mV Ω M4.0µs A CH1 T 102.4ns 1.18V Figure 15. Output Noise with Test Circuit 1 (10 mV/DIV), Channel 1 = EAOUT, Channel 2 = EAOUT2 Figure 12. EAOUT2 Gain vs. Temperature Rev. 0 | Page 9 of 20 11336-015 2.58 11336-112 EAOUT2 GAIN (V/V) 1 11336-114 50 –40 –40 11336-013 EAOUT OFFSET VOLTAGE (mV) 100 11336-010 OP AMP OPEN-LOOP GAIN (dB) Data Sheet Data Sheet 30 30 25 25 NUMBER OF AMPLIFIERS 20 15 10 5 15 10 0.95 1.00 1.05 1.10 COMP TO EAOUT GAIN (V/V) 0 –0.4 30 30 25 25 20 15 10 5 0.4 20 15 10 1.05 1.10 0 –0.4 –0.2 0 0.2 0.4 COMP TO EAOUT OFFSET VOLTAGE (V) 11336-120 1.00 11336-117 0.95 Figure 17. EAOUT Gain Distribution at 125°C Figure 20. EAOUT Offset Voltage Distribution at 125°C 30 25 25 NUMBER OF AMPLIFIERS 30 20 15 10 5 20 15 10 5 0.95 1.00 1.05 COMP TO EAOUT GAIN (V/V) 1.10 11336-118 NUMBER OF AMPLIFIERS 0.2 5 COMP TO EAOUT GAIN (V/V) 0 0.90 0 Figure 19. EAOUT Offset Voltage Distribution at 25°C NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS Figure 16. EAOUT Gain Distribution at 25°C 0 0.90 –0.2 COMP TO EAOUT OFFSET VOLTAGE (V) 11336-119 5 11336-116 0 0.90 20 Figure 18. EAOUT Gain Distribution at −40°C 0 –0.4 –0.2 0 0.2 COMP TO EAOUT OFFSET VOLTAGE (V) Figure 21. EAOUT Offset Voltage Distribution at −40°C Rev. 0 | Page 10 of 20 0.4 11336-121 NUMBER OF AMPLIFIERS ADuM4190 Data Sheet ADuM4190 30 NUMBER OF AMPLIFIERS 25 20 15 1 10 5 1.225 1.230 1.235 EAOUT ACCURACY (V) 3 11336-122 1.220 Figure 22. EAOUT Accuracy Voltage Distribution at 25°C CH1 100mV Ω CH2 100mV Ω CH3 200mV Ω M2µs T 0s A CH1 434mV 11336-016 2 0 1.215 Figure 25. Output 100 kHz Signal with Test Circuit 3, Channel 1 = +IN, Channel 2 = EAOUT, Channel 3 = EAOUT2 30 NUMBER OF AMPLIFIERS 25 20 2 1 15 3 10 1.220 1.225 1.230 1.235 EAOUT ACCURACY (V) Figure 23. EAOUT Accuracy Voltage Distribution at 125°C 20 15 10 5 1.225 1.230 1.235 EAOUT ACCURACY (V) 11336-124 NUMBER OF AMPLIFIERS 25 1.220 CH2 50mV Ω M2µs A CH1 T 5.92µs 399mV Figure 26. Output Square Wave Response with Test Circuit 3, Channel 1 = +IN, Channel 2 = EAOUT, Channel 3 = EAOUT2 30 0 1.215 CH1 20mV Ω CH3 20mV Ω Figure 24. EAOUT Accuracy Voltage Distribution at −40°C Rev. 0 | Page 11 of 20 11336-017 0 1.215 11336-123 5 ADuM4190 Data Sheet TEST CIRCUITS VDD1 1µF GND1 1µF VREG1 1 16 2 15 REG 3 REFOUT1 4 UVLO UVLO 14 REG REF REF 12 Tx 11 Rx 10 7 GND1 8 GND2 1µF VREG2 1µF REFOUT 13 NC 5 EAOUT2 6 EAOUT VDD2 +IN –IN 680Ω COMP 2.2nF GND2 9 11336-018 ADuM4190 Figure 27. Test Circuit 1: Accuracy Circuit Using EAOUT VDD1 1µF GND1 1µF VREG1 1 16 2 15 REG 3 REFOUT1 4 ROD UVLO UVLO 14 REG REF REF 13 NC 5 EAOUT2 EAOUT Tx 6 11 Rx 7 10 8 9 ADuM4190 GND2 1µF VREG2 1µF REFOUT +IN –IN 680Ω COMP 2.2nF GND2 11336-019 GND1 12 VDD2 Figure 28. Test Circuit 2: Accuracy Circuit Using EAOUT2 GND1 1µF VREG1 ROD 1 16 2 15 REG 3 REFOUT1 4 UVLO UVLO 14 REG REF REF NC 5 EAOUT2 FILTERED EAOUT EAOUT 680Ω GND1 12 11 Rx 10 7 8 ADuM4190 470pF Figure 29. Test Circuit 3: Isolated Amplifier Circuit Rev. 0 | Page 12 of 20 GND2 1µF VREG2 1µF 13 REFOUT Tx 6 VDD2 9 +IN –IN COMP GND2 11336-129 VDD1 1µF Data Sheet ADuM4190 APPLICATIONS INFORMATION In the test circuits of the ADuM4190 (see Figure 27 through Figure 29), external supply voltages from 3 V to 20 V are provided to the VDD1 and VDD2 pins, and internal regulators provide 3.0 V to operate the internal circuits of each side of the ADuM4190. An internal precision 1.225 V reference provides the reference for the ±1% accuracy of the isolated error amplifier. UVLO circuits monitor the VDDx supplies to turn on the internal circuits when the 2.8 V rising threshold is met and to turn off the error amplifier outputs to a high impedance state when VDDx falls below 2.6 V. Figure 30 also shows the linear isolator alone (the blocks from the op amp output to the ADuM4190 output, labeled as the linear isolator), which introduces a pole at approximately 400 kHz. This total Bode plot of the op amp and linear isolator shows that the phase shift is approximately −180° from the −IN pin to the EAOUT pin before the crossover frequency. Because a −180° phase shift can make the system unstable, adding an integrator configuration, consisting of a 2.2 nF capacitor and a 680 Ω resistor, helps to make the system stable (see Figure 27 and Figure 28). The op amp on the right side of the ADuM4190 has a noninverting +IN pin and an inverting −IN pin available for connecting a feedback voltage in an isolated dc-to-dc converter output, usually through a voltage divider. The COMP pin is the op amp output, which can be used to attach resistor and capacitor components in a compensation network. The COMP pin internally drives the Tx transmitter block, which converts the op amp output voltage into an encoded output that is used to drive the digital isolator transformer. For an application that requires more output voltage to drive its controller, the EAOUT2 pin can be used (see Figure 28). The EAOUT2 pin delivers up to ±1 mA with an output voltage of 0.6 V to 4.8 V for an output that has a pull-up resistor to a 5 V supply. If the EAOUT2 pull-up resistor is connected to a 10 V to 20 V supply, the output is specified to a minimum of 5.0 V to allow use with a PWM controller that requires a minimum input operation of 5 V. ACCURACY CIRCUIT OPERATION 100 OP AMP AND LINEAR ISOLATOR OP AMP ALONE LINEAR ISOLATOR POLE AT 400kHz 100 1k 10k 100k 1M 10M FREQUENCY (Hz) LINEAR ISOLATOR PHASE (°) 100 1k 10k 100k 1M 10M FREQUENCY (Hz) –90 –180 11336-021 On the left side of the ADuM4190, the Rx block decodes the PWM signal that is output by the transformer and converts the signal into a voltage that drives an amplifier block; the amplifier block produces the error amplifier output available at the EAOUT pin. The EAOUT pin can deliver ±3 mA and has a voltage level from 0.4 V to 2.4 V, which is typically used to drive the input of a PWM controller in a dc-to-dc circuit. AMPLITUDE (dB) Figure 30. Bode Plot 1: Op Amp and Linear Isolator In Figure 31, Bode Plot 2, with an integrator configuration added, the system crosses over 0 dB at approximately 100 kHz, but the circuit is more stable with a phase shift of approximately −120°, which yields a stable 60° phase margin. This circuit is used for accuracy tests only, not for real-world applications, because it has a 680 Ω resistor across the isolation barrier to close the loop for the error amplifier; this resistor causes leakage current to flow across the isolation barrier. For this test circuit only, GND1 must be connected to GND2 to create a return for the leakage current that is created by the 680 Ω resistor connection. See Figure 27 and Figure 28 for accuracy circuit operation. The op amp on the right side of the ADuM4190, from the −IN pin to the COMP pin, has a unity-gain bandwidth (UGBW) of 10 MHz. Figure 30, Bode Plot 1, shows a dashed line for the op amp alone and its 10 MHz pole. AMPLITUDE (dB) OP AMP AND LINEAR ISOLATOR 100 LINEAR ISOLATOR POLE AT 400kHz 1k 10k 100k 1M OP AMP ALONE FREQUENCY (Hz) 10M 1k 10k 100k 1M 10M INTEGRATOR CONFIGURATION 100 PHASE (°) 100 FREQUENCY (Hz) –90 11336-022 –180 Figure 31. Bode Plot 2: Op Amp and Linear Isolator with Integrator Configuration Rev. 0 | Page 13 of 20 ADuM4190 Data Sheet ISOLATED AMPLIFIER CIRCUIT OPERATION Figure 29 shows an isolated amplifier circuit. In this circuit, the input side amplifier is set as a unity-gain buffer so that the EAOUT output follows the +IN input. The EAOUT2 output follows the EAOUT output, but with a voltage gain of 2.6. This circuit has an open-drain output, which should be pulled up to a supply voltage from 3 V to 20 V using a resistor value set for an output current of up to 1 mA. The EAOUT2 output can be used to drive up to 1 mA to the input of a device that requires a minimum input operation of 5 V. The EAOUT2 circuit has an internal diode clamp to protect the internal circuits from voltages greater than 5 V. The gain, offset, and linearity of EAOUT and EAOUT2 are specified in Table 1 using this test circuit. When designing applications for voltage monitoring using an isolated amplifier, review these specifications, noting that the 1% accuracy specifications for the isolated error amplifier do not apply. In addition, the EAOUT circuit in Figure 29 is shown with an optional external RC low-pass filter with a corner frequency of 500 kHz, which can reduce the 3 MHz output noise from the internal voltage to the PWM converter. APPLICATION BLOCK DIAGRAM Figure 32 shows a typical application for the ADuM4190: an isolated error amplifier in primary side control. VIN OSC ERROR AMP FB COMP LO LATCHING PWM VOUT DCR POWER STAGE CO CURRENT SENSE + ESR C1 COMPENSATION NETWORK COMP R2 OP AMP ADuM4190 1.225V –IN +IN REFOUT 11336-023 EAOUT2 C2 The power stage output is filtered by output capacitance and, in some applications, by an inductor. Various elements contribute to the gain and phase of the control loop and the resulting stability. The output filter components (LO and CO) create a double pole; the op amp has a pole at 10 MHz (see Figure 30), and the linear isolator has a pole at 400 kHz (see Figure 30 and Figure 31). The output capacitor and its ESR can add a zero at a frequency that is dependent on the component type and values. With the ADuM4190 providing the error amplifier, a compensation network is provided from the −IN pin to the COMP pin to compensate the control loop for stability. The compensation network values depend on both the application and the components that are selected; information about the component network values is provided in the data sheet of the selected PWM controller. The ADuM4190 has two different error amplifier outputs: EAOUT and EAOUT2. The EAOUT output, which can drive ±3 mA, has a guaranteed maximum high output voltage of at least 2.4 V, which may not be sufficient to drive the COMP pin of some PWM controllers. The EAOUT2 pin can drive ±1 mA and has an output range that guarantees 5.0 V for a VDD1 voltage range of 10 V to 20 V, which works well with the COMP pin of many PWM controllers. PWM CONTROLLER VREF The COMP output of the op amp is encoded and then decoded by the digital isolator transformer block to a signal that drives the output of the ADuM4190 high. The output of the ADuM4190 drives the COMP pin of the PWM controller, which is designed to reset the PWM latch output to low only when its COMP pin is low. A high at the COMP pin of the PWM controller causes the latching PWM comparator to produce a PWM duty cycle output. This PWM duty cycle output drives the power stage to increase the VOUT voltage until it returns to regulation. Figure 32. Application Block Diagram The op amp of the ADuM4190 is used as the error amplifier for the feedback of the output voltage, VOUT, using a resistor divider to the −IN pin of the op amp. This configuration inverts the output signal at the COMP pin when compared to the +IN pin, which is connected to the internal 1.225 V reference. For example, when the output voltage, VOUT, falls due to a load step, the divider voltage at the −IN pin falls below the +IN reference voltage, causing the COMP pin output signal to go high. Figure 32 shows how to use the ADuM4190 to provide isolated feedback in the control loop of an isolated dc-to-dc converter. In this application block diagram, the loop is closed at approximately the 1.225 V reference voltage, providing ±1% accuracy over temperature. The ADuM4190 op amp has a high gain bandwidth of 10 MHz to allow the dc-to-dc converter to operate at high switching speeds, enabling smaller values for the output filter components (LO and CO). The 400 kHz bandwidth of the ADuM4190 error amplifier output offers faster loop response for better transient response than the typical shunt regulator and optocoupler solutions, which typically have bandwidths of only 25 kHz to 50 kHz maximum. Rev. 0 | Page 14 of 20 Data Sheet ADuM4190 SETTING THE OUTPUT VOLTAGE The output voltage in the application circuit shown in Figure 32 can be set with two resistors in a voltage divider (see Figure 33). VOUT ISOLATED DC-TO-DC SUPPLY R1 –IN 11336-025 REFOUT ADuM4190 Figure 33. Setting the Output Voltage The output voltage is determined by the following equation: VOUT = VREF × (R1 + R2)/R2 where VREF = 1.225 V. DOSA MODULE APPLICATION Figure 34 is a block diagram of a Distributed-power Open Standards Alliance (DOSA) circuit using the ADuM4190. The block diagram shows how to use the 1.225 V reference and the error amplifier of the ADuM4190 in a DOSA standard power supply module circuit to produce output voltage settings using a combination of resistors. The 1.225 V reference of the ADuM4190 is specified for ±1% over the −40°C to +125°C temperature range. To set the output voltage of the module, use Table 10 to select the resistor values. Two different ranges of VOUT can be implemented, VOUT > 1.5 V or VOUT < 1.5 V, depending on the required module. Table 10 shows two sets of resistor values for the VOUT > 1.5 V and VOUT < 1.5 V ranges; the second set of resistor values (where 5.11 kΩ resistors are used) consumes less current than the first set. VOUT DOSA MODULE R1 VIN = 0.35V TO 1.5V R2 ERROR AMPLIFIER R3 VREF 1.225V R5 R4 RTRIM-DOWN R6 Figure 34. DOSA Module Table 10. Resistor Values for DOSA Module Module Nominal Output VOUT > 1.5 V VOUT < 1.5 V VOUT > 1.5 V VOUT < 1.5 V R3 1 kΩ 1 kΩ 5.11 kΩ 5.11 kΩ R4 1 kΩ 0Ω 5.11 kΩ 0Ω R5 0Ω 2.05 kΩ 0Ω 10.5 kΩ The pulses at the transformer output have an amplitude greater than 1.0 V. The decoder has a sensing threshold at approximately 0.5 V, thus establishing a 0.5 V margin within which induced voltages are tolerated. The voltage induced across the receiving coil is given by V = (−dβ/dt) ∑ πrn2, n = 1, 2, … , N where: β is the magnetic flux density (gauss). rn is the radius of the nth turn in the receiving coil (cm). N is the number of turns in the receiving coil. Given the geometry of the receiving coil in the ADuM4190 and an imposed requirement that the induced voltage be, at most, 50% of the 0.5 V margin at the decoder, a maximum allowable magnetic field is calculated as shown in Figure 35. 100 OPTIONAL TRIM-UP OR TRIM-DOWN RESISTOR FOR ±10% OF NOMINAL VALUE ACCORDING TO DOSA 11336-026 ADuM4190 RTRIM-UP The ADuM4190 is immune to external magnetic fields. The limitation on the magnetic field immunity of the ADuM4190 is set by the condition in which the induced voltage in the receiving coil of the transformer is sufficiently large to either falsely set or reset the decoder. The following analysis defines the conditions under which this can occur. The 3 V operating condition of the ADuM4190 is examined because the internal regulators provide 3 V to operate the internal circuits of each side of the device. R6 Open 1.96 kΩ Open 10.0 kΩ Rev. 0 | Page 15 of 20 10 1 0.1 0.01 0.001 1k 10k 100k 1M 10M 100M MAGNETIC FIELD FREQUENCY (Hz) Figure 35. Maximum Allowable External Magnetic Flux Density 11336-027 VREF 1.225V R2 Positive and negative logic transitions at the isolator input cause narrow (~1 ns) pulses to be sent to the decoder via the transformer. The decoder is bistable and is, therefore, either set or reset by the pulses, indicating input logic transitions. If the decoder receives no internal pulses for more than approximately 3 μs, the input side is assumed to be unpowered or nonfunctional, and the isolator output is forced to a default high impedance state by the watchdog timer circuit. In addition, the outputs are in a default high impedance state while the power is increasing before the UVLO threshold is crossed. MAXIMUM ALLOWABLE MAGNETIC FLUX DENSITY (kgauss) VIN = 0.35V TO 1.5V +IN ERROR AMPLIFIER DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY ADuM4190 Data Sheet For example, at a magnetic field frequency of 1 MHz, the maximum allowable magnetic field of 0.2 kgauss induces a voltage of 0.25 V at the receiving coil. This voltage is approximately 50% of the sensing threshold and does not cause a faulty output transition. Similarly, if such an event occurs during a transmitted pulse (and is of the worst-case polarity), the received pulse is reduced from >1.0 V to 0.75 V—still well above the 0.5 V sensing threshold of the decoder. The preceding magnetic flux density values correspond to specific current magnitudes at given distances from the ADuM4190 transformers. Figure 36 shows these allowable current magnitudes as a function of frequency for selected distances. As shown in Figure 36, the ADuM4190 is immune and can be affected only by extremely large currents operating at a high frequency very close to the component. For the 1 MHz example, a 0.7 kA current must be placed 5 mm away from the ADuM4190 to affect the operation of the device. DISTANCE = 1m 100 The insulation lifetime of the ADuM4190 depends on the voltage waveform type imposed across the isolation barrier. The iCoupler insulation structure degrades at different rates depending on whether the waveform is bipolar ac, unipolar ac, or dc. Figure 37, Figure 38, and Figure 39 illustrate these different isolation voltage waveforms. A bipolar ac voltage environment is the worst case for the iCoupler products yet meets the 50-year operating lifetime recommended by Analog Devices for maximum working voltage. In the case of unipolar ac or dc voltage, the stress on the insulation is significantly lower. This allows operation at higher working voltages while still achieving a 50-year service life. Treat any cross-insulation voltage waveform that does not conform to Figure 38 or Figure 39 as a bipolar ac waveform, and limit its peak voltage to the 50-year lifetime voltage value listed in Table 8. Note that the voltage presented in Figure 38 is shown as sinusoidal for illustration purposes only. It is meant to represent any voltage waveform varying between 0 V and some limiting value. The limiting value can be positive or negative, but the voltage cannot cross 0 V. 10 DISTANCE = 100mm 1 DISTANCE = 5mm RATED PEAK VOLTAGE 11336-029 0.1 0V 0.01 1k 10k 100k 1M 10M 100M MAGNETIC FIELD FREQUENCY (Hz) 11336-028 MAXIMUM ALLOWABLE CURRENT (kA) 1000 The values shown in Table 8 summarize the peak voltage for 50 years of service life for a bipolar ac operating condition. In many cases, the approved working voltage is higher than the 50-year service life voltage. Operation at these high working voltages can lead to shortened insulation life in some cases. Figure 36. Maximum Allowable Current for Various Current-to-ADuM4190 Spacings Figure 37. Bipolar AC Waveform RATED PEAK VOLTAGE Analog Devices performs accelerated life testing using voltage levels higher than the rated continuous working voltage. Acceleration factors for several operating conditions are determined. These factors allow calculation of the time to failure at the actual working voltage. Rev. 0 | Page 16 of 20 0V Figure 38. Unipolar AC Waveform RATED PEAK VOLTAGE 11336-031 All insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. The rate of insulation degradation is dependent on the characteristics of the voltage waveform applied across the insulation. In addition to the testing performed by the regulatory agencies, Analog Devices carries out an extensive set of evaluations to determine the lifetime of the insulation structure within the ADuM4190. 11336-030 INSULATION LIFETIME 0V Figure 39. DC Waveform Data Sheet ADuM4190 OUTLINE DIMENSIONS 12.85 12.75 12.65 1.93 REF 16 9 7.60 7.50 7.40 1 10.51 10.31 10.11 8 PIN 1 MARK 2.64 2.54 2.44 2.44 2.24 45° SEATING PLANE 1.27 BSC 8° 0° 1.01 0.76 0.51 0.46 0.36 0.32 0.23 11-15-2011-A 0.30 0.20 0.10 COPLANARITY 0.1 0.71 0.50 0.31 0.25 BSC GAGE PLANE COMPLIANT TO JEDEC STANDARDS MS-013-AC Figure 40. 16-Lead Standard Small Outline Package, with Increased Creepage [SOIC_IC] Wide Body (RI-16-2) Dimensions shown in millimeters ORDERING GUIDE Model 1, 2 ADuM4190ARIZ ADuM4190ARIZ-RL ADuM4190BRIZ ADuM4190BRIZ-RL ADuM4190SRIZ ADuM4190SRIZ-RL ADuM4190TRIZ ADuM4190TRIZ-RL EVAL-ADuM3190EBZ 1 2 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C Bandwidth (Typical) 200 kHz 200 kHz 400 kHz 400 kHz 200 kHz 200 kHz 400 kHz 400 kHz Z = RoHS Compliant Part. The EVAL-ADuM3190EBZ can be used to evaluate the ADuM3190 and the ADuM4190. Rev. 0 | Page 17 of 20 Package Description 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC 16-Lead SOIC_IC Evaluation Board Package Option RI-16-2 RI-16-2 RI-16-2 RI-16-2 RI-16-2 RI-16-2 RI-16-2 RI-16-2 ADuM4190 Data Sheet NOTES Rev. 0 | Page 18 of 20 Data Sheet ADuM4190 NOTES Rev. 0 | Page 19 of 20 ADuM4190 Data Sheet NOTES ©2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D11336-0-7/13(0) Rev. 0 | Page 20 of 20