Holtek BC7601 Ble transparent transmission controller Datasheet

BC7601/BC7602
BLE Transparent Transmission Controller
Features
General Description
• 3.3V operating voltage
The BC7601/BC7602 devices are fully-integrated,
single-chip Bluetooth Low Energy, BLE, controllers.
The devices are specially designed to act as BLE
slave controllers in accordance with the Bluetooth
specification v4.1.
• Integrated high performance RF and MODEM for
enhanced BLE.
• Few external components required as well as on-chip
32 MHz crystal capacitors to reduce the BOM cost.
The devices can be controlled by any external
microcontroller through the Application Controller
Interface, ACI, which is designed to allow the devices
to easily communicate with external circuitry. The
UART and SPI interfaces are available as the ACI
transport layers.
• Integrated DC/DC converter and LDOs allowing a
wider supply range with a single power supply
• Over 75dB RX of gain in programmable gain steps
• Integrated SPI and UART for ACI interfaces
• Includes Sleep and Power Down modes for low
power consumption
Additionally, during intervals where there is no active
BLE RF connection, the devices will enter a Sleep
Mode thus further reducing power consumption.
• Embedded patch memory to reduce system
development effort and cost – BC7602 only
• Package types:
♦♦ BC7601: 32-pin QFN – 4mmx4mm
♦♦ BC7602: 46-pin QFN – 6.5mmx4.5mm
In general practice, the BC7601/BC7602 devices
will be required to download a patch code for full
BLE optimisation. For convenience and system cost
reduction, the BC7602 device already supports an
internal patch code and so does not need to patch
from the external microcontroller.
Applications
• Health care products
• Smart home appliances
• Beacons
Block Diagram
VDDIF_15
VDDRF_15
VDDLO_15
RST_N
PDN
INT_EXT
Balun
RFIO
WAKEUP
VCO
PA
STATE
Frequency
Synthesizer
Switch
SPI_INT
BLE
Controller
SPI_CS/UR_CTS
ACI
Mixer
+Gain
LNA
XI
XO
DC/DC
Converter
Xtal
OSC
SPI_MOSI/UR_RXD
IF Filter
& Demod
SPI_MISO/UR_TXD
SPI-UR_N
EE_WP
EEPROM
LDO
IIC_CLK
(BC7602 Only)
IIC_SDA
PVIN
Rev. 1.10
SPI_CLK/UR_RTS
DCDC_SW
VOUT_15
DVDD_12
SCL
1
SDA
WP
A[2:0]
Expose Pad : RFGND
May 19, 2017
BC7601/BC7602
Pin Assignment
DC_TEST
VDDLO_15
XI
XO
DVDD_12
NC
IIC_SDA
EE_WP
DFT
SPI_CS/UR_CTS
SPI_CLK/UR_RTS
SPI_MOSI/UR_RXD
SPI_MISO/UR_TXD
NC
PDN
PVIN
1
2
32 31 30 29 28 27 26 25
24
23
3
22
4
21
BC7601
5
20
32 QFN-A
6
19
7
18
8
17
9 10 11 12 13 14 15 16
RFGND
RFIO
VDDRF_15
VDDIF_15
RFGND
IIC_CLK
NC
RST_N
STATE
INT_EXT
WAKEUP
SPI-UR_N
SPI_INT
VOUT_15
DCDC_SW
NC
RFGND
RST_N
STATE
INT_EXT
WAKEUP
SPI-UR_N
NC
PVIN
DCDC_SW
VOUT_15
NC
SDA
SCL
NC
WP
VDD
NC
NC
NC
NC
A0
A1
A2
VSS
46 45 44 4342 414039 38 37 3635 34 33
1
32
2
31
3
30
4
29
BC7602
5
28
46 QFN-A
27
6
7
26
25
8
24
9
10111213 1415 16171819 202122 23
RFGND
RFIO
VDDRF_15
VDDIF_15
RFGND
NC
NC
SPI_CS/UR_CTS
SPI_CLK/UR_RTS
SPI_MOSI/UR_RXD
SPI_MISO/UR_TXD
SPI_INT
PDN
NC
Rev. 1.10
2
IIC_CLK
EE_WP
IIC_SDA
DVDD_12
XO
XI
VDDLO_15
DC_TEST
VDDRF_15
RFGND
May 19, 2017
BC7601/BC7602
Pin Description
BC7601
No
Type
DFT
Name
1
DI
For normal operation connect to RFGND.
Description
SPI_CS/UR_CTS
2
DI
SPI CS or UART CTS; selected by SPI-UR_N during the power-on period
SPI_CLK/UR_RTS
3
DI
SPI CLK or UART RTS; selected by SPI-UR_N during the power-on period
SPI_MOSI/UR_RXD
4
DI
SPI MOSI or UART RXD; selected by SPI-UR_N during the power-on period
SPI_MISO/UR_TXD
5
DO
SPI MISO or UART TXD; selected by SPI-UR_N during the power-on period
NC
6
—
No Connection – connect to RFGND
PDN
7
DI
Power down control pin
When low the device enters the Power down mode
PVIN
8
P
Power-supply; 2.2V~3.6V
NC
9
—
No Connection – connect to RFGND
DCDC_SW
10
P
Switching Output – connect to the switching end of the inductor
VOUT_15
11
P
1.5V power output
SPI_INT
12
DO
SPI interrupt request when SPI mode is selected
SPI-UR_N
13
DI
SPI/UART mode select pin during the power-on period
1: SPI pins selected
0: UART pins selected
WAKEUP
14
DI
Wake-up pin
Enters the Sleep Mode when low
INT_EXT
15
DO
External Interrupt
STATE
16
DO
IC state pin indicator
1: Operating mode
0: Sleep mode
RST_N
17
DI
Hardware reset, active low
NC
18
—
No Connection – connect to RFGND
Connect to external host or EEPROM SCL pin.
DIO IIC_CLK pin is baud rate selection when UART mode is selected. Where
0: 9600bps, 1: 115200bps.
IIC_CLK
19
RFGND
20
P
RF Power Ground
VDDIF_15
21
P
Analog power for IF section – connect to VOUT_15
VDDRF_15
22
P
Analog power for RF section – connect to VOUT_15
RFIO
23
AIO
RF input or output
RFGND
24
P
RF Power Ground
DC_TEST
25
AO
RF function test pin
VDDLO_15
26
P
Analog power for RF section, connect to VOUT_15
XI
27
AI
Crystal oscillator input
XO
28
AO
Crystal oscillator output
DVDD_12
29
P
1.2V internal digital power – connect 0.1μF capacitor to RFGND
NC
30
—
No Connection – connect to RFGND
IIC_SDA
31
DIO Connect to external host or EEPROM SDA pin
EE_WP
32
DO
RFGND
EP
P
Connect to external host or EEPROM WP pin
Exposed Pad on package lower side. Internally connected to RFGND. Solder
this exposed pad to a PCB pad that uses multiple ground vias to provide heat
transfer out of the device into the PCB ground planes. These multiple ground
vias are also required to achieve the noted RF performance.
Legend: AI=Analog Input; AO=Analog Output; AIO=Analog In/out;
DI=Digital Input; DO=Digital Output; DIO=Digital In/Out; P=Power
Rev. 1.10
3
May 19, 2017
BC7601/BC7602
BC7602
Pin
Type
VDD
Name
1
P
EEPROM power supply; 1.8V~3.6V
Description
NC
2
—
No Connection – connect to RFGND
NC
3
—
No Connection – connect to RFGND
NC
4
—
No Connection – connect to RFGND
NC
5
—
No Connection – connect to RFGND
A0
6
DI
EEPROM address A0 input
A1
7
DI
EEPROM address A1 input
A2
8
DI
EEPROM address A2 input
VSS
9
P
EEPROM Digital ground - connect to RFGND
NC
10
—
No Connection - connect to RFGND
PDN
11
DI
Power down control pin
When low the device enters the Power down mode
SPI_INT
12
DO
SPI interrupt request when SPI mode is selected
SPI_MISO/UR_TXD
13
DO
SPI MISO or UART TXD; selected by SPI-UR_N during the power-on period
SPI_MOSI/UR_RXD
14
DI
SPI MOSI or UART RXD; selected by SPI-UR_N during the power-on period
SPI_CLK/UR_RTS
15
DI
SPI CLK or UART RTS; selected by SPI-UR_N during the power-on period
SPI_CS/UR_CTS
16
DI
SPI CS or UART CTS; selected by SPI-UR_N during the power-on period
NC
17
—
No Connection – connect to RFGND
NC
18
—
No Connection – connect to RFGND
RFGND
19
P
RF Power Ground
VDDIF_15
20
P
Analog power for IF section – connect to VOUT_15
VDDRF_15
21
P
Analog power for RF section – connect to VOUT_15
RFIO
22
AIO
RF input or output
RFGND
23
P
RF Power Ground
VDDRF_15
24
P
Analog power for RF section – connect to VOUT_15
DC_TEST
25
AO
VDDLO_15
26
P
Analog power for RF section – connect to VOUT_15
XI
27
AI
Crystal oscillator input
XO
28
AO
Crystal oscillator output
DVDD_12
29
P
IIC_SDA
30
DIO Externally connected to SDA pin
EE_WP
31
DIO Externally connected to WP pin
IIC_CLK
32
DO
Externally connected to SCL pin
RST_N
33
DI
Hardware reset input, active low
STATE
34
DO
IC state pin indicator
1: Operating mode
0: Sleep mode
INT_EXT
35
DO
External Interrupt
WAKEUP
36
DI
Wake-up pin
Enters the Sleep Mode when low
SPI-UR_N
37
DI
SPI/UART mode select pin during the power-on period
1: SPI pins selected
0: UART pins selected
NC
38
—
No Connection – connect to RFGND
PVIN
39
P
Power-supply; 2.2V~3.6V
DCDC_SW
40
P
Switching Output - connect to the switching end of the inductor
VOUT_15
41
P
1.5V power output
NC
42
—
No Connection – connect to RFGND
SDA
43
Rev. 1.10
RF function test pin
1.2V internal digital power – connect 0.1μF capacitor to RFGND
DIO EEPROM SDA
4
May 19, 2017
BC7601/BC7602
Pin
Type
SCL
Name
44
DI
EEPROM SCL
NC
45
—
No Connection – connect to RFGND
WP
46
DI
EEPROM WP
P
Exposed Pad on the lower side of the package. Internally connected to
RFGND. Solder this exposed pad to a PCB pad that uses multiple ground
vias to provide heat transfer out of the device into the PCB ground planes.
These multiple ground vias are also required to achieve the noted RF
performance.
RFGND
EP
Description
Legend: AI=Analog Input; AO=Analog Output; AIO=Analog In/out;
DI=Digital Input; DO=Digital Output; DIO=Digital In/Out; P=Power
Absolute Maximum Ratings
Supply Voltage . .......................... VIN-0.3V to VIN+4.3V
Storage Temperature ........................... -50°C to 125°C
Input Voltage .............................. VIN-0.3V to VIN+0.3V
Operating Temperature .............................0°C to 70°C
Note: These are stress ratings only. Stresses exceeding the range specified under “Absolute Maximum Ratings”
may cause substantial damage to the device. Functional operation of this device at other conditions beyond
those listed in the specification is not implied and prolonged exposure to extreme conditions may affect
device reliability.
D.C. Characteristics
Symbol
VIN
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
—
2.2(*)
3.3
3.6
V
Power supply voltage(*)
Digital Inputs
VIH
High level input voltage
—
0.7 × VIN
—
—
V
VIL
Low level input voltage
—
—
—
0.2 × VIN
V
IIH
High level input current
—
—
10
—
μA
IIL
Low level input current
—
—
10
—
μA
CI
Input capacitance
—
—
5
—
pF
V
Digital Outputs
VOH
High level output voltage
IOH = 1mA
VIN -0.5
—
—
VOL
Low level output voltage
IOL = 1mA
—
—
0.5
V
IOZ
High impedance output current
—
—
1
μA
—
Supply current (Ta=25°C, VIN=3.3V, unless otherwise specified)
IRX
Rx mode
—
—
14.5
—
mA
ITX
TX mode, 0 dBm output power
—
—
9
—
mA
ISLEEP
Idle mode when MCU sleep
—
—
13
20
uA
IACT
Idle mode when MCU active
—
—
2
—
mA
IPDN
Power down
—
—
280
360
nA
Note: If the BC760x device is operating under the condition where VIN<2.2V, the LDO mode must be selected.
However this will consume more power.
Rev. 1.10
5
May 19, 2017
BC7601/BC7602
A.C. Characteristics
Symbol
Parameter
Min.
Typ.
Max.
Unit
Crystal Oscillator
f
Frequency
—
32
—
MHz
Frequency accuracy requirement
-40
—
40
ppm
ESR
Equivalent series resistance
—
—
100
Ω
C0
Crystal shunt capacitance
1.5
7
—
pF
CL
Crystal load capacitance
8
12
16
pF
Sensitivity
—
-90
—
dBm
Sensitivity (dirty on)
—
-88
—
dBm
Maximum input power
—
-5
—
dBm
Co-channel interference
—
12
—
dB
CI1
Interferer at fOFFS = +/- 1MHz
—
-2/4
—
dB
CI2
Interferer at fOFFS = +/- 2MHz
—
-25/-35
—
dB
Interferer at fOFFS = +/- 3MHz
—
-40/-40
—
dB
Interferer at fIMAGE
—
-35
—
dB
RX Characteristics
PSENS
PIN
CI0
CI3
In-band blocking
CI4
CI5
Out-of-band blocking
Interferer at fIMAGE +/- 1MHz
—
4/-38
—
dB
f = 30~2000MHz
—
-20
—
dBm
f = 2000~2399MHz
—
-25
—
dBm
f = 2484~3000MHz
—
-25
—
dBm
f = 3000~12750MHz
—
-30
—
dBm
—
-40
—
dBm
-18
—
+3
dBm
Intermodulation performance for desired signal at -64dBm
and 1 Mbps BLE, 3rd, 4th and 5th offset channel
TX Characteristic
PTX
Output power
TX RF output steps
—
6
—
dB
ΔF2AVG
Average frequency deviation for 10101010 pattern
—
230
—
KHz
ΔF1AVG
Average frequency deviation for 11110000 pattern
—
260
—
KHz
EO
Eye opening = ΔF2AVG/ΔF1AVG
—
0.88
—
Frequency accuracy
FDR
-50
—
+50
KHz
Maximum frequency drift
—
30
—
KHz
Initial frequency drift
—
10
—
KHz
Drift rate
Spurious
emissions
In-band
emissions
Rev. 1.10
—
0.2
—
KHz/50us
Frequency < 2.4GHz
—
-50
—
dBm
Frequency in 2.4-12 GHz
—
-40
—
dBm
< f ± 2MHz ( f=2400~2483.5MHz,
PTX=0dBm )
—
-51
—
dBm
> f ± 3MHz ( f=2400~2483.5MHz,
PTX=0dBm )
—
-55
—
dBm
6
May 19, 2017
BC7601/BC7602
Functional Description
Controller Interface
Application Controller Interface
Introduction
The BC760x device includes an Application Controller Interface which supports two different transport
layers selected according to the logic level of the
STATE and SPI-UR_N pins during power-on.
These devices are fully-integrated, single-chip
Bluetooth Low Energy, BLE, controllers. The devices are
specially designed to act as BLE slave devices in accordance
with the Bluetooth specification v4.1. The devices can
be controlled by any external microcontroller through
the Application Controller Interface, ACI, which is
specially designed to allow easy communication with
external circuitry. The UART and SPI interfaces are
available as the ACI transport layers. Additionally,
during any time intervals where there is no active BLE
RF connection, the devices will enter the Sleep Mode
which can further reduce the power consumption.
As the complexity of BLE RF controllers does not
permit comprehensive RF operation information to be
provided in this datasheet, the reader should therefore
refer to the corresponding user manuals for a detailed
understanding of the BLE RF.
• STATE/SPI-UR_N with pull-high resistor – selects
the SPI interface
• STATE/SPI-UR_N with pull-down resistor – selects
the UART interface
For the SPI interface, the Write FIFO command must
be sent first for each CMD from the host to the devices while the read FIFO command must be sent first
for each Return operation. For the UART interface
the write FIFO and read FIFO commands are not
required. Data follows the little-endian format whose
commands are shown in Figure 1.
Packet
Type
Payload
Ctrl CMD
0x25
8 bits
CtrlCode
8 bits
Read Ctrl Info CMD
0x20
8 bits
CtrlCode
8 bits
Ctrl Info Return
0x21
8 bits
CtrlCode
8 bits
Data Packet CMD
0x22
8 bits
DataLength
8 bits
Return Packet
0x26
8bit
CtrlCode
8 bits
Write Phy CMD
0x55
8 bits
DataLength
8bit(<62)
Read Phy CMD
0x56
8 bits
DataLength
8 bits(<62)
Read Phy Return
0x57
8 bits
DataLength
8 bits
CtrlDataLength
8 bits
CtrlDataLength
*8 bits
DataLength
8 bit
DataLength
*8 bits
DataLength
*8 bits
DataReturn
8 bits
Reserved
16bit
Address
32bit
DataLength
*32bit
Address
32 bits
Reserved
16 bit
Address
32 bits
DataLength
*32 bits
Figure 1. BC7601/BC7602 ACI Protocol
Rev. 1.10
7
May 19, 2017
BC7601/BC7602
SPI Interface
Pin Name
The BC760x devices include a 5-wire, 8-bit, MSB-first,
Motorola-compatible with CPOL=0 and CPHA=0 slave
SPI interface. The slave SPI interface has the following
characteristics.
• SPI clock speed up to 10 MHz
• Supports mode 0 only
In/Out
SPI Description
SPI_CLK
In
SPI clock
SPI_MOSI
In
SPI master output slave input
SPI_MISO
Out
SPI master input slave output
SPI_CS
In
SPI_INT
Out
SPI CS, active low.
SPI interrupt request
Note: The SPI-UR_N pin is pulled high during power-on
period.
• Integrated 32 byte RX/TX FIFOs for continuous SPI
bursts.
Table 1. SPI Pin Function
• Protocol and Timing
The SPI timing diagram is shown in Figure 2.
SPI_CLK CPOL=0
SPI_MOSI
MSB
6
5
4
3
2
1
LSB
SPI_MISO
MSB
6
5
4
3
2
1
LSB
SPI_CS
Figure 2. SPI Timing Diagram
• SPI command format and timing
The SPI registers can be accessed by both the host and controller for reading or to configure the device registers
SPI Register name
SPI Register Address
Parameter Value Description
0x0
bit[11:6]: SPI TX FIFO threshold
bit[5:0]: SPI RX FIFO threshold
0x01
Interrupt status:
bit[4]: SPI RX FIFO not empty
bit[3]: SPI RX FIFO overflow
bit[2]: SPI RX FIFO over threshold
bit[1]: SPI RX FIFO empty
bit[0]: SPI RX FIFO under threshold
0x02
Interrupt enable control:
bit[4]: SPI RX FIFO not empty interrupt
bit[3]: SPI RX FIFO overflow interrupt
bit[2]: SPI RX FIFO over threshold interrupt
bit[1]: SPI RX FIFO empty interrupt
bit[0]: SPI RX FIFO under threshold interrupt * set 1 to Enable the
corresponding interrupt
Int_Clr
0x03
Interrupt clear control, write only
bit[4]: SPI RX FIFO not empty status clear
bit[3]: SPI RX FIFO overflow status clear
bit[2]: SPI RX FIFO over threshold status clear
bit[1]: SPI RX FIFO empty status clear
bit[0]: SPI RX FIFO under threshold status clear * set 1 to clear the
corresponding status bit
fifoCount
0x04
bit [11:6]: SPI RX FIFO count
bit [5:0]: SPI TX FIFO count
Threshold
Int_status
Int_En
Table 2. SPI Interface Register Description
Rev. 1.10
8
May 19, 2017
BC7601/BC7602
SPI CMD Format
CMD Name
Bit [7:5]
Bit[4:0]
Read Register
000b
Bit [4:1] = SPI Register address, bit[0] =1
Write Register
001b
Bit [4:1] = SPI Register address, bit[0] =1
Read FIFO
011b
Bit [4:0] = n, “n” means n bytes where n=0 means 32bytes.
Write FIFO
101b
Bit [4:0] = n, “n” means n bytes where n=0 means 32bytes.
Table 3. SPI register and FIFO Operation List
SPI_CS
SPI_CLK
SPI_MOSI
Read Reg CMD
D7 D6 D5 D4 D3 D2 D1 D0
SPI_MISO
Reg value high 8 bits
Reg value low 8 bits
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Figure 3. Read SPI Register Operation
SPI_CS
SPI_CLK
SPI_MOSI
Write Reg CMD
Reg value high 8 bits
Reg value low 8 bits
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
SPI_MISO
Figure 4. Write SPI Register Operation
SPI_CS
SPI_CLK
SPI_MOSI
Read FIFO CMD
D7 D6 D5 D4 D3 D2 D1 D0
SPI_MISO
FIFO data 0
FIFO data N
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Figure 5. Read SPI FIFO Operation
SPI_CS
SPI_CLK
SPI_MOSI
Write FIFO CMD
FIFO data 0
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
FIFO data N
D7 D6 D5 D4 D3 D2 D1 D0
SPI_MISO
Figure 6. Write FIFO Operation
Rev. 1.10
9
May 19, 2017
BC7601/BC7602
monitoring the STATE pin. When the WAKEUP pin
is pulled low, the device will enter the Sleep mode
and the STATE pin will go low. If the device is in the
Sleep Mode, it can be woken up using the WAKEUP
pin. When the WAKEUP pin is pulled high, the device
will be woken up and the STATE pin will go high.
UART Interface
The UART interface supports hardware flow control
signals, RTS and CTS, with the following features.
• 16 byte transmit and receive FIFOs
• Hardware flow control support (CTS/RTS)
• 8 data bits per character
When the device enters the Sleep Mode, the external
master SPI request can also wake up the device. If a
high-to-low signal appears on the SPI_CS pin in the
Sleep Mode, the device will be woken up and respond
to the external host request. After the external master
SPI access requests have been served, the device may
stay in the operating mode or enter the Sleep Mode
again depending upon the WAKEUP pin status.
• Programmable serial data baud rate from 2400 to
256000
• Connect CTS to VSS when flow control is not used
Pin Name
In/Out
UART Description
UART_RTS
Out
UART required to send
UART_RXD
In
UART RX data
UART_TXD
Out
UART TX data
UART_CTS
In
Power Down Mode
UART clear to send
Note: The SPI-UR_N pin is pulled low during power-on
period.
The IIC_SDA, IIC_SCL pins can be used as the I2C
interface when the IIC_SDA line is pulled high.
The PDN pin is used to power down the device. If the
PDN pin is pulled low, the device will enter the power
down mode and all internal clocks will be disabled.
After the device has been powered down, there is
only one way to reactivate the device which is to reset
the device by pulling the RST_N pin low and then reinitialising the device.
Sleep and Wake-up
External Interrupt
The WAKEUP pin is used to select the device
operation mode while the STATE pin is used to
indicate the device operation status. The external host
controller can check the device operation mode by
The devices provide an INT_EXT pin to output the
interrupt signal to an external microcontroller. If the
INT_EXT pin status is low, this means that the valid
data is ready.
Table 4. UART Pin Function
I2C Interface
Rev. 1.10
10
May 19, 2017
BC7601/BC7602
Application Circuits
L5
Bead
C7
0.1µF
X1
32MHz
C8
0.1µF
VDD15
ANT1
Antenna
To
MCU
32
31
30
29
28
27
26
25
EE_WP
IIC_SDA
NC
DVDD_12
XO
XI
VDDLO_15
DC_TEST
1 DFT
L4
RFIO 23
3 SPI_CLK/UR_RTS
VDDRF_15 22
4 SPI_MOSI/UR_RXD
VDDIF_15 21
BC7601
32QFN
5 SPI_MISO/UR_TXD
6 NC
RFGND 20
L3
Bead
C4
0.1µF
L2
Bead
C3
0.1µF
VDD15
VDD15
IIC_CLK 19
Expose Pad
RFGND
7 PDN
C5
4.7nH 2.4pF
RFGND 24
2 SPI_CS/UR_CTS
VDD
C6
3.3pF
NC 18
8 PVIN
RST_N 17
NC
DCDC_SW
VOUT_15
SPI_INT
SPI-UR_N
WAKEUP
INT_EXT
STATE
9
10
11
12
13
14
15
16
C1
0.1µF
L1
2.2
µH
C2
4.7µF
VDD15
Rev. 1.10
11
May 19, 2017
BC7601/BC7602
VDD15
VDD
C8
C9
4.7µF
PDN
R1 4.7K
To
MCU
R2 4.7K
42
41
40
39
38
37
SCL
SDA
NC
VOUT_15
DCDC_SW
PVIN
NC
SPI-UR_N
36
35
34
33
RST_N
43
STATE
44
WAKEUP
45
INT_EXT
46
NC
C1
0.1µF
0.1µF
WP
VDD
2.2
µH
L5
1 VDD
IIC_CLK 32
2 NC
EE_WP 31
3 NC
IIC_SDA 30
4 NC
DVDD_12 29
BC7602
46QFN
5 NC
Expose Pad
6 A0
XO 28
XI 27
RFGND
SPI_MOSI/UR_RXD
SPI_CLK/UR_RTS
SPI_CS/UR_CTS
NC
NC
RFGND
DC_TEST 25
SPI_MISO/UR_TXD
8 A2
PDN
VDDLO_15 26
SPI_INT
7 A1
11
12
13
14
15
16
17
18
19
9 VSS
VDDIF_15
VDDRF_15
RFIO
RFGND
NC
10
VDDRF_15 24
20
21
22
23
C7
0.1µF
X1
32MHz
L4
Bead
C6
0.1µF
VDD15
L3
Bead
C5
0.1µF
VDD15
L2
C3
2.4pF
L1
4.7nH
C2
3.3pF
ANT1
Antenna
Bead
C4
0.1µF
VDD15
Note: All decoupling capacitors should be located as close as possible to the device pins.
Rev. 1.10
12
May 19, 2017
BC7601/BC7602
Package Information
Note that the package information provided here is for consultation purposes only. As this information may be
updated at regular intervals users are reminded to consult the Holtek website for the latest version of the Package/
Carton Information.
Additional supplementary information with regard to packaging is listed below. Click on the relevant section to be
transferred to the relevant website page.
• Package Information (include Outline Dimensions, Product Tape and Reel Specifications)
• The Operation Instruction of Packing Materials
• Carton information
Rev. 1.10
13
May 19, 2017
BC7601/BC7602
SAW Type 32-pin (4mm×4mm) QFN Outline Dimensions
Symbol
Nom.
Max.
A
0.028
0.030
0.031
A1
0.000
0.001
0.002
A3
—
0.008 BSC
—
b
0.006
0.008
0.010
D
—
0.157 BSC
—
E
—
0.157 BSC
—
e
—
0.016 BSC
—
D2
0.104
0.106
0.108
E2
0.104
0.106
0.108
L
0.014
0.016
0.018
K
0.008
—
—
Symbol
Rev. 1.10
Dimensions in inch
Min.
Dimensions in mm
Min.
Nom.
Max.
A
0.700
0.750
0.800
A1
0.000
0.020
0.050
A3
—
0.203 BSC
—
b
0.150
0.200
0.250
D
—
4.000 BSC
—
E
—
4.000 BSC
—
e
—
0.40 BSC
—
D2
2.65
2.70
2.75
E2
2.65
2.70
2.75
L
0.35
0.40
0.45
K
0.20
—
—
14
May 19, 2017
BC7601/BC7602
SAW Type 46-pin (6.5mm×4.5mm) QFN Outline Dimensions
Symbol
Nom.
Max.
A
0.031
0.033
0.035
A1
0.000
0.001
0.002
A3
—
0.008 BSC
—
b
0.006
0.008
0.010
D
0.254
0.256
0.258
E
0.175
0.177
0.179
e
—
0.016 BSC
—
D2
0.197
0.201
0.205
E2
0.118
0.122
0.126
L
0.012
0.016
0.020
K
—
—
—
Symbol
Rev. 1.10
Dimensions in inch
Min.
Dimensions in mm
Min.
Nom.
Max.
A
0.800
0.850
0.900
A1
0.000
0.020
0.040
A3
—
0.200 BSC
—
b
0.150
0.200
0.250
D
6.450
6.500
6.550
E
4.450
4.500
4.550
e
—
0.40 BSC
—
D2
5.00
5.10
5.20
E2
3.00
3.10
3.20
L
0.30
0.40
0.50
K
—
—
—
15
May 19, 2017
BC7601/BC7602
Copyright© 2017 by HOLTEK SEMICONDUCTOR INC.
The information appearing in this Data Sheet is believed to be accurate at the time
of publication. However, Holtek assumes no responsibility arising from the use of
the specifications described. The applications mentioned herein are used solely
for the purpose of illustration and Holtek makes no warranty or representation that
such applications will be suitable without further modification, nor recommends
the use of its products for application that may present a risk to human life due to
malfunction or otherwise. Holtek's products are not authorized for use as critical
components in life support devices or systems. Holtek reserves the right to alter
its products without prior notification. For the most up-to-date information, please
visit our web site at http://www.holtek.com/en/.
Rev. 1.10
16
May 19, 2017
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