PD-97768
AUTOMOTIVE GRADE
AUIRFBA1405
HEXFET® Power MOSFET
Features
l
l
l
l
l
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Advanced Planar Technology
Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Repetitive Avalanche Allowed
up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified*
D
G
S
Description
V(BR)DSS
55V
RDS(on) typ.
max
ID (Silicon Limited)
4.3m
5.0m
174A
ID (Package Limited)
95A
h
D
Specifically designed for Automotive applications, this
Stripe Planar design of HEXFET® Power MOSFETs
utilizes the latest processing techniques to achieve
low on-resistance per silicon area. This benefit combined with the fast switching speed and ruggedized
device design that HEXFET power MOSFETs are well
known for, provides the designer with an extremely
efficient and reliable device for use in Automotive and
a wide variety of other applications.
G
D
S
Super-220
AUIRFBA1405
G
Gate
D
Drain
S
Source
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the
specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Ambient temperature (TA) is 25°C, unless otherwise specified.
Parameter
ID @ T C = 25°C
Max.
Units
h
123h
174
Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ T C = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
A
ID @ T C = 25°C
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
c
95
IDM
680
PD @T C = 25°C
330
2.2
± 20
W
W/°C
560
mJ
See Fig.12a, 12b, 15, 16
A
VGS
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
EAS
Single Pulse Avalanche Energy (Thermally Limited)
IAR
Avalanche Current
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode recovery dv/dt
Operating Junction and
T STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
c
e
i
d
V
mJ
V/ns
5.0
-40 to + 175
-55 to + 175
300 (1.6mm from case )
°C
Thermal Resistance
Parameter
Typ.
Max.
RJC
Junction-to-Case j
–––
0.45
RCS
Case-to-Sink, Flat, Greased Surface
0.50
–––
RJA
Junction-to-Ambient
–––
58
Units
°C/W
HEXFET® is a registered trademark of International Rectifier.
*Qualification standards can be found at http://www.irf.com/
www.irf.com
1
03/15/12
AUIRFBA1405
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
V(BR)DSS / TJ Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
RDS(on)
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
Drain-to-Source Leakage Current
IDSS
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
55
–––
–––
2.0
69
–––
–––
–––
–––
–––
0.057
4.3
–––
–––
–––
–––
–––
–––
–––
–––
5.0
4.0
–––
20
250
200
-200
V
V/°C
m
V
S
μA
nA
VGS = 0V, ID = 250μA
Reference to 25°C, ID = 1mA
VGS = 10V, ID = 101A
VDS = 10V, ID = 250μA
VDS = 25V, ID = 110A
VDS = 55V, VGS = 0V
VDS = 44V, VGS = 0V, T J = 150°C
VGS = 20V
VGS = -20V
f
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Qg
Q gs
Q gd
td(on)
tr
td(off)
tf
LD
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
LS
Internal Source Inductance
Cis s
Cos s
Crs s
Cos s
Cos s
Cos s eff.
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Diode Characteristics
g
Parameter
IS
ISM
VSD
trr
Q rr
ton
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
c
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Starting TJ = 25°C, L = 0.11mH
RG = 25, IAS = 101A. (See Figure 12).
ISD 101A, di/dt 210A/μs, VDD V(BR)DSS,
TJ 175°C.
Pulse width 400μs; duty cycle 2%.
2
Min.
Typ. Max. Units
–––
–––
–––
–––
–––
–––
–––
170
44
62
13
190
130
110
260
66
93
–––
–––
–––
–––
–––
4.5
–––
–––
7.5
–––
–––
–––
–––
–––
–––
–––
5480
1210
280
5210
900
1500
–––
–––
–––
–––
–––
–––
nC
ns
nH
pF
–––
–––
–––
–––
–––
–––
Intrinsic
174
h
680
f
f
D
G
S
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 44V
Min. Typ. Max. Units
–––
Conditions
ID = 101A
VDS = 44V
VGS = 10V
VDD = 38V
ID = 110A
RG = 1.1
VGS = 10V
Between lead,
6mm (0.25in.)
from package
and center of die contact
VGS = 0V
VDS = 25V
ƒ = 1.0MHz, See Fig.5
A
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
D
G
S
f
–––
1.3
V
T J = 25°C, IS = 101A, VGS = 0V
88
130
ns T J = 25°C, IF = 101A
250
380
nC di/dt = 100A/μs
turn-on time is negligible (turn-on is dominated by LS+LD)
f
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS. Refer to AN-1001.
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 95A.
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
R is measured at TJ of approximately 90°C.
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AUIRFBA1405
Qualification Information
†
Automotive
(per AEC-Q101)
Qualification Level
Moisture Sensitivity Level
Machine Model
Comments: This part number(s) passed Automotive qualification.
IR’s Industrial and Consumer qualification level is granted by
extension of the higher Automotive level.
TO-220
N/A
Class M4 (+/- 600V)
††
AEC-Q101-002
ESD
Human Body Model
Class H2 (+/- 4000V) ††
AEC-Q101-001
Charged Device Model
Class C5 (+/- >2000V) ††
AEC-Q101-005
RoHS Compliant
Yes
Qualification standards can be found at International Rectifiers web site: http//www.irf.com/
Highest passing voltage.
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3
AUIRFBA1405
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
100
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
100
10
4.5V
20μs PULSE WIDTH
TJ = 25 °C
1
0.1
1
10
4.5V
10
0.1
100
Fig 1. Typical Output Characteristics
3.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TJ = 25 ° C
TJ = 175 ° C
100
10
V DS = 25V
20μs PULSE WIDTH
6
8
10
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
4
10
100
Fig 2. Typical Output Characteristics
1000
4
1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
1
20μs PULSE WIDTH
TJ = 175 ° C
12
ID = 169A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
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AUIRFBA1405
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
C, Capacitance(pF)
Coss = Cds + Cgd
10000
Ciss
Coss
1000
Crss
20
VGS , Gate-to-Source Voltage (V)
100000
10
12
8
4
0
100
FOR TEST CIRCUIT
SEE FIGURE 13
0
60
120
180
240
300
QG , Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
10000
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
TJ = 175 ° C
1000
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
VDS = 44V
VDS = 27V
16
100
1
ID = 101A
100
10us
100us
100
TJ = 25 ° C
10
1
0.0
V GS = 0 V
0.5
1.0
1.5
2.0
2.5
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
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3.0
1ms
10ms
10
1
TC = 25 ° C
TJ = 175 ° C
Single Pulse
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
5
AUIRFBA1405
VDS
200
LIMITED BY PACKAGE
VGS
RD
D.U.T.
RG
160
+
I D , Drain Current (A)
-VDD
120
10V
Pulse Width µs
Duty Factor
80
Fig 10a. Switching Time Test Circuit
40
0
VDS
25
50
75
100
125
150
TC , Case Temperature ( °C)
90%
175
10%
VGS
td(on)
Fig 9. Maximum Drain Current Vs.
Case Temperature
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
PDM
0.01
t1
t2
0.001
0.00001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
6
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AUIRFBA1405
15V
DRIVER
L
VDS
D.U.T
RG
+
V
- DD
IAS
20V
0.01
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS , Single Pulse Avalanche Energy (mJ)
1200
ID
41A
71A
BOTTOM 101A
TOP
1000
A
800
600
400
200
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( °C)
I AS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
10 V
QGS
QGD
VG
4.0
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50K
12V
VGS(th) , Variace ( V )
3.5
ID = 250μA
3.0
2.5
2.0
.2F
.3F
D.U.T.
+
V
- DS
1.5
-75
VGS
-50
-25
0
25
50
75
100 125 150 175
T J , Temperature ( °C )
3mA
IG
ID
Current Sampling Resistors
Fig 14. Threshold Voltage Vs. Temperature
Fig 13b. Gate Charge Test Circuit
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7
AUIRFBA1405
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming Tj = 25°C due to
avalanche losses
0.01
100
0.05
0.10
10
1
1.0E-08
1.0E-07
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
600
TOP
Single Pulse
BOTTOM 10% Duty Cycle
ID = 101A
500
400
300
200
100
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
Vs. Temperature
8
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
175
D = Duty cycle in avalanche = t av ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
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AUIRFBA1405
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
+
-
-
+
+
RG
VGS
*
-
dv/dt controlled by RG
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[
] ***
VGS=10V
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
[
Re-Applied
Voltage
Body Diode
VDD
]
Forward Drop
Inductor Curent
ISD
Ripple 5%
[
]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
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Fig 17. For N-channel HEXFET® power MOSFETs
9
AUIRFBA1405
Super-220 Package Outline
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Super-220 not recommended for surface mount application
Super-220 Part Marking Information
Part Number
AUFBA1405
YWWA
IR Logo
XX
or
Date Code
Y= Year
WW= Work Week
A= Automotive, Lead Free
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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AUIRFBA1405
Ordering Information
Base part
number
Package Type
Standard Pack
AUIRFBA1405
Super-220
Form
Tube
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Complete Part Number
Quantity
50
AUIRFBA1405
11
AUIRFBA1405
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(IR) reserve the right to make corrections, modifications, enhancements, improvements, and other changes
to its products and services at any time and to discontinue any product or services without notice. Part numbers
designated with the AU prefix follow automotive industry and / or customer specific requirements with
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accordance with IRs standard warranty. Testing and other quality control techniques are used to the extent
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of all parameters of each product is not necessarily performed.
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