TI1 DS36C280MX/NOPB Ds36c280 slew rate controlled cmos eia-rs-485 transceiver Datasheet

DS36C280
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SNLS097C – JULY 2000 – REVISED FEBRUARY 2013
DS36C280 Slew Rate Controlled CMOS EIA-RS-485 Transceiver
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FEATURES
DESCRIPTION
•
The DS36C280 is a low power differential bus/line
transceiver designed to meet the requirements of RS485 Standard for multipoint data transmission. In
addition, it is compatible with TIA/EIA-422-B.
1
2
•
•
•
•
•
•
•
•
•
•
•
(1)
100% RS-485 Compliant
– Guaranteed RS-485 Device Interoperation
Low Power CMOS Design: ICC 500 μA max
Adjustable Slew Rate Control
– Minimizes EMI Effects
Built-In Power Up/Down Glitch-Free Circuitry
– Permits Live Transceiver
Insertion/Displacement
SOIC Packages
Industrial Temperature Range: −40°C to
+85°C
On-board Thermal Shutdown Circuitry
– Prevents Damage to the Device in the Event
of Excessive Power Dissipation
Wide Common Mode Range: −7V to +12V
Receiver Open Input Fail-safe (1)
¼ unit load (DS36C280): ≥128 nodes
½ unit load (DS36C280T): ≥64 nodes
ESD (human body model): ≥2 kV
Non-terminated, Open Inputs only
The slew rate control feature allows the user to set
the driver rise and fall times by using an external
resistor. Controlled edge rates can reduce switching
EMI.
The CMOS design offers significant power savings
over its bipolar and ALS counterparts without
sacrificing ruggedness against ESD damage. The
device is ideal for use in battery powered or power
conscious applications. ICC is specified at 500 μA
maximum.
The driver and receiver outputs feature TRI-STATE
capability. The driver outputs operate over the entire
common mode range of −7V to +12V. Bus contention
or fault situations are handled by a thermal shutdown
circuit, which forces the driver outputs into the high
impedance state.
The receiver incorporates a fail safe circuit which
guarantees a high output state when the inputs are
left open (1).
Connection and Logic Diagram
Figure 1. See Package Number D (R-PDSO-G8)
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2013, Texas Instruments Incorporated
DS36C280
SNLS097C – JULY 2000 – REVISED FEBRUARY 2013
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Truth Table (1)
DRIVER SECTION
DE/RE*
DI
DO/RI
H
H
H
DO*/RI*
L
H
L
L
H
L
X
Z
Z
RECEIVER SECTION
DE/RE*
RI-RI*
RO
L
≥+0.2V
H
L
≤−0.2V
L
H
X
Z
L
(1)
OPEN
(1)
H
Non-terminated, Open Inputs only
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
Supply Voltage (VCC)
+12V
−0.5V to (VCC +0.5V)
Input Voltage (DE/RE*, & DI)
Common Mode (VCM)
Driver Output/Receiver Input
±15V
Input Voltage (DO/RI, DO*/RI*)
±14V
−0.5V to (VCC +0.5V)
Receiver Output Voltage
Maximum Package Power Dissipation @ +25°C
M Package 1190 mV, derate
9.5 mW/°C above +25°C
−65°C to +150°C
Storage Temperature Range
Lead Temperature
+260°C
(Soldering 4 sec.)
(1)
(2)
“Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to
imply that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device
operation.
If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
Recommended Operating Conditions
Supply Voltage (VCC)
Bus Voltage
Min
Typ
Max
Units
+4.75
+5.0
+5.25
V
+12
V
−7
Operating Free Air Temperature (TA)
DS36C280T
DS36C280
2
−40
+25
+85
°C
0
+25
+70
°C
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Electrical Characteristics (1) (2)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
Symbol
Parameter
Conditions
Reference
Min
Typ
Max
Units
1.5
5.0
V
0
5.0
V
0
5.0
V
DIFFERENTIAL DRIVER CHARACTERISTICS
VOD1
Differential Output Voltage
IO = 0 mA (No Load)
VOD0
Output Voltage
IO = 0 mA
VOD0*
Output Voltage
(Output to GND)
VOD2
Differential Output Voltage
(Termination Load)
RL = 50Ω
(422)
RL = 27Ω
(485)
Balance of VOD2
RL = 27Ω or 50Ω
ΔVOD2
(422)
(485)
VOC
ΔVOC
IOSD
2.0
2.8
1.5
2.3
5.0
V
V
−0.2
0.1
+0.2
V
1.5
2.0
5.0
V
0
3.0
V
0
3.0
V
−0.2
+0.2
V
(3)
|VOD2 − VOD2*|
VOD3
Figure 2
(422, 485)
Differential Output Voltage
(Full Load)
R1 = 54Ω, R2 = 375Ω
Figure 3
Driver Common Mode
Output Voltage
RL = 27Ω
(485)
RL = 50Ω
(422)
Balance of VOC
RL = 27Ω or
|VOC − VOC*|
RL = 50Ω
Driver Output Short-Circuit
Current
VO = +12V
(485)
200
+250
mA
VO = −7V
(485)
−190
−250
mA
+0.035
+0.2
V
VTEST = −7V to +12V
Figure 2
(3)
(422, 485)
RECEIVER CHARACTERISTICS
Differential Input High
Threshold Voltage
VO = VOH, IO = −0.4 mA
Differential Input Low
Threshold Voltage
VO = VOL, IO = 0.4 mA
VHST
Hysteresis (5)
VCM = 0V
RIN
Input Resistance
−7V ≤ VCM ≤ +12V
DS36C280T
24
RIN
Input Resistance
−7V ≤ VCM ≤ +12V
DS36C280
48
IIN
Line Input Current
Other Input = 0V
VTH
VTL
(6)
−7V ≤ VCM ≤ +12V
(4)
(422, 485)
−0.2
−7V ≤ VCM ≤ +12V
DS36C280
DE = VIL, RE* = VIL
VCC = 4.75 to 5.25
DS36C280T
or 0V
IING
Line Input Current
Glitch (6)
Other Input = 0V
DS36C280
DE = VIL, RE* = VIL
VCC = +3.0V
DS36C280T
or 0V TA = 25°C
IB
Input Balance Test
RS = 500Ω
VOH
High Level Output Voltage
IOH = −4 mA, VID = +0.2V
VOL
Low Level Output Voltage
IOL = +4 mA, VID = −0.2V
IOSR
Short Circuit Current
VO = GND
IOZR
TRI-STATE Leakage Current
VO = 0.4V to 2.4V
−0.035
V
70
mV
68
kΩ
68
kΩ
VIN = +12V
0
0.19
0.25
mA
VIN = −7V
0
−0.1
−0.2
mA
VIN = +12V
0
0.19
0.5
mA
VIN = −7V
0
−0.1
−0.4
mA
VIN = +12V
0
0.19
0.25
mA
VIN = −7V
0
−0.1
−0.2
mA
VIN = +12V
0
0.19
0.5
mA
VIN = −7V
0
−0.1
−0.4
mA
±400
mV
(422)
(7)
RO
Figure 12
3.5
RO
7
4.6
V
0.3
0.5
V
35
85
mA
±1
μA
DEVICE CHARACTERISTICS
(1)
(2)
(3)
(4)
(5)
(6)
(7)
Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground
except VOD1 and VOD2.
All typicals are given for: VCC = +5.0V, TA = + 25°C.
Delta |VOD2| and Delta |VOC| are changes in magnitude of VOD2 and VOC, respectively, that occur when input changes state.
Threshold parameter limits specified as an algebraic value rather than by magnitude.
Hysteresis defined as VHST = VTH − VTL.
IIN includes the receiver input current and driver TRI-STATE leakage current.
For complete details of test, see RS-485.
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Electrical Characteristics(1)(2) (continued)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
Symbol
Parameter
Conditions
Reference
Min
Typ
Max
Units
V
VIH
High Level Input Voltage
2.0
VCC
VIL
Low Level Input Voltage
GND
0.8
V
IIH
High Level Input Current
VIH = VCC
2
μA
IIL
Low Level Input Current
VCC = 5.0V
−2
μA
VCC = +3.0V
DE/RE*,
DI
VIL = 0V
SR = 0V
ICCR
Power Supply Current
(No Load)
ICCD
−2
μA
−1
mA
200
500
μA
200
500
μA
SR
Driver OFF, Receiver ON
VCC
Driver ON, Receiver OFF
Switching Characteristics (1) (2) (3)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
Symbol
Parameter
Conditions
Reference
Min
Typ
Max
Units
Figure 6, Figure 7
10
399
1000
ns
10
400
1000
ns
0
1
10
ns
DRIVER CHARACTERISTICS
tPHLD
Differential Propagation
Delay High to Low
tPLHD
Differential Propagation
Delay Low to High
tSKD
Differential Skew
RL = 54Ω, CL = 100 pF
|tPHLD − tPLHD|
tr
Rise Time
tf
Fall Time
tr
Rise Time
tf
Fall Time
tr
Rise Time
tf
Fall Time
tPHZ
Disable Time High to Z
tPLZ
Disable Time Low to Z
tPZH
Enable Time Z to High
tPZL
Enable Time Z to Low
SR = Open
SR = 100 kΩ
SR = Short
CL = 15 pF
CL = 100 pF
2870
ns
3070
ns
1590
ns
1640
ns
100
337
1000
ns
100
348
1000
ns
Figure 8, Figure 9
1100
2000
ns
Figure 10, Figure 11
500
800
ns
Figure 8, Figure 9
300
500
ns
Figure 10, Figure 11
300
500
ns
30
210
400
ns
30
190
400
ns
0
20
50
ns
50
150
ns
55
150
ns
40
150
ns
45
150
ns
RECEIVER CHARACTERISTICS
tPHL
Propagation Delay
High to Low
tPLH
Propagation Delay
Low to High
tSK
Skew, |tPHL − tPLH|
tPLZ
Output Disable Time
CL = 15 pF
Figure 13, Figure 14
CL = 15 pF
tPHZ
tPZL
Figure 15, Figure 16,
Figure 17
Output Enable Time
tPZH
(1)
(2)
(3)
4
All typicals are given for: VCC = +5.0V, TA = + 25°C.
CL includes probe and jig capacitance.
SR = GND for all Switching Characteristics unless otherwise specified.
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PARAMETER MEASUREMENT INFORMATION
Figure 2. Driver VOD2 and VOC
Figure 3. Driver VOD3
Figure 4. Driver VOH and VOL
Vtest = −7V to +12V
Figure 5. Driver IOSD
Figure 6. Driver Differential Propagation Delay Test
Circuit
Figure 7. Driver Differential Propagation Delays
and Differential Rise and Fall Times
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Figure 8. TRI-STATE Test Circuit (tPZH , tPHZ)
Figure 9. TRI-STATE Waveforms (tPZH, tPHZ)
Figure 10. TRI-STATE Test Circuit (tPZL, tPLZ)
Figure 11. TRI-STATE Waveforms (tPZL, tPLZ)
Figure 12. Receiver VOH and VOL
Figure 13. Receiver Differential Propagation Delay
Test Circuit
Figure 14. Receiver Differential Propagation Delay Waveforms
6
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Figure 15. Receiver TRI-STATE Test Circuit
Figure 16. Receiver Enable and Disable Waveforms (tPLZ, tPZL)
Figure 17. Receiver Enable and Disable Waveforms (tPHZ, tPZH)
Typical Application Information
Figure 18. Typical Pin Connection
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Table 1. DEVICE PIN DESCRIPTIONS
Pin #
Name
Description
1
RO
Receiver Output: When DE/RE* (Receiver Enable) is LOW, the receiver is enabled (ON), if DO/RI ≥ DO*/RI* by 200 mV,
RO will be HIGH. If DO/RI ≤ DO*/RI* by 200 mV, RO will be LOW. Additionally RO will be HIGH for OPEN (Nonterminated) inputs.
2
SR
Slew Rate Control: A resistor connected to Ground controls the Driver Output rising and falling edge rates.
3
DE/RE*
Combined Driver and Receiver Output Enable: When signal is LOW the receiver output is enabled and the driver outputs
are in TRI-STATE (OFF). When signaI is HlGH, the receiver output is in TRI-STATE (OFF) and the driver outputs are
enabled.
4
DI
Driver Input: When DE/RE* is HlGH, the driver is enabled, if DI is LOW, then DO/RI will be LOW and DO*/RI* will be
HIGH. If DI is HIGH, then DO/RI is HIGH and DO*/RI* is LOW.
5
GND
Ground Connection
6
DO/RI
Driver Output/Receiver Input, 485 Bus Pin.
7
DO*/RI* Driver Output/Receiver Input, 485 Bus Pin.
8
VCC
Positive Power Supply Connection: Recommended operating range for VCC is +4.75V to +5.25V.
Unit Load
A unit load for a RS-485 receiver is defined by the input current versus the input voltage curve. The gray shaded
region is the defined operating range from −7V to +12V. The top border extending from −3V at 0 mA to +12V at
+1 mA is defined as one unit load. Likewise, the bottom border extending from +5V at 0 mA to −7V at −0.8 mA is
also defined as one unit load (see Figure 19 ). A RS-485 driver is capable of driving up to 32 unit loads. This
allows upto 32 nodes on a single bus. Although sufficient for many applications, it is sometime desirable to have
even more nodes. For example an aircraft that has 32 rows with 4 seats per row could benefit from having 128
nodes on one bus. This would allow signals to be transferred to and from each individual seat to 1 main station.
Usually there is one or two less seats in the last row of the aircraft near the restrooms and food storage area.
This frees the node for the main station.
The DS36C278, the DS36C279, and the DS36C280 all have ½ unit load and ¼ unit load (UL) options available.
These devices will allow upto 64 nodes or 128 nodes guaranteed over temperature depending upon which option
is selected. The ½ UL option is available in industrial temperature and the ¼ UL is available in commercial
temperature.
First, for a ½ UL device the top and bottom borders shown in Figure 19 are scaled. Both 0 mA reference points
at +5V and −3V stay the same. The other reference points are +12V at +0.5 mA for the top border and −7V at
−0.4 mA for the bottom border (see Figure 19 ). Second, for a ¼ UL device the top and bottom borders shown in
Figure 19 are scaled also. Again, both 0 mA reference points at +5V and −3V stay the same. The other
reference points are +12V at +0.25 mA for the top border and −7V at −0.2 mA for the bottom border (see
Figure 19 ).
The advantage of the ½ UL and ¼ UL devices is the increased number of nodes on one bus. In a single master
multi-slave type of application were the number of slaves exceeds 32, the DS36C278/279/280 may save in the
cost of extra devices like repeaters, extra media like cable, and/or extra components like resistors.
The DS36C279 and DS36C280 have addition feature which offer more advantages. The DS36C279 has an
automatic sleep mode function for power conscious applications. The DS36C280 has a slew rate control for EMI
conscious applications. Refer to the sleep mode and slew rate control portion of the application information
section in the corresponding datasheet for more information on these features.
Figure 19. Input Current vs Input Voltage
Operating Range
8
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Slew Rate Control
The DS36C280 features an adjustable slew rate control. This feature allows more control over EMl levels than
tradition fixed edge rate devices. The slew rate control may be adjusted with or without any external components.
The DS36C280 offers both low power (ICC 500 μA max) and low EMI for an RS-485 interface.
The slew rate control is located at pin two of the device and only controls the driver output edges. The slew rate
control pin (SR) may be left open or shorted to ground, with or without a resistor. When the SR pin is shorted to
ground without a resistor, the driver output edges will transition typically 350 ns. When the SR pin is left open,
the driver output edges will transition typically 3 μs. When the SR pin is shorted to ground with a resistor, the
driver output edges will transition between 350 ns and 3 μs depending on the resistor value. Refer to the slew
rate versus resistor value curve in this datasheet for determining resistor values and expected typical slew rate
value. Please note, when slowing the edge rates of the device will decrease the maximum data rate also.
Figure 20. Slew Rate Resistor
vs Differential Rise/Rise/Fall Time
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REVISION HISTORY
Changes from Revision B (February 2013) to Revision C
•
10
Page
Changed layout of National Data Sheet to TI format ............................................................................................................ 9
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PACKAGE OPTION ADDENDUM
www.ti.com
12-Oct-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
DS36C280M/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
36C28
0M
DS36C280MX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
36C28
0M
DS36C280TM/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
36C28
0TM
DS36C280TMX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
36C28
0TM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
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12-Oct-2014
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Oct-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
DS36C280MX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
DS36C280TMX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Oct-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
DS36C280MX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
DS36C280TMX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
Pack Materials-Page 2
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