EVALUATION BOARD DATASHEET EV-175 AAT4712 EVAL: Power Path with Input Current Limit and Capacitor Charger Introduction The AAT4712 is an integrated P-channel MOSFET load switch with adjustable current limits, integrated discharge path, over temperature protection, a power loop and a super capacitor charger. The input current limit control is combined with an over-temperature thermal limit and power loop circuit to provide a comprehensive system to protect the load switch and its supply from load conditions exceeding the supply specifications. A brief “Getting Started” section is included to help the user to begin operating the evaluation board. The AAT4712 evaluation board is shown in Figure 1; Figures 2 and 8 depict the board schematic and layout. For additional information, please consult the AAT4712 product datasheet. Board Picture (a) Top Side (b) Bottom Side Figure 1: AAT4712 Evaluation Board Picture. EV-175.2010.07.1.0 www.analogictech.com 1 EVALUATION BOARD DATASHEET EV-175 AAT4712 EVAL: Power Path with Input Current Limit and Capacitor Charger Schematic VCC VCC D1 LED R1 100K RDY RSET D2 LED 2 1.24M 3 4 5 SYS 6 7 8 C2 10μF R2 100k U1 AAT4712 1 RDY POK ISET GND NC ADJ SYS VCC SYS VCC SYS OUT SYS OUT SYS OUT 16 POK 15 GND RADJ 14 18.2k 13 12 VCC C1 10μF 11 10 9 OUT C3 22μF RB1 Super Cap RB2 Figure 2: AAT4712 Evaluation Board Schematic. Getting Started 1. Connect a DC power supply and a super capacitor or ultra capacitor to the AAT4712 evaluation board as shown in Figure 3. Set the DC power supply to 5V and the load to 0A. After power on, a current up to the current limit (2A set by RSET = 1.24M) charging the super capacitor can be observed by either current meter in the power supply or current probe of an oscilloscope. Figure 4 shows the start-up waveform of charging the super capacitor with softstart at 5V VCC. The operating voltage may vary from 2.5V to 5.5V. 2. After the power is on and the super capacitor is fully charged, the integrated discharge path management can be observed by decreasing the VCC with system load added. The AAT4712 integrates discharge path for SYS (to system load) from the VCC input and OUT input (connect to super capacitor). After the power is on and the super capacitor is fully charged, the super capacitor is used as a backup power to support the system load for a short time when the input voltage drops below the power good detect (POK) threshold and the OUT pin voltage is greater than the VUVLO_OUT and SYS voltage by turning on the OUT to SYS switch discharge path and turning off the path of VCC to SYS. The OUT to SYS switch remains continuously on until the OUT pin voltage falls below VUVLO_OUT. 2 www.analogictech.com EV-175.2010.07.1.0 EVALUATION BOARD DATASHEET EV-175 AAT4712 EVAL: Power Path with Input Current Limit and Capacitor Charger Electronic LOAD 0 to 2A I SYS 0.5F 75mΩ (TDK EDLC272020 -501-2F-50) is adopted as SuperCap for the measurement of the file . The balance resistors are 11kΩ. Power Supply 2.5V to 5.5V IOUT ICC Figure 3: AAT4712 Evaluation Board Demonstration Connection. (a) Zoom in (b) Zoom out Figure 4: AAT4712 Start-up without System Load. EV-175.2010.07.1.0 www.analogictech.com 3 EVALUATION BOARD DATASHEET EV-175 AAT4712 EVAL: Power Path with Input Current Limit and Capacitor Charger Figure 5 shows the dynamic process of the power path switching with VPOK_TH = 4.5V, 0.5F super capacitor with 75mΩ ESR, VCC drops from 5V to 4V with 1A system load. D2 will be lighted when the OUT to SYS path is turned on and VCC to the SYS path is turned off. Figure 6 shows the waveform of the super capacitor supporting the system load as backup power when VCC is removed. The supporting time can be calculated using the following formula: TSUPPORT = (VDROP · IOUT · ESRSUPERCAP) · CSUPERCAP IOUT VDROP is the delta voltage when the super capacitor is active to support the system load and is equal to VCC minus VUVLO_OUT. For the condition as shown in Figure 6, the VDROP is 3V by VCC 5V minus VUVLO_OUT 2V. The supporting time can be calculated using the following equation. The calculation result is same as the measurement result. TSUPPORT = (3V - 1A · 75mΩ) · 0.5F = 1.46 sec. 1A Discharge path management by the AAT4712 can also be observed by observing the input current ICC, system load ISYS, and super capacitor charge current IOUT. The input current is equal to the SYS current plus the OUT charging current as shown in the formula below and if the SYS load current increases/decreases, the OUT charging current will automatically decrease/increase accordingly via the device control loop. ICC = ISYS + IOUT Figure 7 shows the measurement waveform when powering on the AAT4712 with 1A system load. Make sure the super capacitor is fully discharged before doing the measurement. Figure 5: AAT4712 Operating Waveform When VCC Drops from 5V to 4V with 1A System Load. 4 Figure 6: AAT4712 Backup Time when 5V VCC is Removed with 1A System Load and 0.5F SuperCap. www.analogictech.com EV-175.2010.07.1.0 EVALUATION BOARD DATASHEET EV-175 AAT4712 EVAL: Power Path with Input Current Limit and Capacitor Charger Figure 7: AAT4712 Startup with 1A System Load. Current Limit and POK Setting The input current limit is programmed by by the RSET resistor from the ISET pin to ground in the range from 150mA to 2.4A. RSET can be calculated by: RSET = ILIM 1.6 Table 1 lists some 1% standard metal film resistor values for current limit settings. RSET (kΩ) Current Limit (A) 1500 1240 1000 931 750 620 560 499 432 374 316 249 187 93.1 2.4 2 1.6 1.5 1.2 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.15 Table 1: Recommended Current Limit RSET Values. EV-175.2010.07.1.0 www.analogictech.com 5 EVALUATION BOARD DATASHEET EV-175 AAT4712 EVAL: Power Path with Input Current Limit and Capacitor Charger The POK detect threshold can be programmed by the external resistor RADJ connected from the ADJ pin to GND. The RADJ value can be calculated by: 60 RADJ = V POK_TH - 1.2 Table 2 lists some 1% standard metal film resistor values for various VPOK_TH settings. RADJ (kΩ) VPOK_TH (V) 15.8 18.2 20.5 26.1 33.2 47 5.0 4.5 4.0 3.5 3.0 2.5 Table 2: Recommended Resistor Values for VPOK_TH Setting. Printed Circuit Board (a) Top Layer (not to scale) (b) Bottom Layer (not to scale) Figure 8: AAT4712 Evaluation Board. 6 www.analogictech.com EV-175.2010.07.1.0 EVALUATION BOARD DATASHEET EV-175 AAT4712 EVAL: Power Path with Input Current Limit and Capacitor Charger AAT4712 EVAL Component Listing Component Part Number Description Manufacturer U1 R1,R2 RSET RADJ C1,C2 C3 D1, D2 SUPERCAP, RB1, RB2 AAT4712 RC0603FR-071K74L RC0603FR-071M24L RC0603FR-0718K2L GRM21BR61C106K GRM21BR60J226M 0805KRCT Not populated Current Limited Switch with Capcitor Charger RES 1.74KΩ 1/10W 1% 0603 SMD RES 1.24MΩ 1/10W 1% 0603 SMD RES 18.2KΩ 1/10W 1% 0603 SMD Cap Ceramic 10μF 0805 X5R 16V 10% Cap Ceramic 22μF 0805 X5R 6.3V 20% Red LED 0805 AnalogicTech Yageo HB Table 3: AAT4712 Evaluation Board Bill of Materials. Advanced Analogic Technologies, Inc. 3230 Scott Boulevard, Santa Clara, CA 95054 Phone (408) 737-4600 Fax (408) 737-4611 © Advanced Analogic Technologies, Inc. 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