Allegro APS13568ELJATR-T Linear led drive up to 150 ma Datasheet

APS13568
LED Driver with Integrated
Micropower Hall-Effect Switch
FEATURES AND BENEFITS
DESCRIPTION
• Micropower (25 μA, typical) when LED is off
• Linear LED drive up to 150 mA
• Omnipolar Hall-effect switch
□□ Low drift over temperature
□□ Solid-state reliability
□□ Insensitive to physical stress
• External LED-enable pin for direct on/off control
• Hall-effect switch output
□□ Supports secondary switches and/or LED drivers
□□ Provides switch state for other functions
□□ Selectable output polarity
• Automotive-grade ruggedness and fault-tolerance
□□ “K” temperature range qualified per AEC-Q100
□□ Reverse-battery and load-dump protection
□□ Short-circuit protection
□□ Thermal protection
• Internal protection circuits enable 40 V load dump
compliance without external protection components
The APS13568 is an integrated circuit that combines an
ultrasensitive, omnipolar, micropower Hall-effect switch
with a linear programmable current regulator providing up to
150 mA to drive high brightness LEDs. The omnipolar Halleffect switch provides contactless control of the regulated LED
current, which is set by a single reference resistor. This highly
integrated solution offers high reliability and ease of design
compared to a discrete solution.
The Hall-effect switch operates with either a north or a south
magnetic pole. The switch output polarity can be set with an
external pulldown on the POL input pin. This allows the user
to select whether the APS13568 switch output goes low when a
magnet is present or when the magnetic field is removed. Chopper
stabilization provides low switchpoint drift over temperature.
The LED is turned on when the EN input goes low. This activelow input can be connected directly to the Hall switch output,
SO, to turn the LED on when the switch output goes low. This
flexible solution allows the user to connect additional slave
switches, LED drivers, PWM, or microprocessor inputs to
control when the LED is on. Optionally, an external capacitor
can be used to adjust the fade-in/fade-out feature.
APPLICATIONS
•
•
•
•
Automotive glove boxes and storage
Automotive vanity mirrors
Task lighting
Consumer electronics
PACKAGE:
8-Pin SOICN
with Exposed Thermal Pad
(Suffix LJ)
On-board protection for shorts to ground and thermal overload
prevents damage to the APS13568 and LED string by limiting
the regulated current until the short is removed and/or the chip
temperature has reduced below the thermal threshold.
Continued on the next page…
Not to scale
CBYPASS +V
0.1 µF
RPU
4.7 kΩ
VIN
150 mA
SO
EN
RIREF
600 Ω
LA
HALL
POL
FADE
IREF
GND
CFADE
(optional)
Figure 1: Typical Application Diagram
APS13568-DS
March 13, 2017
LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
DESCRIPTION (continued)
The device is packaged in an 8-pin SOICN (LJ) with an exposed
pad for enhanced thermal dissipation. It is RoHS-compliant, with
100% matte-tin leadframe plating.
The APS13568 is available in an “E” temperature version (up to
85°C) for industrial and consumer applications, as well as a “K”
temperature version (up to 125°C) that is qualified per AEC-Q100
for automotive applications.
SELECTION GUIDE
Part Number
Packing
Package
Temperature Range, TA (°C)
APS13568KLJATR-T
3000 pieces per 13-in. reel
8-pin SOICN surface mount
–40 to 125
APS13568ELJATR-T
3000 pieces per 13-in. reel
8-pin SOICN surface mount
–40 to 85
RoHS
COMPLIANT
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
Characteristic
Supply Voltage [1]
Symbol
VIN (VDD)
Notes
Rating
Unit
–18 to 30
V
Pin EN
VEN
–18 to 30
V
Pin LA
VLA
–0.3 to 30
V
Pin SO
VSO
–0.3 to 30
V
Pin IREF
VIREF
–0.3 to 6.5
V
Pin FADE
VFADE
–0.3 to 6.5
V
Pin POL
Maximum Junction Temperature
Storage Temperature
VPOL
–0.3 to 6.5
V
TJ(MAX)
165
°C
Tstg
–65 to 170
°C
This rating does not apply to extremely short voltage transients such as Load Dump and/or ESD. Those events have individual ratings, specific to
the respective transient voltage event.
1
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
Current Reference
Sample & Hold
Dynamic Offset
Cancellation
FUNCTIONAL BLOCK DIAGRAM
Temp
Monitor
Clock/Logic
LA
Current
Regulator
Slew
Limit
Control Logic
VREG
Micropower
Control Circuitry
and Regulator
VIN
GND
POL
SO *
FADE
EN
CBYP
CFADE
RPU
IREF
RIREF
* SO can be pulled up to VIN or an external voltage source.
PINOUT DRAWING AND TERMINAL LIST
Terminal List
VIN
8
1
EN
2
SO
3
LA
4
PAD
GND
7
POL
6
IREF
5
FADE
Package LJ, 8-Pin SOICN Pinout Drawing
Pin Number
Pin Name
1
VIN
Supply voltage
Description
2
EN
Active-low LED drive enable input
3
SO
Active-low Hall-effect switch output
4
LA
LED anode (+) connection
5
FADE
Fade-in/fade-out timing control
6
IREF
Current reference resistor connection
7
POL
Selects LED activation polarity
relative to SO
8
GND
Ground reference
PAD
Exposed thermal pad (may be left
floating or tied to ground)
–
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
ELECTRICAL CHARACTERISTICS: Valid at TA = –40°C to 125°C (Range K); TA = –40°C to 85°C (Range E);
VIN = 7 to 24 V (unless otherwise specif ied)
Characteristic
Symbol
Test Conditions
Min.
Typ. [1]
Max.
Units
Operating, TJ < 165°C
7
–
24
V
LED off, EN = high
–
25
50
µA
LED off, EN = high, see Figure 13
–
20
45
µA
ILA = 0 mA, EN = low, see Figure 13
–
4
6
mA
Measured from VIN > 7 V to ILA > 90% of 150 mA
with POL = GND, EN = low, RIREF = 600 Ω,
FADE disabled (see Fade pin description below)
–
–
1
ms
Measured from EN < VIL to ILA > 90% of 150 mA
with VIN > 7 V, RIREF = 600 Ω, FADE disabled (see
Fade pin description below)
–
50
–
µs
IIN(ACT) = 6.5 mA, TA = 25°C
32
45
–
V
See Figure 13
–
50
–
ms
–
50
–
µs
SUPPLY and STARTUP
VIN Functional Operating Range
VIN Average Current
VIN Quiescent Current
VIN Active Current
Startup Time
VIN (VDD)
IINAVG
IINQ
IIN(ACT)
tON
External Response Time
Supply Zener Clamp Voltage
tEXT_ON
VIN(Z)
MICROPOWER OPERATION
Period
tPERIOD
Awake Time
tAWAKE
LED CURRENT REGULATION
Reference Voltage
VIREF
267 µA < IREF < 2 mA
–
1.2
–
V
Reference Current Ratio
GH
ILA ÷ IREF
–
75
–
–
Current Accuracy [2][3][4]
EILA
4.5 kΩ > RIREF > 600 Ω
–5
–
5
%
Output Source Current
ILA
RIREF = 600 Ω, LED driver enabled (see Table 1)
–
150
170
mA
VIN – VLA , ILA = 150 mA
–
–
2.4
V
VIN – VLA , ILA = 75 mA
–
800
–
mV
Current rising or falling between 10% and 90%,
Fade disabled (see Fade pin description below)
–
10
–
µs
Dropout Voltage
VDO
Current Slew Time
tFADE(MIN)
EN AND POL INPUTS
EN Input Logic-Low Voltage
VIL(EN)
–
–
0.8
V
EN Input Logic-High Voltage
VIH(EN)
2
–
–
V
–2
–
2
µA
0
–
100
%
EN Input Current
ILOGIC-IN(EN)
PWM Duty Cycle [5][6]
PWM Frequency
Range [5]
PWM Input Voltage
POL Input Logic-Low Voltage
POL Average Leakage Current
DC
PWM applied to EN; 0 V ≤ VPWM ≤ 5.25 V
fPWM
PWM applied to EN; 0 V ≤ VPWM ≤ 5.25 V
0
–
1
kHz
VPWM
PWM applied to EN
0
–
5.25
V
–
–
0.8
V
POL = GND
–
80
–
nA
VIL(POL)
ILOGIC-IN(POL)
Continued on next page...
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
ELECTRICAL CHARACTERISTICS (continued): Valid at TA = –40°C to 125°C (Range K);
TA = –40°C to 85°C (Range E); VIN = 7 to 24 V (unless otherwise specif ied)
Characteristic
Symbol
Test Conditions
Min.
Typ. [1]
Max.
Units
SO, IOUT = 20 mA, B > BOP, POL = float
–
180
500
mV
LOGIC OUTPUTS
Output On Voltage
Output Current Limit
VOUT(SAT)
IOUTPUT(SINK)C
SO, TJ < TJ(max)
30
–
60
mA
tr
SO, RL = 820 Ω, CS = 20 pF
–
0.2
–
µs
Output Fall Time
tf
SO, RL = 820 Ω, CS = 20 pF
–
0.1
–
µs
Power-On State
POS
Output Rise Time
SO, POL = GND or POL = float
HIGH
–
ANALOG INPUTS
Input Voltage Range
VINPUT
IREF, FADE
0
–
5.5
V
1.2
–
1.8
V
–
1
–
mA
VSChys
–
350
–
mV
TJM
–
130
–
°C
ΔISEN/ΔTJ
–
–3.25
–
%/°C
TJL
–
150
–
°C
–
170
–
°C
–
15
–
°C
–
40
70
G
–70
–40
–
G
5
25
–
G
–
–25
–5
G
5
15
25
G
PROTECTION
Short Detect Voltage
VSCD
Measured at LA
Short Circuit Source Current
ISCS
Short present LA to GND
Short Release Voltage
Hysteresis
Thermal Monitor Activation
Temperature
Thermal Monitor Slope
Thermal Monitor Low Current
Temperature
Overtemperature Shutdown
TJF
Overtemperature Hysteresis
TJhys
MAGNETIC
CHARACTERISTICS [7]
Operate Point
Release Point
Hysteresis
Temperature increasing
BOPS
BOPN
BRPS
BRPN
BHYS
|BFIELD| > |BOP|
|BFIELD| < |BRP|
|BOPX – BRPX|
Typical data is at TA = 25°C and VIN = 12 V.
Resistor tolerance is not included.
3 When EN = low, E
ILA = 100 × [( | ILA | × RIREF / 90 ) – 1], with ILA in mA and RIREF in kΩ.
4 Current Accuracy cannot be guaranteed once the device is in Thermal Monitor Actuation Protection.
5 Guaranteed by design, not tested in production.
6 At high PWM input frequencies, the current slew time may not provide sufficient time for I
LA to reach either the user-selected maximum current or minimum
current as the duty cycle approaches 0% and/or 100%. See Dimming Frequency and Duty Cycle section.
7 Magnetic flux density, B, is indicated as a negative value for north-polarity magnetic fields, and is a positive value for south-polarity magnetic fields.
1
2
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
THERMAL CHARACTERISTICS
Characteristic
Symbol
Test Conditions
RθJA (High-K)
JEDEC Package MS-012 BA.
Test is performed using a high thermal conductivity, multilayer printed
circuit board that approximates those specified in the JEDEC standards
JESD51-7. Thermal vias are included per JESD51-5.
See Figure 2 for more detail.
RθJA (Usual-K)
JEDEC Package MS-012 BA.
Multiple measurement points on both single- and dual-layer printed circuit
boards with minimal exposed copper (2-oz) area.
See Figure 2 for more detail.
Thermal Resistance
(Junction to Ambient)
Value
Units
35
°C/W
62-147
°C/W
Package Thermal
Resistance (ºC/W)
200
One-sided board
Two-sided board
150
• All copper is 2 oz. thickness
• Area of copper refers to individual test
locations on PCB
100
50
0
0.2
0.4
0.6
2
Area of Copper, One Side (in )
0.8
Figure 2: Thermal Resistance (RθJA) versus Copper Area on Printed Circuit Board (PCB)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6
LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
CHARACTERISTIC PERFORMANCE
Output On Voltage (VOUT(SAT) v. VIN)
7V
12 V
18 V
24 V
-50
0
50
100
150
Output On Voltage, VOUT(SAT) (mV)
Output On Voltage, VOUT(SAT) (mV)
Output On Voltage (VOUT(SAT) v. TA)
500
450
400
350
300
250
200
150
100
50
0
500
450
400
350
300
250
200
150
100
50
0
-40°C
25°C
125°C
0
5
10
Ambient Temperature, TA (°C)
5
5
4
7V
2
12 V
18 V
1
24 V
0
25
30
4
3
-40°C
2
25°C
1
125°C
0
-50
0
50
100
150
0
5
Ambient Temperature, TA (°C)
VIN Average Current (IINAVG v. TA)
7V
12 V
7V
18 V
12 V
24 V
18 V
0
0
50
Ambient Temperature, TA (°C)
50
Ambient Temperature, TA (°C)
15
20
25
30
VIN Average Current (IINAVG v. VIN)
100
100
24 V150
150
VIN Current,
IIN (µA)IIN (µA)
VIN Current,
50
45
50
40
45
35
40
30
35
25
30
20
25
15
20
10
155
100
5 -50
0
-50
10
Supply Voltage, VIN (V)
VIN Average Current (IINAVG v. TA)
VIN Current,
IIN (µA)IIN (µA)
VIN Current,
20
VIN Active Current (IIN(ACT) v. VIN)
6
VIN Current, IIN (mA)
VIN Current, IIN (mA)
VIN Active Current (IIN(ACT) v. TA)
6
3
15
Supply Voltage, VIN (V)
50
45
50
40
45
35
40
30
35
25
30
20
25
15
20
10
155
100
5 0
0
0
VIN Average Current (IINAVG v. VIN)
-40°C
25°C
-40°C
125°C
25°C
125°C
5
5
10
10
15
20
Supply Voltage, VIN (V)
15
20
25
30
25
30
Supply Voltage, VIN (V)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
7
LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
VIN Quiescent Current (IINQ v. TA)
VIN Quiescent Current (IINQ v. TA)
20
25
15
20
24 V
18 V
7V
12 V
10
15
105
0
30
35
25
30
25°C
125°C
18 V
24 V
-50
0
-50
0
50
100
10
15
105
50
150
Ambient Temperature,
TA (°C) 100
50
125°C
20
25
15
20
IN
12 V
-40°C
-40°C
25°C
IN
7V
30
35
25
30
50
45
40
45
35
40
VIN Current,
IIN (µA)
V Current,
I (µA)
VIN Current,
IIN (µA)
VIN Current,
IIN (µA)
45
40
45
35
40
VIN Quiescent Current (IINQ v. VIN)
VIN Quiescent Current (IINQ v. VIN)
0
0
150
0
5
Ambient Temperature, TA (°C)
Reference Voltage (VIREF v. TA)
12 V
1.25
18 V
1.2
24 V
1.15
1.1
1.05
Reference Voltage, VIREF (V)
Reference Voltage, VIREF (V)
1.3
100
25°C
1.3
125°C
1.25
1.2
1.15
1.1
1.05
1
150
0
5
10
Ambient Temperature, TA (°C)
25
30
IREF = 0.267 mA
7V
22
12 V
21
18 V
20
24 V
19
18
17
100
150
Output Source Current, ILA (mA)
Output Source Current, ILA (mA)
23
Ambient Temperature, TA (°C)
20
Output Source Current (ILA v. VIN)
IREF = 0.267 mA
50
15
Supply Voltage, VIN (V)
Output Source Current (ILA v. TA)
0
30
30
-40°C
1.35
1
-50
25
25
1.4
7V
50
20
Reference Voltage (VIREF v. VIN)
1.35
0
15
Supply Voltage, VIN (V)
1.4
-50
10
VIN (V)
10 Supply Voltage,
15
20
5
23
-40°C
22
25°C
21
125°C
20
19
18
17
0
5
10
15
20
25
30
Supply Voltage, VIN (V)
For Output Source Current and Reference Current Ratio, the Thermal Monitor Activation is disabled during test.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
8
LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
Output Source Current (ILA v. TA)
Output Source Current (ILA v. VIN)
80
IREF = 1.0 mA
7V
12 V
78
18 V
76
24 V
74
72
70
-50
0
50
100
150
Output Source Current, ILA (mA)
Output Source Current, ILA (mA)
IREF = 1.0 mA
80
-40°C
78
25°C
76
125°C
74
72
70
0
5
Ambient Temperature, TA (°C)
7V
153
12 V
18 V
151
24 V
149
147
145
100
150
-40°C
153
25°C
151
125°C
149
147
145
0
5
10
25
30
IREF = 0.267 mA
7V
12 V
18 V
24 V
100
150
Reference Current Ratio, GH
Reference Current Ratio, GH
85
83
81
79
77
75
73
71
69
67
65
50
20
Reference Current Ratio (GH v. VIN)
IREF = 0.267 mA
Ambient Temperature, TA (°C)
15
Supply Voltage, VIN (V)
Reference Current Ratio (GH v. TA)
0
30
155
Ambient Temperature, TA (°C)
-50
25
IREF = 2.0 mA
Output Source Current, ILA (mA)
Output Source Current, ILA (mA)
155
50
20
Output Source Current (ILA v. VIN)
IREF = 2.0 mA
0
15
Supply Voltage, VIN (V)
Output Source Current (ILA v. TA)
-50
10
85
83
81
79
77
75
73
71
69
67
65
-40°C
25°C
125°C
0
5
10
15
20
25
30
Supply Voltage, VIN (V)
For Output Source Current and Reference Current Ratio, the Thermal Monitor Activation is disabled during test.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
9
LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
Dropout Voltage (VDO v. TA)
Dropout Voltage (VDO v. ILA)
VIN = 7 V
VIN = 7 V
20 mA
4
50 mA
3
100 mA
150 mA
2
1
5
Dropout Voltage, VDO (V)
Dropout Voltage, VDO (V
5
0
-40°C
4
25°C
3
125°C
2
1
0
-50
0
50
100
150
0
20
40
Ambient Temperature, TA (°C)
Operate Point, South (BOPS v. TA)
80
100
120
140
160
Operate Point, South (BOPS v. VIN)
70
7V
60
12 V
50
18 V
40
24 V
30
20
10
Operate Point, BOPS (G)
Operate Point, BOPS (G)
70
0
-40°C
60
25°C
50
125°C
40
30
20
10
0
-50
0
50
100
150
0
5
Ambient Temperature, TA (°C)
10
15
20
25
30
Supply Voltage, VIN (V)
Release Point, South (BRPS v. TA)
70
Release Point, South (BRPS v. VIN)
70
7V
60
12 V
50
18 V
40
24 V
30
20
10
0
Release Point, BRPS (G)
Release Point, BRPS (G)
60
Output Source Current, ILA (mA)
-40°C
60
25°C
50
125°C
40
30
20
10
0
-50
0
50
Ambient Temperature, TA (°C)
100
150
0
5
10
15
20
25
30
Supply Voltage, VIN (V)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
10
LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
Operate Point, North (BOPN v. TA)
0
7V
-10
12 V
-20
18 V
-30
24 V
-40
-50
-60
Operate Point, BOPN (G)
Operate Point, BOPN (G)
0
Operate Point, North (BOPN v. VIN)
-70
-40°C
-10
25°C
-20
125°C
-30
-40
-50
-60
-70
-50
0
50
100
150
0
5
10
Ambient Temperature, TA (°C)
Release Point, North (BRPN v. TA)
20
25
30
Release Point, North (BRPN v. VIN)
0
7V
-10
12 V
-20
18 V
-30
24 V
-40
-50
-60
Release Point, BRPN (G)
Release Point, BRPN (G)
0
-70
-40°C
-10
25°C
-20
125°C
-30
-40
-50
-60
-70
-50
0
50
100
150
0
5
10
Ambient Temperature, TA (°C)
12 V
18 V
24 V
50
Ambient Temperature, TA (°C)
100
150
Hysteresis, BHYS (G)
7V
0
20
25
30
Hysteresis (BHYS v. VIN)
25
23
21
19
17
15
13
11
9
7
5
-50
15
Supply Voltage, VIN (V)
Hysteresis (BHYS v. TA)
Hysteresis, BHYS (G)
15
Supply Voltage, VIN (V)
25
23
21
19
17
15
13
11
9
7
5
-40°C
25°C
125°C
0
5
10
15
20
25
30
Supply Voltage, VIN (V)
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11
LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
FUNCTIONAL DESCRIPTION
Overview
Omnipolar Operation
The APS13568 is an integrated Hall-effect switch with a linear
current regulator which is designed to provide drive current and
protection for a string of series connected high-brightness LEDs
in automotive applications. It provides a single programmable
current output sourcing up to 150 mA, with low dropout voltage.
The integrated Hall-effect switch in the APS13568 is an omnipolar switch. The output switches when a magnetic field perpendicular to the Hall sensor exceeds the operate point threshold, BOPx
(B > BOPS or B < BOPN). When magnetic field is reduced below
the release point, BRPx (B < BRPS or B > BRPN), the device output
goes to the other state. The output transistor is capable of sinking
current up to the short-circuit current limit, IOM, which ranges
from 30 to 60 mA. The difference in the magnetic operate and
release points is the hysteresis, BHYS, of the device. This built-in
hysteresis allows clean switching of the output even in the presence of external mechanical vibration and electrical noise.
BHYS
BHYS
Increasing
South Field
Decreasing
South Field
Decreasing
North Field
Increasing
North Field
Increasing
South Field
Figure 3: Hall Switch Output (SO) State
versus Magnetic Field
(POL = float)
Increasing
North Field
0G
Active
Low
0G
Active
Low
SW_OUT
Increasing
North Field
Increasing
South Field
Decreasing
North Field
SW_OUT
Decreasing
South Field
Pulled
High
Increasing
North Field
Pulled
High
BHYS
BOPS
BOPN
BHYS
BRPS
Removal of the magnetic field results in an output state consistent with B < BRPx. Since the output state polarity relative to the
magnetic thresholds is user-selectable via the POL pin, reference
Table 1 to determine the expected output state.
BOPS
BRPS
BRPN
BOPN
Current regulation is maintained and the LEDs are protected
during a short to ground at any point in the LED string. A short
to ground on the output terminal will disable the output until the
short is removed. Integrated thermal management reduces the
regulated current level at high internal junction temperatures to
limit power dissipation.
BRPN
The APS13568 is designed for illumination applications where
the LED activity is controlled by the integrated Hall-effect
switch, external logic, or by a PWM input signal such as from an
MCU (microcontroller).
Increasing
South Field
Figure 4: Hall Switch Output (SO) State
versus Magnetic Field
(POL = GND)
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LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
Pin Functions
EN
Active-low logic input to enable/disable the LED driver.
VIN
Table 2: LED Driver State Truth Table (EN)
Supply to the micro-power control circuit and current regulator. A
ceramic bypass capacitor, typically 100 nF, should be connected
as close as possible to this pin and GND. See Figure 1 typical
application circuit.
SO
Active-low open-drain output of the Hall-effect switch (requires
pull-up resistor, RPU). The output polarity of SO depends on the
configuration of the POL pin. See Figure 3 and Figure 4 and
Table 1. Drives low when BFIELD > |BOP| when POL = float, or
pulled high through a pull-up resistor on SO when POL = GND.
POL
Inverts SO polarity, as shown in Table 1. See Figure 3 and Figure 4.
Table 1: SO State Truth Table (POL)
POL
GND
Float
BFIELD
SO State
|B| > |BOP|
High
|B| < |BRP|
Low
|B| > |BOP|
Low
|B| < |BRP|
High
POL should only be tied to ground or floated to achieve the
desired output polarity. The LED driver is only enabled when the
EN pin is pulled low. If SO is tied to EN, changing the SO polarity changes the behavior between LED off (POL = GND) and
LED on (POL = Float) with a magnet present.
EN State
LED Driver State
Low
LED Driver Enabled;
Device is in Active Mode
High
LED Driver Disabled;
Device operates in Micropower Mode
This provides direct on/off action and can be used for PWM control when the fade function is disabled. See FADE pin description
below. Tie to SO for standalone APS13568 operation.
FADE
A capacitor between this pin and GND controls the turn-on and
turn-off times of the LED current. To disable the fade feature,
omit CFADE and float the FADE pin.
IREF
A 1.2 V reference used to set the LED current drive. Connect resistor RIREF to GND to set the reference current. See Equation 1.
LA
Current source output connected to the anode of the first LED in
the string.
GND
Ground reference connection. This pin should be connected
directly to the negative supply.
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LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
PAD
LED Current Level
Isolated pad for thermal dissipation only. It may be left floating,
but it is recommended to connect this pad to ground.
The LED current is controlled by a linear current regulator
between the VIN pin and the LA output. The basic equation that
determines the nominal output current at this pin is:
Given that the LED driver is enabled (see Table 1),
ILA =
Key
POS
Note: the output current may be reduced from the set level by the
thermal monitor circuit.
B > BOP (POL= GND)
B < BRP(POL= Float)
BRP< B < BOP
Conversely, the reference resistor may be calculated from:
POS
SO
VOUT(HIGH)
VOUT(SAT )
RIREF =
Output State
Undefined for
VIN < VIN(MIN)
V
VIN
VREF × GH
ILA
(2)
where ILA is in A, RIREF is in Ω, VREF = 1.2 V, and GH = 75.
t
VIN(MIN )
0
(1)
where ILA is in A and RIREF is in Ω; VREF × GH is 90.
B < BRP(POL= GND)
B > BOP (POL= Float)
V
VREF × GH
RIREF
tON
t
Figure 5: Power-On Timing
For example, where the required current is 75 mA, the resistor
value will be:
1.2 V × 75
(3)
= 1.2 kΩ
RIREF =
0.075 A
It is important to note that because the APS13568 is a linear current
regulator, the maximum regulated current is limited by the power
dissipation and thermal management in the application. All current
calculations assume an adequate heat sink and/or airflow for the
power dissipated. The application section below provides further
detail on thermal management and the associated limitations.
Fade-In/Fade-Out
Power-On Behavior
Device power-on occurs once tON has elapsed. During the time
prior to tON, and after VIN > VIN(min), the output state is high,
regardless of the POL configuration. After tON has elapsed, the
output will correspond with the applied magnetic field for B >
BOP or B < BRP. See Figure 5 for an example.
Powering-on the device in the hysteresis range (less than BOPx and
greater than BRPx) causes the output state to be high. The correct
state is attained after the first excursion beyond BOPx or BRPx.
Fade timing is controlled by external capacitor, CFADE, on the
FADE pin. A larger capacitor will result in a longer fade time.
The 10%-90% fade time is approximated by the equation:
tFADE = CFADE × 0.8 × 106
(4)
where tFADE is in seconds and CFADE is in farads.
Fade-in is triggered when the LED driver is enabled and fade-out
is triggered when the LED driver is disabled (see Table 1).
To disable the fade feature, omit CFADE and float the FADE pin.
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LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
VIN
LA
Any LED cathode
short to ground.
Current remains
regulated in
non-shorted LEDs.
VIN
LA
Shorted output is
disabled. Low current
is sourced to detect
when short is cleared.
APS13568
APS13568
GND
GND
Figure 7: Output Short to Ground
Figure 6: Any Cathode Short to Ground
VIN
LA
APS13568
Only shorted LED(s)
is(are) inactive. Current
remains regulated in
non-shorted LED(s).
GND
Figure 8: Shorted LED(s)
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LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
Dimming Frequency and Duty Cycle
Dimming of the LED can be controlled by applying a pulsewidth-modulated (PWM) signal to the EN pin (see Table 2). The
duty cycle of the PWM directly correlates to the duty cycle of the
LED current, provided that the fade function is disabled (see Fade
pin description above). This controls the relative LED on-time
versus off-time and changes the perceived brightness of the LED.
The EN pin is rated for the full range of VIN and therefore when
tied directly to the SO pin, VIN can be used as the pull-up supply
for SO.
EN
tEXT_ON
x–
ILA
(user-set
level)
When using the PWM capabilities, the PWM input voltage
(VPWM) applied to the EN pin should be in the range of 0 to
5.25 V. The EN input has typical TTL switching thresholds, but
exceeding 5.25 V may cause pulse-width (duty-cycle) distortion.
The PWM input frequency (fPWM) can be as high as 1 kHz.
0–
Figure 9: Low PWM Duty Cycle
The combination of the external response time (tEXT_ON) and ILA
current slew time (tFADE) may not provide sufficient time for the
desired/user-set LA on and off current levels to be reached when EN
is pulsed with short on/off times. See Figure 9 and Figure 10.
EN
This only affects the proportionality between the input PWM
duty cycle on EN and LA duty cycle (and therefore average LA
current) at higher PWM carrier frequencies in conjunction with
very low or very high duty cycle (see Figure 11).
ILA
x–
(user-set
level)
Figure 11 shows that with 100 Hz PWM frequency, all duty
cycles from 0% to 100% are capable of producing an output
current equal to the user-set ILA level. However, at 1 kHz PWM
frequency, duty cycles from 95% to 100% produce an output
which does not reach the user-set ILA current. The user’s PWM
algorithm can adjust the duty cycle range accordingly.
For example, with a PWM frequency of 1 kHz and duty cycle of
1% or 99%, the EN on time is 1% × 1 kHz = 10 μs. The external response time (tEXT_ON) and ILA current slew time (tFADE) is
50 μs (typ) + 10 μs (typ).
0–
Figure 10: High PWM Duty Cycle
LED
Constant
On
100
Safety Features
The circuit includes several features to ensure safe operation and
to protect the LEDs and the APS13568:
• The current regulator between VIN and LA output provide a
natural current limit due to the regulation.
• The LA output includes a short-to-ground detector that will
disable the output to limit the dissipation.
• The thermal monitor reduces the regulated current as the
temperature rises.
• Thermal shutdown completely disables the outputs under
extreme overtemperature conditions.
LA Duty Cycle (%)
fPWM = 100 Hz
fPWM = 1000 Hz
0
0
LED
Constant
EN PWM Duty Cycle (%)
100 Off
Figure 11: LA Duty Cycle vs. EN PWM Duty Cycle
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LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
SHORT-CIRCUIT DETECTION
A short to ground on an LED cathode as in Figure 6 will not
result in a short-to-ground fault condition. The current through
the remaining LEDs will remain in regulation and the LEDs will
be protected. If the LA output is pulled below the short detect
voltage as in Figure 7, it will disable the driver output. A small
current will be sourced from the disabled output to monitor the
short and detect when it is removed. When the voltage at LA
rises above the short detect voltage, the driver will be re-enabled.
A shorted LED or LEDs in a multi-LED string, as in Figure 8,
will not result in a short fault condition. The current through the
remaining LEDs will remain in regulation and the LEDs will be
protected. Thermal protection will still operate normally in all
described LED short-circuit conditions. Short-circuit detection is
shut off to minimize power consumption when the LED driver is
disabled.
tored and the regulator will be re-activated when the temperature
drops below the threshold provided by the specified hysteresis.
Note that it is possible for the APS13568 to transition rapidly
between thermal shutdown and normal operation. This can happen if the thermal mass attached to the exposed thermal pad is
small and TJM is increased to close to the shutdown temperature.
The period of oscillation will depend on TJM, the dissipated
power, the thermal mass of any heatsink present, and the ambient
temperature.
By mounting the APS13568 in close proximity and on the same
thermal substrate as the LEDs, this feature can also be used to
limit the dissipation of the LEDs.
Micropower Operation
The temperature monitor function included in the APS13568
reduces the LED current as the silicon junction temperature
increases (see Figure 12). As the junction temperature of the
APS13568 increases, the regulated current level is reduced,
reducing the dissipated power in the APS13568 and in the LEDs.
The current is reduced from the 100% level at typically 3.25%/°C
until the point at which the current drops to 25% of the full value,
defined at TJL. Above this temperature, the current will continue
to reduce at a lower rate until the temperature reaches the overtemperature shutdown threshold temperature, TJF.
The built-in micropower control periodically activates the Hall
switch circuitry for a short period of time (tAWAKE), and deactivates it for the remainder of the period (tPERIOD). The short duration awake state allows for sensor stabilization prior to sampling
the Hall switch and latching the state on the SO output. If the SO
output state is off (high), it is kept high during the sleep period;
updates to the output from the off-state only occur at the end of
the Active (tAWAKE) pulse. If the output state is on (low), the Hall
switch circuitry will remain awake until the output switches back
off. The IC’s supply current is not affected by the output state,
provided the LED driver is disabled. The micropower control
operates independently of the LED driver state. If EN is forced
low by an external circuit, the device will also remain in the
awake mode.
If the chip temperature exceeds the overtemperature limit TJF, the
driver will be disabled. The temperature will continue to be moni-
At power-on, the APS13568 will sample a tAWAKE cycle before
the first tSLEEP cycle.
Relative Sense Current (%)
Temperature Monitor and Thermal Protection
100
t PERIOD
90
80
t AWAKE
TJM
IIN(ACT)
60
Sleep
40
TJF
25
20
0
70
TJL
90
110
130
150
Junction Temperature, TJ (ºC)
170
Figure 12: Temperature Monitor Current Reduction
IINQ
Sample and Output Latched
Figure 13: Micropower Timing Diagram
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LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
APPLICATION INFORMATION
Power Dissipation
The most critical design consideration when using a linear regulator such as the APS13568 is the power produced internally as
heat and the rate at which that heat can be dissipated.
There are three sources of power dissipation in the APS13568:
dissipated in the APS13568 is the sum of the quiescent power, the
reference power, and the power in the regulator:
PD = PQ + PREG – PREF
The power that is dissipated in the LEDs is:
• The quiescent power to run the control circuits
• The power in the reference circuit
where VLED is the voltage across all LEDs in the string.
• The power due to the regulator voltage drop
QUIESCENT POWER
The quiescent power is the product of the quiescent current (IINQ)
and the supply voltage (VIN), and it is not related to the regulated
current. The quiescent power (PQ) is therefore defined as:
PQ = VIN × IINQ
(5)
REFERENCE POWER
The reference circuit draws the reference current from the supply
and passes it through the reference resistor to ground. The reference circuit power is the product of the reference current and the
difference between the supply voltage and the reference voltage,
typically 1.2 V. The reference power (PREF) is therefore defined
as:
PREF =
(VIN – VREF ) × VREF
RIREF
(6)
REGULATOR POWER
In most application circuits, the largest dissipation will be produced by the output current regulator. The power dissipated the
current regulator is simply the product of the output current and
the voltage drop across the regulator. The regulator power the
output is defined as:
PREG = (VIN – VLED ) × ILED
(7)
Note that the voltage drop across the regulator (VREG) is always
greater than the specified minimum dropout voltage (VDO). The
output current is regulated by making this voltage large enough
to provide the voltage drop from the supply voltage to the total
forward voltage of all LEDs in series (VLED). The total power
(8)
PLED = VLED × ILED(9)
From these equations (and as illustrated in Figure 12), it can be
seen that, if the power in the APS13568 is not limited, then it will
increase as the supply voltage increases while the power in the
LEDs will remain constant.
Dissipation Limits
The thermal shutdown feature limits the power that can be dissipated by the APS13568.
THERMAL SHUTDOWN
If the thermal resistance from the APS13568 to the ambient
environment is high, then the silicon temperature will rise to
the thermal shutdown threshold and the LED current will be
disabled. After the current is disabled the power dissipated will
drop and the temperature will fall. When the temperature falls by
the hysteresis of the thermal shutdown circuit, the driver will be
re-enabled and the temperature will start to rise again. This cycle
will repeat continuously until the ambient temperature drops or
the APS13568 is switched off. The period of this thermal shutdown cycle will depend on several electrical, mechanical, and
thermal parameters.
Supply Voltage Limits
In many applications, especially in automotive systems, the available supply voltage can vary over a two-to-one range, or greater
when double battery or load dump conditions are taken into consideration. In such systems, is it necessary to design the application circuit such that the system meets the required performance
targets over a specified voltage range.
To determine this range when using the APS13568, there are two
limiting conditions:
• For maximum supply voltage, the limiting factor is the power
that can be dissipated from the regulator without exceeding the
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LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
temperature at which the thermal foldback starts to reduce the
output current below an acceptable level.
PD(MAX) =
• For minimum supply voltage, the limiting factor is the
maximum dropout voltage of the regulator, where the
difference between the load voltage and the supply is
insufficient for the regulator to maintain control over the
output current.
Minimum Supply Limit: Regulator Saturation
Voltage
The supply voltage (VIN) is always the sum of the voltage drop
across the high-side regulator (VREG) and the forward voltage of
the LEDs in the string (VLED).
VLED is constant for a given current and does not vary with supply voltage. Therefore, VREG provides the variable difference
between VLED and VIN. VREG has a minimum value below which
the regulator can no longer be guaranteed to maintain the output
current within the specified accuracy. This level is defined as the
regulator dropout voltage (VDO).
The minimum supply voltage, below which the LED current does
not meet the specified accuracy, is therefore determined by the
sum of the minimum dropout voltage (VDO) and the forward voltage of the LEDs in the string (VLED). The supply voltage must
always be greater than this value and the minimum specified
supply voltage, that is:
VIN > VDO + VLED and VIN > VIN(MIN)
(10)
As an example, consider a string of two white LEDs, running at
150 mA, with each LED forward voltage at 3.15 V. The minimum
supply voltage will be approximately:
VIN(MIN) = 0.8 + (2 × 3.15) = 7.1 V
The maximum power dissipation is defined as:
(11)
Maximum Supply Limit: Thermal Limitation
As described above, when the silicon temperature reaches the
thermal shutdown threshold the thermal protection feature causes
the output current to be disabled. The maximum supply voltage
is therefore defined as the voltage above which the LED current
drops below the acceptable minimum.
This can be estimated by determining the maximum power that
can be dissipated before the internal (junction) temperature of the
APS13568 reaches the thermal shutdown threshold.
T(MAX)
RJA
(12)
where ΔT(MAX) is the difference between the thermal protection
activation temperature of the APS13568 and the maximum ambient temperature TA(max), and RθJA is the thermal resistance from
the internal junctions in the silicon to the ambient environment.
Thermal Dissipation
The amount of heat that can pass from the silicon of the
APS13568 to the surrounding ambient environment depends
on the thermal resistance of the structures connected to the
APS13568. The thermal resistance (RθJA) is a measure of the
temperature rise created by power dissipation and is usually measured in degrees Celsius per watt (°C/W).
The temperature rise (ΔT) is calculated from the power dissipated
(PD) and the thermal resistance (RθJA) as:
ΔT = PD × RθJA
(13)
A thermal resistance from silicon to ambient (RθJA) of approximately 35°C/W can be achieved by using a high thermal conductivity, multilayer printed circuit board as specified in the JEDEC
standards JESD51-7 for JEDEC Package MS-012 BA (including
thermal vias as called out in JESD51-5). Additional improvements may be achieved by optimizing the PCB design.
Optimizing Thermal Layout
The features of the printed circuit board, including heat conduction and adjacent thermal sources such as other components, have
a significant effect on the thermal performance of the device. To
optimize thermal performance, the following should be taken into
account:
• Maximizing the forward voltage of the LEDs relative to the
VIN of the APS13568 will greatly reduce the power dissipated
in the APS13568 by reducing the voltage drop across the
APS13568.
• The APS13568 exposed thermal pad should be connected to as
much copper area as is available. This copper area may be left
floating or connected to ground if desired.
• Copper thickness should be as high as possible (for example,
2 oz. or greater for higher power applications).
• The greater the quantity of thermal vias, the better the
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LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
dissipation. If the expense of vias is a concern, studies have
shown that concentrating the vias directly under the device in
a tight pattern, as shown in Figure 14, has the greatest effect.
• Additional exposed copper area on the opposite side of the
board should be connected by means of thermal vias. The
copper should cover as much area as possible.
• Other thermal sources should be placed as far away from the
device as possible.
Signal Traces
LJ Package
Outline
LJ Package
Exposed
Thermal Pad
Top Layer
Exposed
Copper
0.7 mm
Ø 0.3 mm Via
0.7 mm
Figure 14: Suggested PCB Layout for Thermal Optimization
(Maximum available bottom-layer copper recommended)
Extensive applications information for Hall effect devices is
available in:
• Hall-Effect IC Applications Guide (AN27701)
• Allegro Hall-Effect Sensor ICs (AN296065)
• Soldering Methods for Allegro’s Products — SMD and
Through-Hole (AN26009)
• Integrating Hall-Effect Magnetic Sensing Technology into
Modern Household Appliances (AN295046)
• Guidelines for Designing Subassemblies Using Hall-Effect
Devices (AN27703.1)
• Omnipolar Switch Hall-Effect IC Basics (AN296070)
• Handling, Storage and Shelf Life of Semiconductor Devices
(AN296126)
All are provided on the Allegro website, www.allegromicro.com.
• Chemical Exposure of Devices (AN295047)
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LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
PACKAGE OUTLINE DRAWING
For Reference Only – Not for Tooling Use
(Reference MS-012BA)
Dimensions in millimeters – NOT TO SCALE
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
4.90 ±0.10
8
8
1.75
0.25
0.17
D E1
B
A
1.27
0.65
8°
0°
3.30 NOM
2.41 NOM 3.90 ±0.10 6.00 ±0.20
2.41 5.60
1.04 REF
1
2
Hall Element
0.115 mm left from center
0.25 BSC
Branded Face
8X
0.10
C
0.51
0.31
1.27 BSC
1.70 MAX
0.15
0.00
C
SEATING
PLANE
1
1.27
0.40
2
3.30
C
PCB Layout Reference View
SEATING PLANE
GAUGE PLANE
A Terminal #1 mark area
B Exposed thermal pad (bottom surface)
C Reference land pattern layout (reference IPC7351 SOIC127P600X175-9AM);
all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to
meet application process requirements and PCB layout tolerances; when mounting
on a multilayer PCB, thermal vias at the exposed thermal pad land can improve
thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
D Hall element (E1) centered in package (not to scale).
Figure 15: Package LJ, 8-Pin SOICN with Exposed Thermal Pad
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LED Driver with Integrated
Micropower Hall-Effect Switch
APS13568
Revision History
Number
Date
–
March 13, 2017
Description
Initial release
Copyright ©2017, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
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