ATMEL ATF16V8CZ-12PC High performance e2 pld Datasheet

Features
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Industry Standard Architecture
Emulates Many 20-Pin PALs
Low Cost Easy-to-Use Software Tools
High Speed Electrically Erasable Programmable Logic Devices
12 ns Maximum Pin-to-Pin Delay
Low Power - 25 µA Standby Power
CMOS and TTL Compatible Inputs and Outputs
Input and I/O Pin Keeper Circuits
Advanced Flash Technology
Reprogrammable
100% Tested
High Reliability CMOS Process
20 Year Data Retention
100 Erase/Write Cycles
2,000V ESD Protection
200 mA Latchup Immunity
Commercial and Industrial Temperature Ranges
Dual Inline and Surface Mount Packages in Standard Pinouts
High
Performance
E2 PLD
ATF16V8CZ
Block Diagram
Pin Configurations
Pin Name
Function
CLK
Clock
I
Logic Inputs
I/O
Bidirectional Buffers
OE
Output Enable
VCC
+5V Supply
TSSOP Top View
ATF16V8CZ
I/CLK
I1
I2
I3
I4
I5
I6
I7
I8
GND
1
2
3
4
5
6
7
8
9
10
DIP/SOIC
PLCC
I/CLK
1
20
Vcc
I1
2
19
I/O
I2
3
18
I/O
I3
I4
4
5
17
16
I/O
I/O
I5
6
15
I/O
I6
7
14
I/O
I7
8
13
I/O
I8
9
12
I/O
10
11
I9/OE
GND
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I9/OE
20
19
18
17
16
15
14
13
12
11
I/CLK Vcc
I/O
I2 I1
1
I3
I4
I5
I/O
6
16
I6
I7
I/O
I/O
11
I8
I/O
I/O
I/O I/O
GND I9/OE
Top view
Rev. 0453C/V16FZ-C–04/98
Description (Continued)
The ATF16V8CZ is a high performance EECMOS Programmable Logic Device which utilizes Atmel’s proven
electrically erasable Flash memory technology. Speeds
down to 12 ns and a 25 µA edge-sensing power down
mode are offered. All speed ranges are specified over the
full 5V ± 10% range for industrial temperature ranges; 5V
± 5% for commercial range 5-volt devices.
modes of operation, configured automatically with software, allow highly complex logic functions to be realized.
The ATF16V8CZ can significantly reduce total system
power, thereby enhancing system reliability and reducing
power supply costs. When all the inputs and internal
nodes are not switching, supply current drops to less than
2 5 µA. This automatic power down feature allows for
power savings in slow clock systems and asynchronous
applications. Also, the pin keeper circuits eliminate the
need for internal pull-up resistors along with their attendant power consumption.
The ATF16V8CZ incorporates a superset of the generic
architectures, which allows direct replacement of the 16R8
family and most 20-pin combinatorial PLDs. Eight outputs
are each allocated eight product terms. Three different
Absolute Maximum Ratings*
Temperature Under Bias................... -40°C to +85°C
Storage Temperature...................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground......................... -2.0V to +7.0V (1)
Voltage on Input Pins
with Respect to Ground
During Programming.................... -2.0V to +14.0V (1)
Programming Voltage with
Respect to Ground....................... -2.0V to +14.0V (1)
*NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Note:
1. Minimum voltage is -0.6V dc, which may undershoot to 2.0V for pulses of less than 20 ns. Maximum output pin
voltage is Vcc + 0.75V dc, which may overshoot to 7.0V
for pulses of less than 20 ns.
DC and AC Operating Conditions
Operating Temperature (Case)
VCC Power Supply
2
ATF16V8CZ
Commercial
Industrial
0°C - 70°C
-40°C - 85°C
5V ± 5%
5V ± 10%
ATF16V8CZ
DC Characteristics
Symbol Parameter
Condition
Min
Typ
Max
Units
IIL
Input or I/O Low
Leakage Current
0 ≤ VIN ≤ VIL(MAX)
-10
µA
IIH
Input or I/O High
Leakage Current
3.5 ≤ VIN ≤ VCC
10
µA
95
mA
Power Supply Current
15 MHz, VCC = MAX,
VIN = 0, VCC, Outputs
Open
Com.
ICC1
Ind.
105
mA
ICC (1)
Power Supply Current,
Standby Mode
MHz, VCC = MAX,
VIN = 0, VCC, Outputs
Open
Com.
5
25
µA
Ind.
5
50
µA
IOS
Output Short Circuit
Current
VOUT = 0.5V; VCC=
5V; TA = 25°C
-150
mA
VIL
Input Low Voltage
MIN < VCC < MAX
-0.5
0.8
V
VIH
Input High Voltage
2.0
VCC + 1
V
VOL
Output Low Current
VCC = MIN; All Outputs
Com., Ind.
IOL = -16 mA
0.5
V
VOH
Output High Current
VCC = MIN
IOL = -3.2 mA
IOL
Output Low Current
VCC = MIN
IOH
Output High Current
V CC = MIN
Note:
2.4
Com.
24
Ind.
12
Com., Ind.
4
V
mA
mA
1. All ICC parameters measured with outputs open.
AC Waveforms (1)
Note:
1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise specified.
3
AC Characteristics
-12
4
-15
Symbol
Parameter
tPD
Input or Feedback to Non-Registered Output
tCF
Clock to Feedback
tCO
Clock to Output
2
tS
Input or Feedback Setup Time
10
12
ns
tH
Input Hold Time
0
0
ns
tP
Clock Period
12
16
ns
tW
Clock Width
6
8
ns
External Feedback 1/(tS+ tCO)
55
45
MHz
FMAX
Internal Feedback 1/(tS + tCF)
62
50
MHz
No Feedback 1/(tP)
83
62
MHz
Min
Max
Min
Max
Units
3
12
3
15
ns
8
ns
10
ns
6
8
2
tEA
Input to Output Enable —
Product Term
3
12
3
15
ns
tER
Input to Output Disable —
Product Term
2
15
2
15
ns
tPZX
OE pin to Output Enable
2
12
2
15
ns
tPXZ
OE pin to Output Disable
1.5
12
1.5
15
ns
ATF16V8CZ
ATF16V8CZ
Input Test Waveforms and
Measurement Levels:
Output Test Loads
tR, tF < 1.5 ns (10% to 90%)
Note: Similar devices are tested with slightly different loads.
These load differences may affect output signals’ delay and
slew rate. Atmel devices are tested with sufficient margins
to meet compatible devices.
Pin Capacitance (f = 1 MHz, T = 25°C) (1)
Typ
Max
Units
CIN
5
8
pF
VIN = 0V
COUT
6
8
pF
VOUT = 0V
Note:
Conditions
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
Power Up Reset
The ATF16V8CZ’s registers are designed to reset during
power up. At a point delayed slightly from VCC crossing
VRST, all registers will be reset to the low state. As a result,
the registered output state will always be high on powerup.
This feature is critical for state machine initialization. However, due to the asynchronous nature of reset and the uncertainty of how VCC actually rises in the system, the following conditions are required:
1) The VCC rise must be monotonic, from below .7 volts,
2) After reset occurs, all input and feedback setup times
must be met before driving the clock term high, and
3) The signals from which the clock is derived must remain stable during tPR.
Parameter Description
Typ
Max
Units
tPR
Power-Up
Reset Time
600
1,000
ns
VRST
Power-Up
Reset
Voltage
3.8
4.5
V
5
Registered Output Preload
Security Fuse Usage
The ATF16V8CZ’s registers are provided with circuitry to
allow loading of each register with either a high or a low.
This feature will simplify testing since any state can be
forced into the registers to control test sequencing. A
JEDEC file with preload is generated when a source file
with vectors is compiled. Once downloaded, the JEDEC
file preload sequence will be done automatically by approved programmers.
A single fuse is provided to prevent unauthorized copying
of the ATF16V8CZ fuse patterns. Once programmed, fuse
verify and preload are inhibited. However, the 64-bit User
Signature remains accessible.
The security fuse should be programmed last, as its effect
is immediate.
Input and I/O Pin Keeper Circuits
The ATF16V8CZ contains internal input and I/O pin
keeper circuits. These circuits allow each ATF16V8CZ pin
to hold its previous value even when it is not being driven
by an external source or by the device’s output buffer. This
helps insure that all logic array inputs are at known, valid
logic levels. This reduces system power by preventing
pins from floating to indeterminate levels. By using pin
keeper circuits rather than pull-up resistors, there is no DC
current required to hold the pins in either logic state (high
or low).
Input Diagram
I/O Diagram
These pin keeper circuits are implemented as weak feedback inverters, as shown in the Input Diagram below.
These keeper circuits can easily be overdriven by standard TTL- or CMOS-compatible drivers. The typical overdrive current required is 40 µA.
Compiler Mode Selection
Registered
Complex
Simple
Auto Select
ABEL, Atmel-ABEL
P16V8R
P16V8C
P16V8AS
P16V8
CUPL
G16V8MS
G16V8MA
G16V8AS
G16V8A
LOG/iC
GAL16V8_R (1)
GAL16V8_C7 (1)
GAL16V8_C8 (1)
GAL16V8
OrCAD-PLD
“Registered”
“Complex”
“Simple”
GAL16V8A
PLDesigner
P16V8R
P16V8C
P16V8C
P16V8A
Tango-PLD
G16V8R
G16V8C
G16V8AS
G16V8
Note:
6
1. Only applicable for version 3.4 or lower.
ATF16V8CZ
ATF16V8CZ
7
8
ATF16V8CZ
ATF16V8CZ
9
Ordering Information
tPD
(ns)
tS
(ns)
tCO
(ns)
12
10
15
Ordering Code
Package
8
ATF16V8CZ-12JC
ATF16V8CZ-12PC
ATF16V8CZ-12SC
ATF16V8CZ-12XC
20J
20P3
20S
20X
Commercial
(0°C to 70°C)
12
10
ATF16V8CZ-15JC
ATF16V8CZ-15PC
ATF16V8CZ-15SC
ATF16V8CZ-15XC
20J
20P3
20S
20X
Commercial
(0°C to 70°C)
12
10
ATF16V8CZ-15JI
ATF16V8CZ-15PI
ATF16V8CZ-15SI
ATF16V8CZ-15XI
20J
20P3
20S
20X
Industrial
(-40°C to 85°C)
Package Type
10
20J
20-Lead, Plastic J-Leaded Chip Carrier (PLCC)
20P3
20-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
20S
20-Lead, 0.300" Wide, Plastic Gull Wing Small Outline (SOIC)
20X
20-Lead, 4.4 mm Wide, Plastic Thin Shrink Small Outline (TSSOP)
ATF16V8CZ
Operation Range
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