Product Folder Order Now Support & Community Tools & Software Technical Documents DLPC4422 DLPS088 – JANUARY 2017 DLPC4422 DLP® Display Controller • 1 • • • • • • • Provides Two 30-bit Input Pixel Interfaces or One 60-bit Input Pixel Interface: – YUV, YCrCb, or RGB Data Format – 8, 9 or 10 Bits per Color – Pixel Clock Support Up to 175 MHz for 30-bit and 160 MHz for 60-bit Supports 24-30 Hz and 47-120 Hz Frame Rates Full Single DLP Controller Support For DMD™s up to 1920 Pixels Wide Dual DLP Controller Support For up to 4K Ultra High Definition (UHD) Resolution Display Using DLP660TE TRP DMD High-Speed, Low Voltage Differential Signaling (LVDS) DMD Interface 150 MHz ARM946™ Microprocessor Microprocessor Peripherals – Programmable Pulse-Width Modulation (PWM) and Capture Timers – Three I2C Ports, Three UART Ports and Three SSP Ports – One USB 1.1 Slave Port Image Processing – Multiple Image Processing Algorithms – Frame Rate Conversion – Color Coordinate Adjustment – Programmable Color Space Conversion – Programmable Degamma and Splash • • • • • – Integrated Support for 3-D Display On-Screen Display (OSD) Integrated Clock Generation Circuitry – Operates on a Single 20 MHz Crystal – Integrated Spread Spectrum Clocking External Memory Support – Parallel Flash for Microprocessor and PWM Sequence – Optional SRAM 516 Pin Plastic Ball Grid Array Package Supports Lamp, LED, and Laser Hybrid Illumination Systems 2 Applications • • • • 4K UHD Display Digital Signage Laser TV Smart Lighting 3 Description The DLPC4422 device is required for reliable operation of the DLP660TE DMD. This device is one of the highest performing DLP® chipsets enabling high resolution displays up to 4K UHD. Device Information(1) PART NUMBER DLPC4422 PACKAGE PBGA (516) BODY SIZE (NOM) 27.00 mm × 27.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject to change without notice. ADVANCE INFORMATION 1 Features DLPC4422 DLPS088 – JANUARY 2017 www.ti.com 4 Revision History DATE REVISION NOTES * Initial release. ADVANCE INFORMATION 2 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DLPC4422 DLPC4422 www.ti.com DLPS088 – JANUARY 2017 5 Device and Documentation Support 5.1.1 Video Timing Parameter Definitions • Active Lines Per Frame (ALPF) - Defines the number of lines in a Frame containing displayable data: ALPF is a subset of the TLPF. • Active Pixels Per Line (APPL) - Defines the number of pixel clocks in a line containing displayable data: APPL is a subset of the TPPL • Horizontal Back Porch Blanking (HBP) - Number of blank pixel clocks after Horizontal Sync but before the first active pixel. Note: HBP times are reference to the leading (active) edge of the respective sync signal • Horizontal Front Porch Blanking (HFP) – Number of blank pixel clocks after the last active pixel but before Horizontal Sync. • Horizontal Sync (HS) – Timing reference point that defines the start of each horizontal interval (line). The absolute reference point is defined by the “active” edge of the HS signal. The “active” edge (either rising or falling edge as defined by the source) is the reference from which all Horizontal Blanking parameters are measured. • Total Lines Per Frame (TLPF) - Defines the Vertical Period (or Frame Time) in lines: TLPF = Total number of lines per frame (active and inactive). • Total Pixel Per Line (TPPL) - Defines the Horizontal Line Period in pixel clocks: TPPL = Total number of pixel clocks per line (active and inactive). • Vertical Back Porch Blanking (VBP) - Number of blank lines after Vertical Sync but before the first active line. • Vertical Front Porch Blanking (VFP) - Number of blank lines after the last active line but before Vertical Sync. • Vertical Sync (VS) – Timing reference point that defines the start of the vertical interval (frame). The absolute reference point is defined by the “active” edge of the VS signal. The “active” edge (either rising or falling edge as defined by the source) is the reference from which all Vertical Blanking parameters are measured. Figure 1. Timing Parameter Diagram 5.1.2 Device Nomenclature Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DLPC4422 3 ADVANCE INFORMATION 5.1 Device Support DLPC4422 DLPS088 – JANUARY 2017 www.ti.com Table 1. Part Number Description TI PART NUMBER DLPC4422 DESCRIPTION DLPC4422 Digital Controller 5.1.3 Device Markings 5.1.3.1 Device Marking ADVANCE INFORMATION Figure 2. DLPC4422 Device Markings Marking Definitions: Line1: DLP Device Name followed by TI Part Number Line2: Foundry part number Line3: • SSSSSSYYWWMMM-QQ Package Assembly information • SSSSSS: Manufacturing Country • YYWW: Date Code (YY =Year :: WW = Week) • MMM: Manufacturing Site (HAL = Taiwan, HBL = Japan) • QQ: Qualification level Line4: • LLLLLLL: Manufacturing Lot code • e1: lead-free solder balls consisting of SnAgCu 5.2 Documentation Support 5.2.1 Related Documentation The following documents contain additional information related to the chipset components used with the DLPC4422: • DLP660TE DMD Data Sheet • DLPA100 Power and Motor Driver Data Sheet 4 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DLPC4422 DLPC4422 www.ti.com DLPS088 – JANUARY 2017 5.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 5.4 Trademarks E2E is a trademark of Texas Instruments. DLP is a registered trademark of Texas Instruments Inc. ARM946 is a trademark of ARM. is a registered trademark of ~ Texas Instruments. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 5.6 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 6 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: DLPC4422 5 ADVANCE INFORMATION 5.5 Electrostatic Discharge Caution PACKAGE OPTION ADDENDUM www.ti.com 11-Jan-2017 PACKAGING INFORMATION Orderable Device Status (1) DLPC4422ZPC PREVIEW Package Type Package Pins Package Drawing Qty 48 40 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) TBD Call TI Call TI Op Temp (°C) Device Marking (4/5) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. 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