Very High Common-Mode Voltage Precision Difference Amplifier AD8479 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM ±600 V common-mode voltage range Rail-to-rail output Fixed gain of 1 Wide power supply range of ±2.5 V to ±18 V 550 μA typical power supply current Excellent ac specifications 90 dB minimum CMRR 130 kHz bandwidth High accuracy dc performance 5 ppm maximum gain nonlinearity 10 µV/°C maximum offset voltage drift 5 ppm/°C maximum gain drift AD8479 REF(–) 1 +IN 3 1MΩ NC 7 +VS 6 OUTPUT 5 REF(+) 1MΩ –VS 4 NOTES 1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. 11118-001 –IN 2 8 Figure 1. APPLICATIONS 800 High voltage current sensing Battery cell voltage monitors Power supply current monitors Motor controls Isolation VS = ±15V The AD8479 is a difference amplifier with a very high input common-mode voltage range. The AD8479 is a precision device that allows the user to accurately measure differential signals in the presence of high common-mode voltages up to ±600 V. The AD8479 can replace costly isolation amplifiers in applications that do not require galvanic isolation. The device operates over a ±600 V common-mode voltage range and has inputs that are protected from common-mode or differential mode transients up to ±600 V. 400 VS = ±5V 200 0 –200 –400 –600 –800 –20 –15 –10 –5 0 VOUT (V) 5 10 15 20 11118-110 GENERAL DESCRIPTION COMMON-MODE VOLTAGE (V) 600 Figure 2. Input Common-Mode Voltage vs. Output Voltage The AD8479 has low offset voltage, low offset voltage drift, low gain drift, low common-mode rejection drift, and excellent common-mode rejection ratio (CMRR) over a wide frequency range. The AD8479 is available in a space-saving 8-lead SOIC package and is operational over the −40°C to +125°C temperature range. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD8479 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Applications Information .............................................................. 12 Applications ....................................................................................... 1 Basic Connections ...................................................................... 12 General Description ......................................................................... 1 Single-Supply Operation ........................................................... 12 Functional Block Diagram .............................................................. 1 System-Level Decoupling and Grounding .............................. 12 Revision History ............................................................................... 2 Using a Large Shunt Resistor .................................................... 13 Specifications..................................................................................... 3 Output Filtering .......................................................................... 14 Absolute Maximum Ratings............................................................ 4 Gain of 60 Differential Amplifier ............................................. 14 ESD Caution .................................................................................. 4 Error Budget Analysis Example ............................................... 15 Pin Configuration and Function Descriptions ............................. 5 Outline Dimensions ....................................................................... 16 Typical Performance Characteristics ............................................. 6 Ordering Guide .......................................................................... 16 Theory of Operation ...................................................................... 11 REVISION HISTORY 4/13—Revision 0: Initial Version Rev. 0 | Page 2 of 16 Data Sheet AD8479 SPECIFICATIONS VS = ±15 V, REF(−) = REF(+) = 0 V, RL = 2 kΩ, TA = 25°C, unless otherwise noted. Table 1. Parameter GAIN Nominal Gain Gain Error Gain Nonlinearity Gain Drift OFFSET VOLTAGE Offset Voltage Offset Voltage Drift Power Supply Rejection Ratio (PSRR) INPUT Common-Mode Rejection Ratio (CMRR) Operating Voltage Range Input Operating Impedance Test Conditions/Comments VOUT = ±10 V, RL = 2 kΩ Min TA = TMIN to TMAX 1 0.01 4 3 VS = ±15 V VS = ±5 V TA = TMIN to TMAX VS = ±2.5 V to ±15 V 0.5 0.5 3 100 84 OUTPUT VOLTAGE NOISE 0.01 Hz to 10 Hz Noise Spectral Density POWER SUPPLY Operating Voltage Range Supply Current TEMPERATURE RANGE Specified Performance Operational Min 0.02 10 5 3 3 15 90 B Grade Typ Max Unit 1 0.005 2 3 V/V % ppm ppm/°C 0.5 0.5 3 100 0.01 5 5 1 1 10 mV mV µV/°C dB VCM = ±600 V dc TA = 25°C TA = TMIN to TMAX VCM = 1200 V p-p, dc to 12 kHz Common-mode Differential Common-mode 80 80 80 RL = 2 kΩ 90 90 90 80 96 500 500 dB dB dB V V kΩ 2 2 MΩ ±600 ±14.7 Differential OUTPUT Output Voltage Swing Output Short-Circuit Current Capacitive Load DYNAMIC RESPONSE Small Signal −3 dB Bandwidth Slew Rate Full Power Bandwidth Settling Time A Grade Typ Max −VS + 0.3 Stable operation +VS − 0.3 ±600 ±14.7 ±55 −VS + 0.3 ±55 +VS − 0.3 V mA 500 500 pF 130 130 kHz 7.5 100 11 15.4 8 7.5 100 11 15.4 8 VOUT = 20 V p-p 0.01%, VOUT = 10 V step 0.001%, VCM = 10 V step V/µs kHz µs µs 30 1.6 35 30 1.6 35 f ≥ 100 Hz µV p-p μV/√Hz ±18 650 V μA μA +85 +125 °C °C ±2.5 VOUT = 0 V TA = TMIN to TMAX TA = TMIN to TMAX 550 850 −40 −40 Rev. 0 | Page 3 of 16 ±18 650 ±2.5 +85 +125 −40 −40 550 850 AD8479 Data Sheet ABSOLUTE MAXIMUM RATINGS Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2. Parameter Supply Voltage, VS Input Voltage Range Continuous Common-Mode and Differential, 10 sec Output Short-Circuit Duration REF(−) and REF(+) Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering, 60 sec) Rating ±18 V ±600 V ±900 V Indefinite −VS − 0.3 V to +VS + 0.3 V 150°C −40°C to +125°C −65°C to +150°C 300°C ESD CAUTION Rev. 0 | Page 4 of 16 Data Sheet AD8479 REF(–) 1 –IN 2 AD8479 +IN 3 TOP VIEW (Not to Scale) –VS 4 8 NC 7 +VS 6 OUTPUT 5 REF(+) NOTES 1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. Figure 3. Pin Configuration Table 3. Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 Mnemonic REF(−) −IN +IN −VS REF(+) OUTPUT +VS NC Description Negative Reference Voltage Input. Inverting Input. Noninverting Input. Negative Supply Voltage. Positive Reference Voltage Input. Output. Positive Supply Voltage. No Connect. Do not connect to this pin. Rev. 0 | Page 5 of 16 11118-002 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS AD8479 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS VS = ±15 V, TA = 25°C, unless otherwise noted. 100 90 40 80 CMRR (dB) 50 30 70 20 60 10 50 0 –150 –100 50 0 –50 CMRR (µV/V) 100 40 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) 11118-006 N = 393 MEAN = –33.5249 SD = 30.5258 11118-003 HITS 60 Figure 7. CMRR vs. Frequency Figure 4. CMRR Distribution 120 70 N = 395 MEAN = –29.0415 SD = 57.0658 100 60 +PSRR 80 PSRR (dB) HITS 50 40 30 –PSRR 60 40 20 0 100 –100 GAIN ERROR (µV/V) –200 200 300 11118-004 0 0.1 60 1k 10k 100k 1M 35 N = 377 MEAN = 344.277 SD = 1086.57 VS = ±15V 30 25 VOUT (V p-p) 40 30 20 15 20 10 10 5 –2000 0 2000 OFFSET VOLTAGE (µV) 4000 11118-005 HITS 100 Figure 8. PSRR vs. Frequency 50 0 –4000 10 FREQUENCY (Hz) Figure 5. Gain Error Distribution 70 1 0 100 Figure 6. Offset Voltage Distribution VS = ±5V 1k 10k FREQUENCY (Hz) 100k Figure 9. Large Signal Frequency Response Rev. 0 | Page 6 of 16 1M 11118-008 0 –300 11118-007 20 10 Data Sheet AD8479 150 10 VS = +5V, VREF = MIDSUPPLY 0 COMMON-MODE VOLTAGE (V) –10 GAIN (dB) 100 –20 –30 –40 50 0 –50 1k 10k 100k 1M 10M FREQUENCY (Hz) –100 11118-009 –60 100 0 Figure 10. Small Signal Frequency Response 0.5 1.0 1.5 2.0 2.5 3.0 VOUT (V) 3.5 4.0 4.5 5.0 11118-112 –50 Figure 13. Input Common-Mode Voltage vs. Output Voltage, Single Supply, VS = +5 V, VREF = Midsupply 800 VS = ±15V COMMON-MODE VOLTAGE (V) 600 400 VS = ±5V 5V/DIV 200 11.0µs TO 0.01% 15.4µs TO 0.001% 0 –200 0.002%/DIV –400 –15 –10 –5 0 VOUT (V) 5 10 15 20 11118-110 –800 –20 11118-113 –600 TIME (10µs/DIV) Figure 11. Input Common-Mode Voltage vs. Output Voltage, Dual Supplies, VS = ±15 V, ±5 V Figure 14. Settling Time 250 20 VS = +5V, VREF = 0V 10 150 5 VOUT (V) COMMON-MODE VOLTAGE (V) RL = 2kΩ CL = 1000pF 15 200 100 0 –5 50 –10 0 0 0.5 1.0 1.5 2.0 2.5 3.0 VOUT (V) 3.5 4.0 4.5 5.0 Figure 12. Input Common-Mode Voltage vs. Output Voltage, Single Supply, VS = +5 V, VREF = 0 V Rev. 0 | Page 7 of 16 –20 –8 11118-114 –50 11118-111 –15 –4 0 4 8 12 16 20 24 TIME (µs) Figure 15. Large Signal Pulse Response 28 32 AD8479 Data Sheet 200 10 150 GAIN ERROR (µV/V) 15 0 –40°C +25°C +85°C +105°C +125°C –10 –15 100 1k 10k 100k 100 50 0 –50 1M RESISTANCE (Ω) –100 –40 –25 –10 5 20 35 50 65 80 95 110 125 8 10 TEMPERATURE (°C) 11118-118 –5 11118-014 VOUT (V) 5 Figure 19. Gain Drift Figure 16. Output Voltage vs. Load over Temperature 15 20 15 10 NONLINEARITY (ppm) 10 0 –40°C +25°C +85°C +105°C +125°C –10 5 10 0 –5 –10 –15 –15 0 5 15 20 25 30 35 40 45 ILOAD (mA) –20 –10 –8 –6 –4 –2 0 2 4 6 VOUT (V) Figure 17. Output Voltage vs. Output Current over Temperature 11118-019 –5 11118-015 VOUT (V) 5 Figure 20. Gain Nonlinearity 30 8 NORMALIZED AT 25°C REPRESENTATIVE DATA NORMALIZED AT 0V; OFFSET TO SHOW DIFFERENT POWER SUPPLIES 6 20 –10 0 –2 VS = ±18V VS = ±15V VS = ±12V VS = ±10V VS = ±5V –4 –20 –6 –30 –40 –25 –10 5 20 35 50 65 TEMPERATURE (°C) 80 95 110 125 –8 –20 11118-117 CMRR (µV/V) 0 2 Figure 18. CMRR vs. Temperature, VCM = ±20 V –16 –12 –8 –4 0 4 VOUT (V) 8 12 16 Figure 21. Output Error vs. Output Voltage, RL = 10 kΩ Rev. 0 | Page 8 of 16 20 11118-020 OUTPUT ERROR (mV) 4 10 Data Sheet AD8479 6 8 NORMALIZED AT 0V; OFFSET TO SHOW DIFFERENT POWER SUPPLIES 6 4 2 VOUT (mV) 2 0 0 –2 –16 –12 –8 –4 0 4 8 12 16 –4 20 VOUT (V) –6 –10 –5 5 10 15 20 25 30 6 NORMALIZED AT 0V; OFFSET TO SHOW DIFFERENT POWER SUPPLIES CL = 470pF CL = 670pF CL = 1.00nF CL = 1.20nF CL = 1.47nF CL = 1.67nF 4 4 2 VOUT (mV) 2 0 0 –2 –16 –12 –8 –4 0 4 8 12 16 –4 20 VOUT (V) –6 –10 0 5 10 15 20 25 30 35 40 45 50 TIME (µs) Figure 26. Small Signal Pulse Response vs. Capacitive Load Figure 23. Output Error vs. Output Voltage, RL = 1 kΩ 60 4 VS = ±5V RL = 10kΩ 2 RL = 2kΩ 1 RL = 1kΩ 0 –4 –3 –2 –1 0 1 2 3 4 5 VOUT (V) 6 20 0 –20 –40 –60 –40 11118-023 –5 40 –ISC –25 –10 5 20 35 50 65 80 95 110 TEMPERATURE (°C) Figure 24. Output Error vs. Output Voltage, VS = ±5 V Figure 27. Short-Circuit Current vs. Temperature Rev. 0 | Page 9 of 16 125 11118-027 SHORT-CIRCUIT CURRENT (mA) +ISC 3 –1 –6 –5 11118-026 –6 –8 –20 –2 VS = ±18V VS = ±15V VS = ±12V VS = ±10V VS = ±5V –4 11118-022 OUTPUT ERROR (mV) 40 Figure 25. Small Signal Pulse Response 6 OUTPUT ERROR (mV) 35 TIME (µs) Figure 22. Output Error vs. Output Voltage, RL = 2 kΩ 8 0 11118-025 –6 –8 –20 –2 VS = ±18V VS = ±15V VS = ±12V VS = ±10V VS = ±5V –4 11118-021 OUTPUT ERROR (mV) 4 AD8479 Data Sheet 10 +SR SLEW RATE (V/µs) 6 4 2 0 –2 –4 –6 –8 –10 –40 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 11118-028 –SR VS = ±15V 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 1 10 100 1k 10k 100k FREQUENCY (Hz) Figure 31. Voltage Noise Spectral Density vs. Frequency Figure 28. Slew Rate vs. Temperature 600 580 540 NOISE (20µV/DIV) SUPPLY CURRENT (µA) 560 520 500 480 460 440 2 4 6 8 10 12 14 16 18 SUPPLY VOLTAGE (±V) Figure 32. 0.1 Hz to 10 Hz Noise Figure 29. Supply Current vs. Supply Voltage 1000 900 VS = ±15V VS = ±12V VS = ±5V 600 500 400 300 200 100 0 –40 –25 –10 5 20 35 50 65 80 95 TEMPERATURE (°C) 110 125 11118-030 SUPPLY CURRENT (µA) 800 700 TIME (1s/DIV) Figure 30. Supply Current vs. Temperature Rev. 0 | Page 10 of 16 11118-032 400 11118-029 420 11118-031 8 VOLTAGE NOISE SPECTRAL DENSITY (µV/√Hz) 3.0 Data Sheet AD8479 THEORY OF OPERATION The AD8479 is a unity-gain, differential-to-single-ended amplifier that can reject extremely high common-mode signals in excess of 600 V with 15 V supplies. The AD8479 consists of an operational amplifier (op amp) and a resistor network (see Figure 33). The complete transfer function is AD8479 REF(–) 1 +IN 3 –VS 4 1MΩ 8 NC 7 +VS 6 OUTPUT VOUT = V (+IN) − V (−IN) Laser wafer-trimming provides resistor matching so that common-mode signals are rejected and differential input signals are amplified. 1MΩ 5 REF(+) NOTES 1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. Figure 33. Functional Block Diagram 11118-033 –IN 2 To achieve the high common-mode voltage range, an internal resistor divider—connected to Pin 3 and Pin 5—attenuates the noninverting signal by a factor of 60. The internal resistors at Pin 1 and Pin 2, as well as the feedback resistor, restore the gain to provide a differential gain of unity. To reduce output voltage drift, the op amp uses super beta transistors in its input stage. The input offset current and its associated temperature coefficient contribute no appreciable output voltage offset or drift, which has the added benefit of reducing voltage noise because the corner where 1/f noise becomes dominant is below 5 Hz. To reduce the dependence of gain accuracy on the op amp, the open-loop voltage gain of the op amp exceeds 20 million V/V, and the PSRR exceeds 90 dB. Rev. 0 | Page 11 of 16 AD8479 Data Sheet APPLICATIONS INFORMATION BASIC CONNECTIONS 1 RSHUNT 7 3 6 +VS 0.1µF +IN –VS (SEE TEXT) 2 NC 4 5 (SEE TEXT) VOUT = ISHUNT × RSHUNT REF(+) 0.1µF NC = NO CONNECT –VS –2.5V TO –18V 11118-034 ISHUNT 8 7 VX +VS 0.1µF +IN 3 6 VY –VS 4 5 REF(+) OUTPUT = VOUT – VREF NC = NO CONNECT VREF Figure 34. Basic Connections The differential input signal, which typically results from a load current flowing through a small shunt resistor, is applied to Pin 2 and Pin 3 with the polarity shown in Figure 34 to obtain a positive gain. The common-mode voltage on the differential input signal can range from −600 V to +600 V, and the maximum differential voltage is ±14.7 V. When configured as shown in Figure 34, the device operates as a simple gain-of-1, differentialto-single-ended amplifier; the output voltage is the shunt resistance times the shunt current. The output is measured with respect to Pin 1 and Pin 5. Pin 1 and Pin 5 (REF(−) and (REF(+)) should be grounded for a gain of unity and should be connected to the same low impedance ground plane. Failure to do this results in degraded common-mode rejection. Pin 8 is a no connect pin and should be left open. When the AD8479 is operated with a single supply and a reference voltage is applied to REF(+) and REF(−), the input common-mode voltage range of the AD8479 is reduced. The reduced input common-mode range depends on the voltage at the inverting and noninverting inputs of the internal op amp, labeled VX and VY in Figure 35. These nodes can swing to within 1 V of either rail. Therefore, for a single supply voltage of 10 V, VX and VY can have a value from 1 V to 9 V. If VREF is set to 5 V, the allowable common-mode voltage range is +245 V to −235 V. The common-mode voltage range can be calculated as follows: VCM(±) = 60 × (VX or VY(±)) − (59 × VREF) SYSTEM-LEVEL DECOUPLING AND GROUNDING The use of ground planes is recommended to minimize the impedance of ground returns and, therefore, the size of dc errors. Figure 36 shows how to use grounding in a mixed-signal environment, that is, with digital and analog signals present. To isolate low level analog signals from a noisy digital environment, many data acquisition components have separate analog and digital ground returns. All ground pins from mixed-signal components, such as ADCs, should return through a low impedance analog ground plane. Digital ground lines of mixed-signal converters should also be connected to the analog ground plane. ANALOG POWER SUPPLY –5V +5V GND SINGLE-SUPPLY OPERATION DIGITAL POWER SUPPLY GND +5V 0.1µF Figure 35 shows the connections for operating the AD8479 with a single supply. Because the output can swing to within only about 0.3 V of either rail, an offset must be applied to the output. This offset can be applied by connecting REF(+) and REF(−) to a low impedance reference voltage that is capable of sinking current (some ADCs provide this voltage as an output). Therefore, for a single supply of 10 V, VREF can be set to 5 V for a bipolar input signal, allowing the output to swing ±9.4 V around the central 5 V reference voltage. For unipolar input signals, VREF can be set to approximately 1 V, allowing the output to swing from 1 V (for a 0 V input) to within 0.3 V of the positive rail. 0.1µF 0.1µF 0.1µF 4 7 –VS +IN 3 –IN 2 AD8479 +VS OUTPUT 6 REF(–) REF(+) 1 5 VDD AGND DGND VIN1 ADC 12 GND VDD MICROPROCESSOR VIN2 Figure 36. Optimal Grounding Practice for a Dual Supply Environment with Separate Analog and Digital Supplies Rev. 0 | Page 12 of 16 11118-036 –IN 1 2 NC Figure 35. Operation with a Single Supply +VS +2.5V TO +18V AD8479 REF(–) –IN RSHUNT ISHUNT 8 11118-035 Figure 34 shows the basic connections for operating the AD8479 with a dual supply. A supply voltage from ±2.5 V to ±18 V is applied across Pin 7 and Pin 4. Both supplies should be decoupled close to the pins using 0.1 μF capacitors. Electrolytic capacitors of 10 μF, also located close to the supply pins, may be required if low frequency noise is present on the power supply. Although multiple amplifiers can be decoupled by a single set of 10 μF capacitors, each AD8479 should have its own set of 0.1 μF capacitors so that the decoupling point can be located directly at the IC power pins. +VS AD8479 REF(–) Data Sheet AD8479 Typically, analog and digital grounds should be separated. At the same time, however, the voltage difference between digital and analog grounds on a converter must also be minimized to keep this difference as small as possible (typically <0.3 V). The increased noise—caused by the digital return currents of the converter flowing through the analog ground plane—is typically negligible. USING A LARGE SHUNT RESISTOR The insertion of a large value shunt resistor across the input pins, Pin 2 and Pin 3, unbalances the input resistor network, thereby introducing common-mode error. The magnitude of the error depends on the common-mode voltage and the magnitude of the shunt resistor (RSHUNT). Table 4 shows some sample error voltages generated by a common-mode voltage of 600 V dc with shunt resistors from 20 Ω to 2000 Ω. Assuming that the shunt resistor is selected to use the full ±10 V output swing of the AD8479, the error voltage becomes quite significant as the value of RSHUNT increases. Maximum isolation between analog and digital signals is achieved by connecting the ground planes back to the supplies. Note that Figure 36 suggests a star ground system for the analog circuitry, with all ground lines connected, in this case, to the analog ground of the ADC. However, when ground planes are used, it is sufficient to connect ground pins to the nearest point on the low impedance ground plane. Table 4. Error Resulting from Large Values of RSHUNT (Uncompensated Circuit) RSHUNT (Ω) 20 1000 2000 If only one power supply is available, it must be shared by both digital and analog circuitry. Figure 37 shows how to minimize interference between the digital and analog circuitry. In Figure 37, the reference of the ADC is used to drive the REF(+) and REF(−) pins of the AD8479. This means that the reference must be capable of sourcing and sinking a current equal to VCM/500 kΩ. Error VOUT (V) 0.012 0.583 1.164 To measure low current or current near zero in a high commonmode voltage environment, an external resistor equal to the shunt resistor value can be added to the low impedance side of the shunt resistor, as shown in Figure 38. 0.1µF 0.1µF 0.1µF –IN 2 +VS AD8479 VDD –VS OUTPUT 6 REF(–) REF(+) 1 5 VIN1 AGND DGND ADC VDD GND ISHUNT RCOMP –IN RSHUNT +IN MICROPROCESSOR VIN2 11118-037 +IN 3 4 VREF Figure 37. Optimal Grounding Practice for a Single-Supply Environment As in the dual-supply environment, separate analog and digital ground planes should be used (although reasonably thick traces can be used as an alternative to a digital ground plane). These ground planes should connect at the ground pin of the power supply. Separate traces (or power planes) should run from the power supply to the supply pins of the digital and analog circuits. Ideally, each device should have its own power supply trace, but these traces can be shared by a number of devices, as long as a single trace is not used to route current to both digital and analog circuitry. Rev. 0 | Page 13 of 16 –VS –VS 0.1µF +VS AD8479 REF(–) 1 8 2 7 3 6 4 5 NC 0.1µF +VS VOUT REF(+) NC = NO CONNECT Figure 38. Compensating for Large Shunt Resistors 11118-038 POWER SUPPLY GND +5V 7 Error Indicated (mA) 0.6 0.6 0.6 AD8479 Data Sheet OUTPUT FILTERING GAIN OF 60 DIFFERENTIAL AMPLIFIER To limit noise at the output, a simple two-pole, low-pass Butterworth filter can be implemented using the ADA4077-2 after the AD8479, as shown in Figure 39. Low level signals can be connected directly to the −IN and +IN inputs of the AD8479. Differential input signals can also be connected to give a precise gain of 60 (see Figure 40); however, large common-mode voltages are no longer permissible. Cold junction compensation can be implemented using a temperature sensor, such as the AD590. +VS 8 1 NC C1 0.1µF –IN 7 2 +VS ADA4077-2 R1 +IN 3 0.1µF +VS 6 R2 0.1µF THERMOCOUPLE C2 5 4 0.1µF –IN REF(+) 1 8 2 7 3 6 4 5 NC +VS –VS 0.1µF +IN 11118-039 –VS +VS AD8479 REF(–) VOUT NC = NO CONNECT VOUT VREF Figure 39. Filtering Output Noise Using a Two-Pole Butterworth Filter Table 5 provides recommended component values for various corner frequencies, along with the peak-to-peak output noise for each case. REF(+) NC = NO CONNECT 11118-041 AD8479 REF(–) Figure 40. Gain of 60 Thermocouple Amplifier Table 5. Recommended Values for Two-Pole Butterworth Filter Corner Frequency 50 kHz 5 kHz 500 Hz 50 Hz No Filter R1 2.94 kΩ ± 1% 2.94 kΩ ± 1% 2.94 kΩ ± 1% 2.7 kΩ ± 10% R2 1.58 kΩ ± 1% 1.58 kΩ ± 1% 1.58 kΩ ± 1% 1.58 kΩ ± 10% C1 2.2 nF ± 10% 22 nF ± 10% 220 nF ± 10% 2.2 µF ± 20% Rev. 0 | Page 14 of 16 C2 1 nF ± 10% 10 nF ± 10% 0.1 µF ± 10% 0.1 µF ± 20% Output Noise (p-p) 2.9 mV 0.9 mV 0.296 mV 0.095 mV 4.7 mV Data Sheet AD8479 The calculations in Table 6 assume an induced noise level of 1 V p-p at 60 Hz on the lead wires, in addition to a full-scale dc differential voltage of 10 V. The error budget table quantifies the contribution of each error source. Note that the dominant error source in this example is due to the dc common-mode voltage. ERROR BUDGET ANALYSIS EXAMPLE In the dc application described in this section, the 10 A output current from a device with a high common-mode voltage (such as a power supply or current-mode amplifier) is sensed across a 1 Ω shunt resistor (see Figure 41). The common-mode voltage is 600 V, and the resistor terminals are connected through a long pair of lead wires located in a high noise environment, for example, 50 Hz/60 Hz, 440 V ac power lines. OUTPUT CURRENT AD8479 REF(–) 10A 600V CMDC TO GROUND –IN 1 8 2 7 NC +VS 0.1µF 1Ω SHUNT +IN –VS 6 4 5 VOUT REF(+) 11118-042 60Hz POWER LINE 3 0.1µF NC = NO CONNECT Figure 41. Error Budget Analysis Example: VIN = 10 V Full Scale, VCM = 600 V DC, RSHUNT = 1 Ω, 1 V p-p, 60 Hz Power Line Interference Table 6. Error Budget Analysis Example (VCM = 600 V DC) Error Source ACCURACY, TA = 25°C Initial Gain Error Offset Voltage DC CMR (Over Temperature) TEMPERATURE DRIFT (85°C) Gain Drift Offset Voltage Drift RESOLUTION Noise, Typical, 0.01 Hz to 10 Hz, μV p-p CMR, 60 Hz Nonlinearity Calculation of Error Error (ppm of FS) (0.0001 × 10)/10 V × 106 (0.001 V/10 V) × 106 (32 × 10−6 × 600 V)/10 V × 106 Total Accuracy Error 100 100 1920 2120 5 ppm/°C × 60°C (10 μV/°C × 60°C) × 106/10 V Total Temperature Drift Error 300 60 360 35 μV/10 V × 106 (32 × 10−6 × 1 V)/10 V × 106 (5 × 10−6 × 10 V)/10 V × 106 Total Resolution Error Total Error 4 3 5 12 2492 Rev. 0 | Page 15 of 16 AD8479 Data Sheet OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 1 5 6.20 (0.2441) 5.80 (0.2284) 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) 0.50 (0.0196) 0.25 (0.0099) 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 012407-A 8 4.00 (0.1574) 3.80 (0.1497) Figure 42. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model 1 AD8479ARZ AD8479ARZ-RL AD8479BRZ AD8479BRZ-RL 1 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C Package Description 8-Lead SOIC_N 8-Lead SOIC_N, 13-Inch Tape and Reel, 2,500 pieces 8-Lead SOIC_N 8-Lead SOIC_N, 13-Inch Tape and Reel, 2,500 pieces Z = RoHS Compliant Part. ©2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D11118-0-4/13(0) Rev. 0 | Page 16 of 16 Package Option R-8 R-8 R-8 R-8