Spec. No. : C784J3 Issued Date : 2011.04.06 Revised Date : Page No. : 1/7 CYStech Electronics Corp. P-Channel Logic Level Enhancement Mode Power MOSFET MTF50P02J3 BVDSS -20V ID -10A RDSON(MAX) 58mΩ Features • Low Gate Charge • Simple Drive Requirement • RoHS compliant & Halogen-free package Equivalent Circuit Outline MTF50P02J3 TO-252 G：Gate D：Drain S：Source G D S Absolute Maximum Ratings (TC=25°C, unless otherwise noted) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current @ TC=25°C Continuous Drain Current @ TC=100°C Pulsed Drain Current *1 Total Power Dissipation @TC=25℃ Total Power Dissipation @TC=100℃ Operating Junction and Storage Temperature Range Note : *1. Pulse width limited by maximum junction temperature MTF50P02J3 Symbol Limits VDS VGS -20 ±12 -10 -6.5 -40 30 10 -55~+175 ID IDM Pd Tj, Tstg Unit V A W °C CYStek Product Specification Spec. No. : C784J3 Issued Date : 2011.04.06 Revised Date : Page No. : 2/7 CYStech Electronics Corp. Thermal Data Parameter Thermal Resistance, Junction-to-case, max Thermal Resistance, Junction-to-ambient, max Symbol Rth,j-c Rth,j-a Value 5 110 Unit °C/W Characteristics (Tc=25°C, unless otherwise specified) Symbol Static BVDSS VGS(th) GFS IGSS *1 IDSS ID(ON) *1 RDS(ON) *1 Dynamic Qg *1, 2 Qgs *1, 2 Qgd *1, 2 td(ON) *1, 2 tr *1, 2 td(OFF) *1, 2 tf *1, 2 Ciss Coss Crss Rg Source-Drain Diode IS *1 ISM *3 VSD *1 Min. Typ. Max. Unit Test Conditions -20 -0.45 -10 - -0.8 9 51 75 -1.2 ±100 -1 -25 58 90 V V S nA μA μA A mΩ mΩ VGS=0, ID=-250μA VDS =VGS, ID=-250μA VDS =-5V, ID=-5A VGS=±12, VDS=0 VDS =-16V, VGS =0 VDS =-16V, VGS =0, Tj=125°C VDS =-5V, VGS =-4.5V VGS =-4.5V, ID=-6A VGS =-2.5V, ID=-3A - 7 1.3 2.5 18 35 40 35 653 102 87 7.5 - nC ID=-6A, VDS=-10V, VGS=-4.5V ns VDS=-10V, ID=-1A, VGS=-4.5V, RG=6Ω pF VGS=0V, VDS=-10V, f=1MHz Ω VGS=15mV, VDS=0, f=1MHz - - -10 -40 -1.3 A V IF=IS, VGS=0V Note : *1.Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% *2.Independent of operating temperature *3.Pulse width limited by maximum junction temperature. Ordering Information Device MTF50P02J3 MTF50P02J3 Package TO-252 (RoHS compliant and Halogen-freepackage) Shipping Marking 2500 pcs / Tape & Reel F50P02 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C784J3 Issued Date : 2011.04.06 Revised Date : Page No. : 3/7 Characteristic Curves MTF50P02J3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C784J3 Issued Date : 2011.04.06 Revised Date : Page No. : 4/7 Characteristic Curves(Cont.) MTF50P02J3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C784J3 Issued Date : 2011.04.06 Revised Date : Page No. : 5/7 Reel Dimension Carrier Tape Dimension MTF50P02J3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C784J3 Issued Date : 2011.04.06 Revised Date : Page No. : 6/7 Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 260 +0/-5 °C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Average ramp-up rate 3°C/second max. (Tsmax to Tp) Preheat 100°C −Temperature Min(TS min) −Temperature Max(TS max) 150°C −Time(ts min to ts max) 60-120 seconds Time maintained above: −Temperature (TL) 183°C − Time (tL) 60-150 seconds Peak Temperature(TP) 240 +0/-5 °C Time within 5°C of actual peak 10-30 seconds temperature(tp) Ramp down rate 6°C/second max. 6 minutes max. Time 25 °C to peak temperature Pb-free Assembly 3°C/second max. 150°C 200°C 60-180 seconds 217°C 60-150 seconds 260 +0/-5 °C 20-40 seconds 6°C/second max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface. MTF50P02J3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C784J3 Issued Date : 2011.04.06 Revised Date : Page No. : 7/7 TO-252 Dimension Marking: Device Name Date code Style: Pin 1.Gate 2.Drain 3.Source 3-Lead TO-252 Plastic Surface Mount Package CYStek Package Code: J3 Inches Min. Max. 0.0827 0.0984 0.0374 0.0512 0.0118 0.0335 0.0157 0.0370 0.0236 0.0394 0.0157 0.0236 0.2087 0.2441 0.2638 0.2874 0.0866 0.1181 DIM A A1 B B1 B2 C D D2 D3 Millimeters Min. Max. 2.10 2.50 0.95 1.30 0.30 0.85 0.40 0.94 0.60 1.00 0.40 0.60 5.30 6.20 6.70 7.30 2.20 3.00 DIM E E2 H L L1 L2 L3 P Inches Min. Max. 0.2520 0.2638 0.1890 0.2146 0.3622 0.3996 0.0350 0.0669 0.0354 0.0650 0.0197 0.0433 0.0000 0.0118 0.0827 0.0984 Millimeters Min. Max. 6.40 6.70 4.80 5.45 9.20 10.15 0.89 1.70 0.90 1.65 0.50 1.10 0.00 0.30 2.10 2.50 Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material: • Lead : Pure tin plated. • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. MTF50P02J3 CYStek Product Specification