OPA333 OPA2333 SBOS351C – MARCH 2006 – REVISED MAY 2007 1.8V, microPOWER CMOS OPERATIONAL AMPLIFIERS Zerø-Drift Series FEATURES • • • • • • • • DESCRIPTION LOW OFFSET VOLTAGE: 10μV (max) ZERO DRIFT: 0.05μV/°C (max) 0.01Hz to 10Hz NOISE: 1.1μVPP QUIESCENT CURRENT: 17μA SINGLE-SUPPLY OPERATION SUPPLY VOLTAGE: 1.8V to 5.5V RAIL-TO-RAIL INPUT/OUTPUT microSIZE PACKAGES: SC70 and SOT23 APPLICATIONS • • • • • • TRANSDUCER APPLICATIONS TEMPERATURE MEASUREMENTS ELECTRONIC SCALES MEDICAL INSTRUMENTATION BATTERY-POWERED INSTRUMENTS HANDHELD TEST EQUIPMENT The OPA333 series of CMOS operational amplifiers uses a proprietary auto-calibration technique to simultaneously provide very low offset voltage (10μV max) and near-zero drift over time and temperature. These miniature, high-precision, low quiescent current amplifiers offer high-impedance inputs that have a common-mode range 100mV beyond the rails and rail-to-rail output that swings within 50mV of the rails. Single or dual supplies as low as +1.8V (±0.9V) and up to +5.5V (±2.75V) may be used. They are optimized for low-voltage, single-supply operation. The OPA333 family offers excellent CMRR without the crossover associated with traditional complementary input stages. This design results in superior performance for driving analog-to-digital converters (ADCs) without degradation of differential linearity. The OPA333 (single version) is available in the SC70-5, SOT23-5, and SO-8 packages. The OPA2333 (dual version) is offered in DFN-8 (3mm × 3mm), MSOP-8, and SO-8 packages. All versions are specified for operation from –40°C to +125°C. OPA333 500nV/div 0.1Hz TO 10Hz NOISE OUT 1 V- 2 +IN 3 5 V+ 4 -IN OPA333 SOT23-5 1s/div +IN 1 V- 2 -IN 3 5 V+ 4 OUT SC70-5 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006–2007, Texas Instruments Incorporated OPA333 OPA2333 www.ti.com SBOS351C – MARCH 2006 – REVISED MAY 2007 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) PRODUCT OPA333 OPA2333 (1) PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING SOT23-5 DBV OAXQ SC70-5 DCK BQY SO-8 D O333A SO-8 D O2333A DFN-8 DRB BQZ MSOP-8 DGK OBAQ For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) OPA333, OPA2333 UNIT +7 V –0.3 to (V+) + 0.3 V ±10 mA Supply Voltage Signal Input Terminals, Voltage (2) Signal Input Terminals, Voltage (2) Output Short-Circuit (3) Continuous Operating Temperature –40 to +150 °C Storage Temperature –65 to +150 °C Junction Temperature +150 °C Human Body Model (HBM) 4000 V Charged Device Model (CDM) 1000 V Machine Model (MM) 400 V ESD Ratings: (1) (2) (3) 2 Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3V beyond the supply rails should be current limited to 10mA or less. Short-circuit to ground, one amplifier per package. Submit Documentation Feedback OPA333 OPA2333 www.ti.com SBOS351C – MARCH 2006 – REVISED MAY 2007 ELECTRICAL CHARACTERISTICS: VS = +1.8V to +5.5V Boldface limits apply over the specified temperature range, TA = –40°C to +125°C. At TA = +25°C, RL = 10kΩ connected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted. OPA333, OPA2333 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 2 10 μV 0.02 0.05 μV/°C 1 5 μV/V OFFSET VOLTAGE Input Offset Voltage VOS vs Temperature dVOS/dT vs Power Supply PSRR VS = +5V VS = +1.8V to +5.5V Long-Term Stability (1) See Channel Separation, dc (1) μV/V 0.1 INPUT BIAS CURRENT Input Bias Current ±70 IB Input Offset Current ±200 ±150 over Temperature ±140 IOS pA pA ±400 pA NOISE μVPP Input Voltage Noise, f = 0.01Hz to 1Hz 0.3 Input Voltage Noise, f = 0.1Hz to 10Hz 1.1 μVPP 100 fA/√Hz Input Current Noise, f = 10Hz in INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection Ratio VCM CMRR (V–) – 0.1 (V–) – 0.1V < VCM < (V+) + 0.1V 106 (V+) + 0.1 V 130 dB Differential 2 pF Common-Mode 4 pF 130 dB INPUT CAPACITANCE OPEN-LOOP GAIN Open-Loop Voltage Gain AOL (V–) + 100mV < VO < (V+) – 100mV, RL = 10kΩ 106 FREQUENCY RESPONSE Gain-Bandwidth Product Slew Rate GBW SR CL = 100pF 350 kHz G = +1 0.16 V/μs RL = 10kΩ 30 OUTPUT Voltage Output Swing from Rail over Temperature RL = 10kΩ 50 mV 70 mV Short-Circuit Current ISC ±5 Capacitive Load Drive CL See Typical Characteristics Open-Loop Output Impedance f = 350kHz, IO = 0 mA 2 kΩ POWER SUPPLY Specified Voltage Range Quiescent Current Per Amplifier VS IQ 1.8 IO = 0 17 VS = +5V 100 over Temperature Turn-On Time 5.5 V 25 μA 28 μA μs TEMPERATURE RANGE Specified Range –40 +125 °C Operating Range –40 +150 °C Storage Range –65 +150 Thermal Resistance (1) °C °C/W θJA SOT23-5 200 °C/W MSOP-8, SO-8 150 °C/W DFN-8 50 °C/W SC70-5 250 °C/W 300-hour life test at +150°C demonstrated randomly distributed variation of approximately 1μV. Submit Documentation Feedback 3 OPA333 OPA2333 www.ti.com SBOS351C – MARCH 2006 – REVISED MAY 2007 PIN CONFIGURATIONS OPA333 OUT 1 V- 2 +IN 3 OPA333 OPA333 SOT23-5 SO-8 SC70-5 Top View Top View Top View 5 4 V+ -IN (1) (1) 1 8 NC -IN 2 7 V+ +IN 3 6 OUT NC 4 V- 5 NC DFN-8 Top View Top View 8 V+ 7 OUT B 6 -IN B 5 +IN B A -IN A 2 +IN A 3 V- 4 B OUT A 1 -IN A 2 +IN A 3 V- 4 1. NC denotes no internal connection. 2. Connect thermal die pad to V–. 4 V- 2 -IN 3 8 V+ 7 OUT B 6 -IN B 5 +IN B OPA2333 SO-8, MSOP-8 1 1 (1) OPA2333 OUT A +IN Submit Documentation Feedback Exposed Thermal Die Pad on (2) Underside 5 V+ 4 OUT OPA333 OPA2333 www.ti.com SBOS351C – MARCH 2006 – REVISED MAY 2007 TYPICAL CHARACTERISTICS At TA = +25°C, VS = +5V, and CL = 0pF, unless otherwise noted. OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 0 0.0025 0.0050 0.0075 0.0100 0.0125 0.0150 0.0175 0.0200 0.0225 0.0250 0.0275 0.0300 0.0325 0.0350 0.0375 0.0400 0.0425 0.0450 0.0475 0.0500 Population Population OFFSET VOLTAGE PRODUCTION DISTRIBUTION Offset Voltage (mV) Offset Voltage Drift (mV/°C) Figure 1. Figure 2. OPEN-LOOP GAIN vs FREQUENCY 100 200 120 150 100 Phase 60 100 40 50 Gain 20 0 -20 10 100 1k 10k 100k CMRR (dB) 140 Phase (°) 250 80 80 60 0 40 -50 20 -100 0 1M 10 1 100 Frequency (Hz) 1k 10k 100k Figure 4. POWER-SUPPLY REJECTION RATIO vs FREQUENCY OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 120 3 VS = ±2.75V VS = ±0.9V +PSRR 100 2 Output Swing (V) -PSRR 80 1M Frequency (Hz) Figure 3. PSRR (dB) AOL (dB) COMMON-MODE REJECTION RATIO vs FREQUENCY 120 60 40 -40°C 1 +25°C +125°C 0 +25°C -40°C -1 +125°C +25°C 20 -2 0 -3 -40°C 1 10 100 1k 10k 100k 1M 0 1 2 3 4 5 6 Frequency (Hz) Output Current (mA) Figure 5. Figure 6. Submit Documentation Feedback 7 8 9 10 5 OPA333 OPA2333 www.ti.com SBOS351C – MARCH 2006 – REVISED MAY 2007 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = +5V, and CL = 0pF, unless otherwise noted. INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE INPUT BIAS CURRENT vs TEMPERATURE 100 200 80 VS = 5.5V VS = 1.8V 150 -IB 60 -IB 100 40 IB (pA) IB (pA) -IB 50 20 0 0 -20 +IB -50 -40 -100 -60 +IB +IB -150 -80 -200 -100 1 0 2 3 4 5 0 -25 -50 Common-Mode Voltage (V) 50 75 Figure 7. Figure 8. QUIESCENT CURRENT vs TEMPERATURE LARGE-SCALE STEP RESPONSE 25 100 G=1 RL = 10kW Output Voltage (1V/div) 20 VS = 5.5V IQ (mA) 25 Temperature (°C) 15 VS = 1.8V 10 5 0 -50 -25 0 25 50 75 100 Time (50ms/div) 125 Temperature (°C) Figure 10. SMALL-SCALE STEP RESPONSE POSITIVE OVER-VOLTAGE RECOVERY 2V/div Figure 9. Output Voltage (50mV/div) G = +1 RL = 10kW 0 Input Output 10kW +2.5V 1V/div 1kW 0 OPA333 -2.5V Time (5ms/div) Time (50ms/div) Figure 11. 6 Figure 12. Submit Documentation Feedback 125 OPA333 OPA2333 www.ti.com SBOS351C – MARCH 2006 – REVISED MAY 2007 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = +5V, and CL = 0pF, unless otherwise noted. NEGATIVE OVER-VOLTAGE RECOVERY SETTLING TIME vs CLOSED-LOOP GAIN 600 4V Step 500 Settling Time (ms) 1V/div 2V/div Input 0 0 10kW +2.5V 1kW 400 300 200 0.001% Output OPA333 100 0.01% -2.5V 0 Time (50ms/div) 10 1 100 Gain (dB) Figure 13. Figure 14. SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE 0.1Hz TO 10Hz NOISE 40 35 500nV/div 25 20 15 10 5 0 100 1000 1s/div Load Capacitance (pF) Figure 15. Figure 16. CURRENT AND VOLTAGE NOISE SPECTRAL DENSITY vs FREQUENCY 1000 1000 Continues with no 1/f (flicker) noise. Current Noise 100 100 Voltage Noise 10 Current Noise (fA/ÖHz) 10 Voltage Noise (nV/ÖHz) Overshoot (%) 30 10 1 10 100 1k 10k Frequency (Hz) Figure 17. Submit Documentation Feedback 7 OPA333 OPA2333 www.ti.com SBOS351C – MARCH 2006 – REVISED MAY 2007 APPLICATIONS INFORMATION The OPA333 and OPA2333 are unity-gain stable and free from unexpected output phase reversal. They use a proprietary auto-calibration technique to provide low offset voltage and very low drift over time and temperature. For lowest offset voltage and precision performance, circuit layout and mechanical conditions should be optimized. Avoid temperature gradients that create thermoelectric (Seebeck) effects in the thermocouple junctions formed from connecting dissimilar conductors. These thermally-generated potentials can be made to cancel by assuring they are equal on both input terminals. Other layout and design considerations include: • Use low thermoelectric-coefficient conditions (avoid dissimilar metals). • Thermally isolate components from power supplies or other heat sources. • Shield op amp and input circuitry from air currents, such as cooling fans. Following these guidelines will reduce the likelihood of junctions being at different temperatures, which can cause thermoelectric voltages of 0.1μV/°C or higher, depending on materials used. OPERATING VOLTAGE The OPA333 and OPA2333 input common-mode voltage range extends 0.1V beyond the supply rails. The OPA333 is designed to cover the full range without the troublesome transition region found in some other rail-to-rail amplifiers. Normally, input bias current is about 70pA; however, input voltages exceeding the power supplies can cause excessive current to flow into or out of the input pins. Momentary voltages greater than the power supply can be tolerated if the input current is limited to 10mA. This limitation is easily accomplished with an input resistor, as shown in Figure 18. Current-limiting resistor required if input voltage exceeds supply rails by ³ 0.5V. IOVERLOAD 10mA max +5V OPA333 VOUT VIN 5kW Figure 18. Input Current Protection The OPA333 and OPA2333 op amps operate over a power-supply range of +1.8V to +5.5V (±0.9V to ±2.75V). Supply voltages higher than +7V (absolute maximum) can permanently damage the device. Parameters that vary over supply voltage or temperature are shown in the Typical Characteristics section of this data sheet. 8 INPUT VOLTAGE INTERNAL OFFSET CORRECTION The OPA333 and OPA2333 op amps use an auto-calibration technique with a time-continuous 350kHz op amp in the signal path. This amplifier is zero-corrected every 8μs using a proprietary technique. Upon power-up, the amplifier requires approximately 100μs to achieve specified VOS accuracy. This design has no aliasing or flicker noise. Submit Documentation Feedback OPA333 OPA2333 www.ti.com SBOS351C – MARCH 2006 – REVISED MAY 2007 ACHIEVING OUTPUT SWING TO THE OP AMP NEGATIVE RAIL works with some types of output stages. The OPA333 and OPA2333 have been characterized to perform with this technique; the recommended resistor value is approximately 20kΩ. Note that this configuration will increase the current consumption by several hundreds of microamps. Accuracy is excellent down to 0V and as low as –2mV. Limiting and nonlinearity occurs below –2mV, but excellent accuracy returns as the output is again driven above –2mV. Lowering the resistance of the pull-down resistor will allow the op amp to swing even further below the negative rail. Resistances as low as 10kΩ can be used to achieve excellent accuracy down to –10mV. Some applications require output voltage swings from 0V to a positive full-scale voltage (such as +2.5V) with excellent accuracy. With most single-supply op amps, problems arise when the output signal approaches 0V, near the lower output swing limit of a single-supply op amp. A good single-supply op amp may swing close to single-supply ground, but will not reach ground. The output of the OPA333 and OPA2333 can be made to swing to ground, or slightly below, on a single-supply power source. To do so requires the use of another resistor and an additional, more negative, power supply than the op amp negative supply. A pull-down resistor may be connected between the output and the additional negative supply to pull the output down below the value that the output would otherwise achieve, as shown in Figure 19. GENERAL LAYOUT GUIDELINES Attention to good layout practices is always recommended. Keep traces short and, when possible, use a printed circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible. Place a 0.1μF capacitor closely across the supply pins. These guidelines should be applied throughout the analog circuit to improve performance and provide benefits such as reducing the EMI (electromagnetic-interference) susceptibility. V+ = +5V VOUT OPA333 VIN RP = 20kW Operational amplifiers vary in their susceptibility to radio frequency interference (RFI). RFI can generally be identified as a variation in offset voltage or dc signal levels with changes in the interfering RF signal. The OPA333 has been specifically designed to minimize susceptibility to RFI and demonstrates remarkably low sensitivity compared to previous generation devices. Strong RF fields may still cause varying offset levels. Op Amp V- = GND -5V Additional Negative Supply Figure 19. For VOUT Range to Ground The OPA333 and OPA2333 have an output stage that allows the output voltage to be pulled to its negative supply rail, or slightly below, using the technique previously described. This technique only 4.096V REF3140 +5V + R9 150kW 0.1mF R1 6.04kW D1 R5 31.6kW +5V 0.1mF + R2 2.94kW - R2 549W - + + K-Type Thermocouple 40.7mV/°C OPA333 R6 200W R4 6.04kW R3 60.4W VO Zero Adj. Figure 20. Temperature Measurement Submit Documentation Feedback 9 OPA333 OPA2333 www.ti.com SBOS351C – MARCH 2006 – REVISED MAY 2007 Figure 21 shows the basic configuration for a bridge amplifier. VEX A low-side current shunt monitor is shown in Figure 22. RN are operational resistors used to isolate the ADS1100 from the noise of the digital I2C bus. Since the ADS1100 is a 16-bit converter, a precise reference is essential for maximum accuracy. If absolute accuracy is not required, and the 5V power supply is sufficiently stable, the REF3130 may be omitted. R1 +5V R R R R VOUT OPA333 R1 VREF Figure 21. Single Op Amp Bridge Amplifier 3V +5V REF3130 Load R1 4.99kW R2 49.9kW R6 71.5kW V ILOAD RSHUNT 1W RN 56W OPA333 R3 4.99kW R4 48.7kW ADS1100 R7 1.18kW Stray Ground-Loop Resistance RN 56W 2 IC (PGA Gain = 4) FS = 3.0V NOTE: 1% resistors provide adequate common-mode rejection at small ground-loop errors. Figure 22. Low-Side Current Monitor RG zener RSHUNT (1) V+ (2) R1 10kW MOSFET rated to stand-off supply voltage such as BSS84 for up to 50V. OPA333 +5V V+ Two zener biasing methods (3) are shown. Output Load RBIAS RL NOTES: (1) zener rated for op amp supply capability (that is, 5.1V for OPA333). (2) Current-limiting resistor. (3) Choose zener biasing resistor or dual NMOSFETs (FDG6301N, NTJD4001N, or Si1034) Figure 23. High-Side Current Monitor 10 Submit Documentation Feedback OPA333 OPA2333 www.ti.com SBOS351C – MARCH 2006 – REVISED MAY 2007 V1 -In INA152 OPA333 2 1MW 3V NTC Thermistor 1MW 5 R2 100kW 60kW 6 R1 VO R2 OPA333 1 3 OPA333 V2 +In VO = (1 + 2R2/R1) (V2 - V1) Figure 24. Thermistor Measurement Figure 25. Precision Instrumentation Amplifier +VS R1 100kW fLPF = 150Hz C4 1.06nF 1/2 OPA2333 RA +VS R2 100kW R6 100kW 1/2 OPA2333 +VS 3 2 7 INA321 LL (1) GINA = 5 6 5 R8 100kW dc R3 100kW ac 1/2 OPA2333 +VS C3 1m F VOUT OPA333 R13 318kW GOPA = 200 +VS 1/2 OPA2333 Wilson LA R12 5kW 1 4 +VS R14 1MW GTOT = 1kV/V R7 100kW VCENTRAL C1 47pF (RA + LA + LL)/3 fHPF = 0.5Hz (provides ac signal coupling) 1/2 VS R5 390kW +VS R9 20kW +VS R4 100kW 1/2 OPA2333 RL Inverted VCM VS = +2.7V to +5.5V 1/2 OPA2333 BW = 0.5Hz to 150Hz +VS R10 1MW 1/2 VS C2 0.64mF NOTE: (1) Other instrumentation amplifiers can be used, such as the INA326, which has lower noise, but higher quiescent current. R11 1MW fO = 0.5Hz Figure 26. Single-Supply, Very Low Power, ECG Circuit Submit Documentation Feedback 11 OPA333 OPA2333 www.ti.com SBOS351C – MARCH 2006 – REVISED MAY 2007 DFN PACKAGE DFN LAYOUT GUIDELINES The OPA2333 is offered in an DFN-8 package (also known as SON). The DFN is a QFN package with lead contacts on only two sides of the bottom of the package. This leadless package maximizes board space and enhances thermal and electrical characteristics through an exposed pad. The exposed leadframe die pad on the DFN package should be soldered to a thermal pad on the PCB. A mechanical drawing showing an example layout is attached at the end of this data sheet. Refinements to this layout may be necessary based on assembly process requirements. Mechanical drawings located at the end of this data sheet list the physical dimensions for the package and pad. The five holes in the landing pattern are optional, and are intended for use with thermal vias that connect the leadframe die pad to the heatsink area on the PCB. DFN packages are physically small, have a smaller routing area, improved thermal performance, and improved electrical parasitics. Additionally, the absence of external leads eliminates bent-lead issues. The DFN package can be easily mounted using standard printed circuit board (PCB) assembly techniques. See Application Note QFN/SON PCB Attachment (SLUA271) and Application Report Quad Flatpack No-Lead Logic Packages (SCBA017), both available for download at www.ti.com. Soldering the exposed pad significantly improves board-level reliability during temperature cycling, key push, package shear, and similar board-level tests. Even with applications that have low-power dissipation, the exposed pad must be soldered to the PCB to provide structural integrity and long-term reliability. The exposed leadframe die pad on the bottom of the package should be connected to V– or left unconnected. 12 Submit Documentation Feedback PACKAGE OPTION ADDENDUM www.ti.com 9-Jul-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) OPA2333AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 O2333A OPA2333AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 O2333A OPA2333AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS CU NIPDAUAG & no Sb/Br) Level-1-260C-UNLIM -40 to 125 OBAQ OPA2333AIDGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS CU NIPDAUAG & no Sb/Br) Level-1-260C-UNLIM -40 to 125 OBAQ OPA2333AIDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS CU NIPDAUAG & no Sb/Br) Level-1-260C-UNLIM -40 to 125 OBAQ OPA2333AIDGKTG4 ACTIVE VSSOP DGK 8 250 Green (RoHS CU NIPDAUAG & no Sb/Br) Level-1-260C-UNLIM -40 to 125 OBAQ OPA2333AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 O2333A OPA2333AIDRBR ACTIVE SON DRB 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 BQZ OPA2333AIDRBRG4 ACTIVE SON DRB 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 BQZ OPA2333AIDRBT ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 BQZ OPA2333AIDRBTG4 ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 BQZ OPA2333AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 O2333A OPA333AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 0 O333A OPA333AIDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 OAXQ OPA333AIDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 OAXQ OPA333AIDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 OAXQ OPA333AIDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 OAXQ Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 9-Jul-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) OPA333AIDCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 BQY OPA333AIDCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 BQY OPA333AIDCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 BQY OPA333AIDCKTG4 ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 BQY OPA333AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 O333A OPA333AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 O333A OPA333AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 O333A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 9-Jul-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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OTHER QUALIFIED VERSIONS OF OPA2333, OPA333 : • Automotive: OPA2333-Q1, OPA333-Q1 NOTE: Qualified Version Definitions: • Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 19-Jul-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing OPA2333AIDGKT VSSOP SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DGK 8 250 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 OPA2333AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 OPA2333AIDRBR SON DRB 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 OPA2333AIDRBT SON DRB 8 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 OPA333AIDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3 OPA333AIDCKR SC70 DCK 5 3000 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3 OPA333AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 19-Jul-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) OPA2333AIDGKT VSSOP DGK OPA2333AIDR SOIC D 8 250 364.0 364.0 27.0 8 2500 367.0 367.0 35.0 OPA2333AIDRBR SON OPA2333AIDRBT SON DRB 8 3000 367.0 367.0 35.0 DRB 8 250 210.0 185.0 OPA333AIDBVR 35.0 SOT-23 DBV 5 3000 180.0 180.0 18.0 OPA333AIDCKR SC70 DCK 5 3000 203.0 203.0 35.0 OPA333AIDR SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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