ON NCP115AMX280TCG 300 ma cmos low dropout regulator Datasheet

NCP115
300 mA CMOS Low Dropout
Regulator
The NCP115 is 300 mA LDO that provides the engineer with a very
stable, accurate voltage with low noise suitable for space constrained,
noise sensitive applications. In order to optimize performance for
battery operated portable applications, the NCP115 employs the
dynamic quiescent current adjustment for very low IQ consumption at
no−load.
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MARKING
DIAGRAMS
Features
• Operating Input Voltage Range: 1.7 V to 5.5 V
• Available in Fixed Voltage Options: 0.8 V to 3.6 V
•
•
•
•
•
•
•
•
•
•
XDFN4
CASE 711AJ
1
Contact Factory for Other Voltage Options
Very Low Quiescent Current of Typ. 50 mA
Soft Start Feature with Two VOUT Slew Rate Speed
Standby Current Consumption: Typ. 0.1 mA
Low Dropout: 250 mV Typical at 300 mA @ 2.8 V
±1% Accuracy at Room Temperature
High Power Supply Ripple Rejection: 70 dB at 1 kHz
Thermal Shutdown and Current Limit Protections
Available in XDFN4 and TSOP−5 Packages
Stable with a 1 mF Ceramic Output Capacitor
These are Pb−Free Devices
XX M
1
XX = Specific Device Code
M = Date Code
5
XX M G
G
TSOP−5
CASE 483
5
1
1
XX
= Device Code
M
= Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
Typical Applicaitons
•
•
•
•
PIN CONNECTIONS
PDAs, Mobile phones, GPS, Smartphones
Wireless Handsets, Wireless LAN, Bluetooth®, Zigbee®
Portable Medical Equipment
Other Battery Powered Applications
VIN
EN
IN
3
4
2
1
VOUT
IN
OUT
NCP115
CIN
EN
ON
GND
OFF
COUT
1 mF
Ceramic
GND
OUT
(Bottom View)
Figure 1. Typical Application Schematic
IN
1
GND
2
EN
3
5 OUT
4 N/C
(Top View)
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 14 of this data sheet.
© Semiconductor Components Industries, LLC, 2017
April, 2018 − Rev. 2
1
Publication Order Number:
NCP115/D
NCP115
IN
ENABLE
LOGIC
EN
THERMAL
SHUTDOWN
BANDGAP
REFERENCE
MOSFET
DRIVER WITH
CURRENT LIMIT
OUT
AUTO LOW
POWER MODE
ACTIVE
DISCHARGE*
EN
GND
*Active output discharge function is present only in NCP115A and NCP115C devices.
yyy denotes the particular VOUT option.
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
(XDFN4)
Pin No.
(TSOP5)
Pin Name
Description
1
5
OUT
Regulated output voltage pin. A small ceramic capacitor with minimum value of 1 mF is needed from this pin to ground to assure stability.
2
2
GND
Power supply ground.
3
3
EN
Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regulator into
shutdown mode.
4
1
IN
Input pin. A small capacitor is needed from this pin to ground to assure stability.
−
4
N/C
−
−
EPAD
Not connected. This pin can be tied to ground to improve thermal dissipation.
Exposed pad should be connected directly to the GND pin. Soldered to a large ground copper plane allows for effective heat removal.
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VIN
−0.3 V to 6 V
V
Output Voltage
VOUT
−0.3 V to VIN + 0.3 V or 6 V
V
Enable Input
VEN
−0.3 V to 6 V
V
Input Voltage (Note 1)
tSC
∞
s
TJ(MAX)
150
°C
TSTG
−55 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Output Short Circuit Duration
Maximum Junction Temperature
Storage Temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114,
ESD Machine Model tested per EIA/JESD22−A115,
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS (Note 3)
Rating
Symbol
Value
Unit
Thermal Characteristics, XDFN4 1x1 mm
Thermal Resistance, Junction−to−Air
RqJA
208
°C/W
Thermal Characteristics, TSOP−5
Thermal Resistance, Junction−to−Air
RqJA
162
°C/W
3. Single component mounted on 1 oz, FR 4 PCB with 645 mm2 Cu area.
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2
NCP115
ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 85°C; VIN = VOUT(NOM) + 1 V for VOUT options greater than 1.5 V. Otherwise VIN =
2.5 V, whichever is greater; IOUT = 1 mA, CIN = COUT = 1 mF, unless otherwise noted. VEN = 0.9 V. Typical values are at TJ = +25°C.
Min./Max. are for TJ = −40°C and TJ = +85°C respectively (Note 4).
Parameter
Test Conditions
Operating Input Voltage
Output Voltage Accuracy
−40°C ≤ TJ ≤ 85°C
VOUT ≤ 2.0 V
Symbol
Min
VIN
VOUT
VOUT > 2.0 V
Line Regulation
Load Regulation − XDFN4 package
Max
Unit
1.7
5.5
V
−40
+40
mV
+2
%
VOUT + 0.5 V ≤ VIN ≤ 5.5 V (VIN ≥ 1.7 V)
RegLINE
−2
0.01
0.1
%/V
IOUT = 1 mA to 300 mA
RegLOAD
12
30
mV
28
45
425
560
250
320
215
260
445
580
VOUT = 2.8 V
270
340
VOUT = 3.3 V
235
280
Load Regulation − TSOP−5 package
Dropout Voltage − XDFN4 package
(Note 5)
IOUT = 300 mA
Dropout Voltage − TSOP−5 package
(Note 5)
IOUT = 300 mA
VOUT = 1.8 V
VDO
VOUT = 2.8 V
VOUT = 3.3 V
Output Current Limit
Typ
VOUT = 1.8 V
VDO
ICL
Quiescent Current
IOUT = 0 mA
IQ
50
95
mA
Shutdown Current
VEN ≤ 0.4 V, VIN = 5.5 V
IDIS
0.01
1
mA
EN Pin Threshold Voltage
High Threshold
Low Threshold
VEN Voltage increasing
VEN Voltage decreasing
VEN_HI
VEN_LO
Power Supply Rejection Ratio
Output Noise Voltage
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Active Output Discharge Resistance
mA
V
VOUT = 3.3 V, IOUT = 10 mA
Normal (version
A and B)
VOUT_SR
Slow (version C
and D)
EN Pin Input Current
600
mV
VOUT = 90% VOUT(nom)
VOUT Slew Rate (Note 6)
300
mV
VEN = 5.5 V
0.9
0.4
190
mV/ms
20
0.3
PSRR
70
dB
f = 10 Hz to 100 kHz
VN
70
mVrms
Temperature increasing from TJ = +25°C
TSD
160
°C
Temperature falling from TSD
TSDH
20
°C
VEN < 0.4 V, Version A and C only
RDIS
100
W
VIN = 3.8 V, VOUT = 3.5 V
IOUT = 10 mA
f = 1 kHz
1.0
mA
IEN
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at
TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
5. Characterized when VOUT falls 100 mV below the regulated voltage at VIN = VOUT(NOM) + 1 V.
6. Please refer OPN to determine slew rate. NCP115A, NCP115B − Normal speed. NCP115C, NCP115D − slower speed
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3
NCP115
TYPICAL CHARACTERISTICS
1.815
VOUT, OUTPUT VOLTAGE (V)
1.820
VOUT, OUTPUT VOLTAGE (V)
1.220
1.215
1.210
1.205
IOUT = 10 mA
1.200
1.195
IOUT = 300 mA
1.190
1.185
1.180
1.175
VIN = 2.5 V
VOUT = 1.2 V
CIN = 1 mF
COUT = 1 mF
1.170
−40 −30 −20 −10 0
10 20 30 40 50 60 70 80 90
2.805
IOUT = 10 mA
IOUT = 300 mA
2.780
2.775
2.770
−40 −30 −20 −10 0
10 20 30 40 50 60 70 80 90
3.305
3.300
3.295
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
IOUT = 10 mA
3.290
3.285
3.280
IOUT = 300 mA
3.275
3.270
3.265
3.260
−40 −30 −20 −10 0
10 20 30 40 50 60 70 80 90
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. Output Voltage vs. Temperature −
VOUT = 2.8 V − XDFN4
Figure 6. Output Voltage vs. Temperature −
VOUT = 3.3 V − XDFN4
REGLOAD, LOAD REGULATION (mV)
REGLINE, LINE REGULATION (%/V)
10 20 30 40 50 60 70 80 90
TJ, JUNCTION TEMPERATURE (°C))
0.005
0
1.780
3.310
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF
COUT = 1 mF
2.785
0.001
IOUT = 300 mA
1.785
Figure 4. Output Voltage vs. Temperature −
VOUT = 1.8 V − XDFN4
2.795
0.002
1.790
Figure 3. Output Voltage vs. Temperature −
VOUT = 1.2 V − XDFN4
2.790
0.003
1.795
TJ, JUNCTION TEMPERATURE (°C)
2.800
0.004
IOUT = 10 mA
1.800
TJ, JUNCTION TEMPERATURE (°C)
VOUT, OUTPUT VOLTAGE (V)
VOUT, OUTPUT VOLTAGE (V)
2.810
1.805
1.775
1.770
−40 −30 −20 −10 0
2.820
2.815
1.810
VIN = 2.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
VOUT = 1.2 V
VOUT = 1.8 V
VOUT = 2.8 V
VOUT = 3.3 V
−0.001
−0.002
−0.003
−0.004
−0.005
−40 −30 −20 −10 0
VIN = VOUT_NOM + 0.5 to 5.5 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
10 20 30 40 50 60 70 80 90
20
18
VOUT = 2.8 V
VOUT = 3.3 V
16
14
12
10
8
VOUT = 1.2 V
VOUT = 1.8 V
6 V =V
IN
OUT_NOM + 1 V
4 IOUT = 1 mA to 300 mA
CIN = 1 mF
2
COUT = 1 mF
0
−40 −30 −20 −10 0 10 20 30 40 50 60 70 80 90
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 7. Line Regulation vs. Temperature
Figure 8. Load Regulation vs. Temperature −
XDFN4
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4
NCP115
TYPICAL CHARACTERISTICS
70
VIN = VOUT_NOM + 1 V
CIN = 1 mF
COUT = 1 mF
500
TJ = 85°C
IQ, QUIESCENT CURRENT (mA)
IGND, GROUND CURRENT (mA)
600
TJ = 25°C
400
TJ = −40°C
300
200
100
0
0.001
0.01
0.1
1
10
28
VIN = 2.8 V
VOUT = 1.8 V
IOUT = 0 mA
CIN = 1 mF
COUT = 1 mF
21
14
7
0
1
2
3
4
5
6
Figure 9. Ground Current vs. Load Current
Figure 10. Quiescent Current vs. Input Voltage
VOUT = 1.8 V
350
TJ = 85°C
TJ = −40°C
250
200
150
TJ = 25°C
100
50
0
50
100
150
200
250
VOUT = 2.8 V
CIN = 1 mF
COUT = 1 mF
meas for VOUT_NOM − 100 mV
315
280
245
TJ = 85°C
210
175
TJ = −40°C
140
105
TJ = 25°C
70
35
0
0
300
50
100
150
200
250
300
IOUT, OUTPUT CURRENT (mA)
IOUT, OUTPUT CURRENT (mA)
Figure 11. Dropout Voltage vs. Load Current −
VOUT = 1.8 V
Figure 12. Dropout Voltage vs. Load Current −
VOUT = 2.8 V
720
300
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
meas for VOUT_NOM − 100 mV
270
240
210
700
TJ = 85°C
ICL, CURRENT LIMIT (mA)
VDROP, DROPOUT VOLTAGE (mV)
35
0
300
0
TJ = 85°C
42
1000
VDROP, DROPOUT VOLTAGE (mV)
VDO, DROPOUT VOLTAGE (mV)
350
49
VIN, INPUT VOLTAGE (V)
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
meas for VOUT_NOM − 100 mV
400
TJ = −40°C
56
IOUT, OUTPUT CURRENT (mA)
500
450
100
TJ = 25°C
63
180
150
TJ = −40°C
120
90
TJ = 25°C
60
50
100
150
200
250
660
640
620
600
580
560
540
520
−40 −30 −20 −10 0
30
0
0
680
300
VIN = 4.3 V
VOUT = 90% VOUT(nom)
CIN = 1 mF
COUT = 1 mF
10 20 30 40 50 60 70 80 90
IOUT, OUTPUT CURRENT (mA)
TJ, JUNCTION TEMPERATURE (°C)
Figure 13. Dropout Voltage vs. Load Current −
VOUT = 3.3 V
Figure 14. Current Limit vs. Temperature
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NCP115
680
660
640
620
600
580
560
540
520
500
−40 −30 −20 −10 0
VIN = 4.3 V
VOUT = 0 V (short)
CIN = 1 mF
COUT = 1 mF
10 20 30 40 50 60 70 80 90
1.0
0.9
0.8
OFF → ON
0.7
0.6
ON → OFF
0.5
0.4
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF
COUT = 1 mF
0.3
0.2
0.1
0
−40 −30 −20 −10 0
10 20 30 40 50 60 70 80 90
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 15. Short Circuit Current vs.
Temperature
Figure 16. Enable Thresholds Voltage
250
30
225
27
200
175
150
125
100
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
75
50
25
0
−40 −30 −20 −10 0
VIN = 4.3 V
VOUT = 0 V
CIN = 1 mF
COUT = 1 mF
VEN = 1 V
24
21
18
15
12
9
6
3
0
−40 −30 −20 −10 0
10 20 30 40 50 60 70 80 90
10 20 30 40 50 60 70 80 90
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 17. Current to Enable Pin vs.
Temperature
Figure 18. Disable Current vs. Temperature
100
100
90
80
Unstable Operation
70
10
60
ESR (W)
RDIS, DISCHARGE RESISTIVITY (W)
VEN, ENABLE VOLTAGE THRESHOLD (V)
700
IDIS, DISABLE CURRENT (nA)
IEN, ENABLE PIN CURRENT (nA)
ISC, SHORT CIRCUIT CURRENT (mA)
TYPICAL CHARACTERISTICS
50
40
1
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
30
20
10
0
−40 −30 −20 −10 0
Stable Operation
0.1
10 20 30 40 50 60 70 80 90
0
50
100
150
200
250
300
TJ, JUNCTION TEMPERATURE (°C)
IOUT, OUTPUT CURRENT (mA)
Figure 19. Discharge Resistance vs.
Temperature
Figure 20. Maximum COUT ESR Value vs. Load
Current
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NCP115
NOISE SPECTRAL DENSITY (mV/√Hz)
TYPICAL CHARACTERISTICS
10
IOUT = 1 mA
IOUT = 10 mA
IOUT = 300 mA
1
IOUT
0.1
VIN = 2.5 V
VOUT = 1.2 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
0.01
RMS Output Noise (mVRMS)
10 Hz − 100 kHz 100 Hz − 100 kHz
1 mA
65.6
61.9
10 mA
63.1
59.5
300 mA
62.3
60.3
0.001
10
100
1K
10K
100K
1M
10M
FREQUENCY (Hz)
NOISE SPECTRAL DENSITY (mV/√Hz)
Figure 21. Output Voltage Noise Spectral Density – VOUT = 1.2 V
10
IOUT = 1 mA
IOUT = 10 mA
IOUT = 300 mA
1
IOUT
1 mA
0.1
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
0.01
RMS Output Noise (mVRMS)
10 Hz − 100 kHz 100 Hz − 100 kHz
93.4
87.9
10 mA
92.1
86.6
300 mA
119.3
115.6
0.001
10
100
1K
10K
100K
1M
10M
FREQUENCY (Hz)
NOISE SPECTRAL DENSITY (mV/√Hz)
Figure 22. Output Voltage Noise Spectral Density – VOUT = 2.8 V
10
IOUT = 1 mA
IOUT = 10 mA
IOUT = 300 mA
1
IOUT
0.1
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
0.01
RMS Output Noise (mVRMS)
10 Hz − 100 kHz 100 Hz − 100 kHz
1 mA
104.0
98.0
10 mA
102.9
96.7
300 mA
131.4
127.0
0.001
10
100
1K
10K
100K
1M
10M
FREQUENCY (Hz)
Figure 23. Output Voltage Noise Spectral Density – VOUT = 3.3 V
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NCP115
TYPICAL CHARACTERISTICS
100
IOUT = 1 mA
IOUT = 10 mA
IOUT = 150 mA
IOUT = 300 mA
90
80
70
RR, RIPPLE REJECTION (dB)
RR, RIPPLE REJECTION (dB)
100
60
50
40
30
20
10
0
VIN = 2.5 V + 100 mVpp
VOUT = 1.2 V
CIN = none
COUT = 1 mF (MLCC)
100
1K
10K
100K
1M
40
30
VIN = 2.8 V + 100 mVpp
VOUT = 1.8 V
CIN = none
COUT = 1 mF (MLCC)
20
100
10M
1K
10K
100K
1M
Figure 24. Power Supply Rejection Ratio,
VOUT = 1.2 V
Figure 25. Power Supply Rejection Ratio,
VOUT = 1.8 V
10M
100
IOUT = 1 mA
IOUT = 10 mA
IOUT = 150 mA
IOUT = 300 mA
70
RR, RIPPLE REJECTION (dB)
RR, RIPPLE REJECTION (dB)
60
50
FREQUENCY (Hz)
80
60
50
40
20
70
FREQUENCY (Hz)
90
10
0
80
10
0
100
30
IOUT = 1 mA
IOUT = 10 mA
IOUT = 150 mA
IOUT = 300 mA
90
VIN = 3.8 V + 100 mVpp
VOUT = 2.8 V
CIN = none
COUT = 1 mF (MLCC)
IOUT = 1 mA
IOUT = 10 mA
IOUT = 150 mA
IOUT = 300 mA
90
80
70
60
50
40
30
VIN = 4.3 V + 100 mVpp
VOUT = 3.3 V
CIN = none
COUT = 1 mF (MLCC)
20
10
0
100
1K
10K
100K
1M
100
10M
1K
10K
100K
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 26. Power Supply Rejection Ratio,
VOUT = 2.8 V
Figure 27. Power Supply Rejection Ratio,
VOUT = 3.3 V
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10M
NCP115
100 mA/div 500 mV/div
VEN
VIN = 2.8 V
VOUT = 1.8 V
COUT = 1 mF (MLCC)
VOUT
IINPUT
500 mV/div
IINPUT
VEN
VIN = 2.8 V
VOUT = 1.8 V
COUT = 1 mF (MLCC)
VOUT
200 ms/div
Figure 28. Enable Turn−on Response −
IOUT = 0 mA, Slow Option − C
Figure 29. Enable Turn−on Response −
IOUT = 300 mA, Slow Option − C
500 mV/div
200 ms/div
50 mA/div
VEN
IINPUT
C option
VIN = 2.8 V
VOUT = 1.8 V
COUT = 1 mF (MLCC)
VOUT
IINPUT
500 mV/div
A option
VEN
A option
C option
VIN = 2.8 V
VOUT = 1.8 V
COUT = 1 mF (MLCC)
VOUT
50 ms/div
100 ms/div
Figure 30. VOUT Slew−Rate Comparison A and
C option − IOUT = 10 mA
Figure 31. VOUT Slew−Rate Comparison A and
C option − IOUT = 300 mA
tRISE,FALL = 1 ms
VIN
500 mV/div
3.0 V
2.0 V
VOUT = 1.2 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
20 mV/div
20 mV/div
500 mV/div
500 mV/div
50 mA/div
500 mV/div
500 mV/div
100 mA/div
500 mV/div
TYPICAL CHARACTERISTICS
VOUT
3.0 V
tRISE,FALL = 1 ms
VIN
2.0 V
VOUT = 1.2 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VOUT
10 ms/div
10 ms/div
Figure 32. Line Transient Response −
IOUT = 10 mA
Figure 33. Line Transient Response −
IOUT = 300 mA
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NCP115
tRISE,FALL = 1 ms
VIN
500 mV/div
4.8 V
3.8 V
20 mV/div
VOUT = 2.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VOUT
4.8 V
tRISE,FALL = 1 ms
VIN
3.8 V
VOUT = 2.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VOUT
10 ms/div
10 ms/div
Figure 34. Line Transient Response −
IOUT = 10 mA
Figure 35. Line Transient Response −
IOUT = 300 mA
100 mA/div
tRISE = 1 ms
VIN = 2.5 V
VOUT = 1.2 V
CIN = 1 mF (MLCC)
IOUT = 1 mA to 300 mA
IOUT
VIN = 2.5 V
VOUT = 1.2 V
CIN = 1 mF (MLCC)
IOUT = 1 mA to 300 mA
IOUT
tFALL = 1 ms
COUT = 1 mF
20 mV/div
COUT = 1 mF
VOUT
COUT = 4.7 mF
VOUT
COUT = 4.7 mF
10 ms/div
Figure 36. Load Transient Response −
VOUT = 1.2 V
Figure 37. Load Transient Response −
VOUT = 1.2 V
100 mA/div
5 ms/div
tRISE = 1 ms
VIN = 3.8 V, VOUT = 2.8 V
CIN = 1 mF (MLCC)
COUT = 1 mA to 300 mA
IOUT
IOUT
VIN = 3.8 V, VOUT = 2.8 V
CIN = 1 mF (MLCC)
IOUT = 1 mA to 300 mA
tFALL = 1 ms
COUT = 1 mF
COUT = 1 mF
20 mV/div
20 mV/div
100 mA/div
20 mV/div
100 mA/div
20 mV/div
500 mV/div
TYPICAL CHARACTERISTICS
VOUT
COUT = 4.7 mF
VOUT
COUT = 4.7 mF
5 ms/div
10 ms/div
Figure 38. Load Transient Response −
VOUT = 2.8 V
Figure 39. Load Transient Response −
VOUT = 2.8 V
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NCP115
100 mA/div
tRISE = 1 ms
VIN = 4.3 V, VOUT = 3.3 V
CIN = 1 mF (MLCC)
IOUT = 1 mA to 300 mA
IOUT
VIN = 4.3 V, VOUT = 3.3 V
CIN = 1 mF (MLCC)
IOUT = 1 mA to 300 mA
IOUT
tFALL = 1 ms
COUT = 1 mF
20 mV/div
COUT = 1 mF
VOUT
COUT = 4.7 mF
VOUT
COUT = 4.7 mF
5 ms/div
10 ms/div
Figure 40. Load Transient Response −
VOUT = 3.3 V
Figure 41. Load Transient Response −
VOUT = 3.3 V
VIN
VIN
VOUT
VOUT
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
500 mV/div
VIN = 3.8 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
10 ms/div
10 ms/div
Figure 42. Turn−on/off − Slow Rising
VIN − IOUT = 10 mA
Figure 43. Turn−on/off − Slow Rising
VIN − IOUT = 300 mA
100 mV/div
IOUT
VOUT
500 mV/div
500 mV/div
20 mV/div
100 mA/div
TYPICAL CHARACTERISTICS
TSD On
TSD Off
VIN = 5.5 V, VOUT = 1.8 V
CIN = 1 mF (MLCC), COUT = 1 mF (MLCC)
5 ms/div
Figure 44. Overheating Protection − TSD
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11
NCP115
APPLICATIONS INFORMATION
General
The NCP115 is a high performance 300 mA Low Dropout
Linear Regulator. This device delivers very high PSRR
(over 70 dB at 1 kHz) and excellent dynamic performance
as load/line transients. In connection with very low
quiescent current this device is very suitable for various
battery powered applications such as tablets, cellular
phones, wireless and many others. The device is fully
protected in case of output overload, output short circuit
condition and overheating, assuring a very robust design.
disable state the device consumes as low as typ. 10 nA from
the VIN.
If the EN pin voltage >0.9 V the device is guaranteed to
be enabled. The NCP115 regulates the output voltage and
the active discharge transistor is turned−off.
The EN pin has internal pull−down current source with
typ. value of 300 nA which assures that the device is
turned−off when the EN pin is not connected. In the case
where the EN function isn’t required the EN should be tied
directly to IN.
Input Capacitor Selection (CIN)
Output Current Limit
It is recommended to connect at least a 1 mF Ceramic X5R
or X7R capacitor as close as possible to the IN pin of the
device. This capacitor will provide a low impedance path for
unwanted AC signals or noise modulated onto constant
input voltage. There is no requirement for the min. /max.
ESR of the input capacitor but it is recommended to use
ceramic capacitors for their low ESR and ESL. A good input
capacitor will limit the influence of input trace inductance
and source resistance during sudden load current changes.
Larger input capacitor may be necessary if fast and large
load transients are encountered in the application.
Output Current is internally limited within the IC to a
typical 600 mA. The NCP115 will source this amount of
current measured with a voltage drops on the 90% of the
nominal VOUT. If the Output Voltage is directly shorted to
ground (VOUT = 0 V), the short circuit protection will limit
the output current to 630 mA (typ). The current limit and
short circuit protection will work properly over whole
temperature range and also input voltage range. There is no
limitation for the short circuit duration.
Thermal Shutdown
When the die temperature exceeds the Thermal Shutdown
threshold (TSD − 160°C typical), Thermal Shutdown event
is detected and the device is disabled. The IC will remain in
this state until the die temperature decreases below the
Thermal Shutdown Reset threshold (TSDU − 140°C typical).
Once the IC temperature falls below the 140°C the LDO is
enabled again. The thermal shutdown feature provides the
protection from a catastrophic device failure due to
accidental overheating. This protection is not intended to be
used as a substitute for proper heat sinking.
Output Decoupling (COUT)
The NCP115 requires an output capacitor connected as
close as possible to the output pin of the regulator. The
recommended capacitor value is 1 mF and X7R or X5R
dielectric due to its low capacitance variations over the
specified temperature range. The NCP115 is designed to
remain stable with minimum effective capacitance of
0.47 mF to account for changes with temperature, DC bias
and package size. Especially for small package size
capacitors such as 0402 the effective capacitance drops
rapidly with the applied DC bias.
There is no requirement for the minimum value of
Equivalent Series Resistance (ESR) for the COUT but the
maximum value of ESR should be less than 1.8 W. Larger
output capacitors and lower ESR could improve the load
transient response or high frequency PSRR. It is not
recommended to use tantalum capacitors on the output due
to their large ESR. The equivalent series resistance of
tantalum capacitors is also strongly dependent on the
temperature, increasing at low temperature.
Power Dissipation
As power dissipated in the NCP115 increases, it might
become necessary to provide some thermal relief. The
maximum power dissipation supported by the device is
dependent upon board design and layout. Mounting pad
configuration on the PCB, the board material, and the
ambient temperature affect the rate of junction temperature
rise for the part.
The maximum power dissipation the NCP115 can handle
is given by:
Enable Operation
P D(MAX) +
The NCP115 uses the EN pin to enable/disable its device
and to deactivate/activate the active discharge function.
If the EN pin voltage is <0.4 V the device is guaranteed to
be disabled. The pass transistor is turned−off so that there is
virtually no current flow between the IN and OUT. The
active discharge transistor is active so that the output voltage
VOUT is pulled to GND through a 100 W resistor. In the
ƪ125° C * T Aƫ
q JA
(eq. 1)
The power dissipated by the NCP115 for given
application conditions can be calculated from the following
equations:
P D [ V INǒI GND@I OUTǓ ) I OUTǒV IN * V OUTǓ
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12
(eq. 2)
0.80
350
0.74
315
PD(MAX), TA = 25°C, 2 oz Cu
280
245
0.68
0.62
PD(MAX), TA = 25°C, 1 oz Cu
210
0.56
qJA, 1 oz Cu
qJA, 2 oz Cu
175
0.50
140
0.44
105
0.38
70
0.32
35
0.26
0
0
100
200
300
400
500
600
PD(MAX), MAXIMUM POWER DISSIPATION (W)
qJA, JUNCTION TO AMBIENT THERMAL RESISTANCE (°C/W)
NCP115
0.20
700
PCB COPPER AREA (mm2)
1.0
250
225
PD(MAX), TA = 25°C, 2 oz Cu
0.9
200
PD(MAX), TA = 25°C, 1 oz Cu
0.8
175
qJA, 1 oz Cu
0.7
150
qJA, 2 oz Cu
0.6
125
0.5
100
0.4
75
0.3
50
0.2
25
0.1
0
0
100
200
300
400
500
COPPER HEAT SPREADER AREA (mm2)
600
Figure 46. qJA and PD (MAX) vs. Copper Area (XDFN4)
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13
0
700
PD(MAX), MAXIMUM POWER DISSIPATION (W)
qJA, JUNCTION TO AMBIENT THERMAL RESISTANCE (°C/W)
Figure 45. qJA and PD (MAX) vs. Copper Area (CSP4)
NCP115
Reverse Current
The NCP115 provides two options of VOUT ramp−up
time. The NCP115A and NCP115B have normal slew rate,
typical 190 mV/ms and NCP115C and NCP115D provide
slower option with typical value 20 mV/ms which is suitable
for camera sensor and other sensitive devices.
The PMOS pass transistor has an inherent body diode
which will be forward biased in the case that VOUT > VIN.
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
PCB Layout Recommendations
Power Supply Rejection Ratio
To obtain good transient performance and good regulation
characteristics place CIN and COUT capacitors close to the
device pins and make the PCB traces wide. In order to
minimize the solution size, use 0402 capacitors. Larger
copper area connected to the pins will also improve the
device thermal resistance. The actual power dissipation can
be calculated from the equation above (Equation 2). Expose
pad should be tied the shortest path to the GND pin.
The NCP115 features very good Power Supply Rejection
ratio. If desired the PSRR at higher frequencies in the range
100 kHz − 10 MHz can be tuned by the selection of COUT
capacitor and proper PCB layout.
Turn−On Time
The turn−on time is defined as the time period from EN
assertion to the point in which VOUT will reach 98% of its
nominal value. This time is dependent on various
application conditions such as VOUT(NOM) COUT and TA.
ORDERING INFORMATION − XDFN4 PACKAGE
Device
Voltage
Option
Marking
NCP115AMX105TCG
1.05 V
QM
NCP115AMX110TCG
1.1 V
QL
NCP115AMX120TCG
1.2 V
QA
NCP115AMX150TCG
1.5 V
QE
NCP115AMX180TCG
1.8 V
QC
NCP115AMX250TCG
2.5 V
QF
NCP115AMX280TCG
2.8 V
QG
NCP115AMX300TCG
3.0 V
QK
NCP115AMX330TCG
3.3 V
QH
NCP115AMX360TCG
3.6 V
QJ
NCP115CMX105TCG
1.05 V
RM
NCP115CMX110TCG
1.1 V
RF
NCP115CMX110TBG
1.1 V
RF
NCP115CMX120TCG
1.2 V
RE
NCP115CMX120TBG
1.2 V
RE
NCP115CMX150TCG
1.5 V
RG
NCP115CMX180TCG
1.8 V
RA
NCP115CMX180TBG
1.8 V
RA
NCP115CMX250TCG
2.5 V
RH
NCP115CMX280TCG
2.8 V
RC
NCP115CMX280TBG
2.8 V
RC
NCP115CMX300TCG
3.0 V
RK
NCP115CMX330TCG
3.3 V
RD
NCP115CMX360TCG
3.6 V
RJ
Description
Package
Shipping
XDFN4
(Pb−Free)
3000 / Tape &
Reel
300 mA, Active Discharge,
Normal Slew−rate
300 mA, Active Discharge,
Slow Slew−rate
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14
NCP115
ORDERING INFORMATION − TSOP−5 PACKAGE
Device
Voltage
Option
Marking
NCP115ASN105T1G
1.05 V
QAC
NCP115ASN110T1G
1.1 V
QAD
NCP115ASN120T1G
1.2 V
QAE
NCP115ASN150T1G
1.5 V
QAF
NCP115ASN180T1G
1.8 V
QAA
NCP115ASN250T1G
2.5 V
QAG
NCP115ASN280T1G
2.8 V
QAH
NCP115ASN300T1G
3.0 V
QAJ
NCP115ASN330T1G
3.3 V
QAK
NCP115CSN105T1G
1.05 V
QCC
NCP115CSN110T1G
1.1 V
QCD
NCP115CSN120T1G
1.2 V
QCE
NCP115CSN150T1G
1.5 V
QCF
NCP115CSN180T1G
1.8 V
QCA
NCP115CSN250T1G
2.5 V
QCG
NCP115CSN280T1G
2.8 V
QCH
NCP115CSN300T1G
3.0 V
QCJ
NCP115CSN330T1G
3.3 V
QCK
Description
Package
Shipping
TSOP−5
(Pb−Free)
3000 / Tape &
Reel
300 mA, Active Discharge, Normal Slew−rate
300 mA, Active Discharge, Slow Slew−rate
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15
NCP115
PACKAGE DIMENSIONS
TSOP−5
CASE 483
ISSUE M
NOTE 5
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
D 5X
0.20 C A B
0.10 T
M
2X
0.20 T
B
5
1
4
2
S
3
K
B
DETAIL Z
G
A
A
TOP VIEW
DIM
A
B
C
D
G
H
J
K
M
S
DETAIL Z
J
C
0.05
H
SIDE VIEW
C
SEATING
PLANE
END VIEW
MILLIMETERS
MIN
MAX
2.85
3.15
1.35
1.65
0.90
1.10
0.25
0.50
0.95 BSC
0.01
0.10
0.10
0.26
0.20
0.60
0_
10 _
2.50
3.00
SOLDERING FOOTPRINT*
0.95
0.037
1.9
0.074
2.4
0.094
1.0
0.039
0.7
0.028
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
16
NCP115
PACKAGE DIMENSIONS
XDFN4 1.0x1.0, 0.65P
CASE 711AJ
ISSUE A
PIN ONE
REFERENCE
0.05 C
2X
4X
A
B
D
ÉÉ
ÉÉ
E
4X
L2
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.20 mm FROM THE TERMINAL TIPS.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
b2
DETAIL A
DIM
A
A1
A3
b
b2
D
D2
E
e
L
L2
0.05 C
2X
TOP VIEW
(A3)
0.05 C
A
0.05 C
NOTE 4
A1
SIDE VIEW
C
SEATING
PLANE
e
RECOMMENDED
MOUNTING FOOTPRINT*
e/2
DETAIL A
1
4X
2
L
0.65
PITCH
D2
45 5
4X
3
4X
4X
b
0.05
BOTTOM VIEW
2X
0.52
PACKAGE
OUTLINE
D2
4
MILLIMETERS
MIN
MAX
0.33
0.43
0.00
0.05
0.10 REF
0.15
0.25
0.02
0.12
1.00 BSC
0.43
0.53
1.00 BSC
0.65 BSC
0.20
0.30
0.07
0.17
M
0.11
0.39
1.20
C A B
4X
NOTE 3
0.24
4X
0.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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