LINER LT6109-1 High side current sense amplifier with reference and comparator Datasheet

LT6109-1/LT6109-2
High Side Current Sense
Amplifier with Reference
and Comparators
DESCRIPTION
FEATURES
n
n
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Current Sense Amplifier
– Fast Step Response: 500ns
– Low Offset Voltage: 125µV Maximum
– Low Gain Error: 0.2% Maximum
Internal 400mV Precision Reference
Internal Latching Comparators with Reset
– Fast Response Time: 500ns
– Total Threshold Error: ±1.25% Maximum
– Two Comparator Polarity Options
Wide Supply Range: 2.7V to 60V
Supply Current: 550µA
Low Shutdown Current: 5µA Maximum
Specified for –40°C to 125°C Temperature Range
Available in 10-Lead MSOP Package
The LT®6109 is a complete high side current sense device
that incorporates a precision current sense amplifier, an
integrated voltage reference and two comparators. Two
versions of the LT6109 are available. The LT6109-1 has
the comparators connected in opposing polarity and the
LT6109-2 has the comparators connected in the same polarity. In addition, the current sense amplifier and comparator
inputs and outputs are directly accessible. The amplifier
gain and comparator trip points are configured by external
resistors. The open-drain comparator outputs allows for
easy interface to other system components.
The overall propagation delay of the LT6109 is typically
only 1.4µs, allowing for quick reaction to overcurrent
and undercurrent conditions. The 1MHz bandwidth allows the LT6109 to be used for error detection in critical
applications such as motor control. The high threshold
accuracy of the comparators, combined with the ability to
latch both comparators, ensures the LT6109 can capture
high speed events.
APPLICATIONS
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Overcurrent, Undercurrent and Fault Detection
Current Shunt Measurement
Battery Monitoring
Motor Control
Automotive Monitoring and Control
Remote Sensing
Industrial Control
The LT6109 is fully specified for operation from –40°C to
125°C, making it suitable for industrial and automotive applications. The LT6109 is available in a small 10-lead MSOP.
L, LT, LTC, LTM, TimerBlox, Linear Technology and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
TYPICAL APPLICATION
Response to Overcurrent Event
Circuit Fault Protection with Latching Load Disconnect and Early Warning Indication
0.1Ω
12V
6.2V*
1k
3.3V
IRF9640
TO LOAD
0.1µF
100Ω
SENSEHI SENSELO
10k
1k
2N2700
1.62k
100k
V+
VOUT
OUTA
LT6109-2
EN/RST
RESET
100mA WARNING
OUTC2
250mA DISCONNECT
OUTC1
ILOAD
200mA/DIV
0mA
VOUTC1
5V/DIV 0V
VOUTC2
5V/DIV 0V
6.04k
INC2
2.37k
V–
INC1
1.6k
610912 TA01a
*CMH25234B
VLOAD
10V/DIV
0V
250mA DISCONNECT
100mA WARNING
5µs/DIV
610912 TA01b
610912fa
1
LT6109-1/LT6109-2
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PIN CONFIGURATION
Total Supply Voltage (V+ to V–)..................................60V
Maximum Voltage
(SENSELO, SENSEHI, OUTA)................................ V+ + 1V
Maximum V+ – (SENSELO or SENSEHI).....................33V
Maximum EN/RST Voltage.........................................60V
Maximum Comparator Input Voltage.........................60V
Maximum Comparator Output Voltage......................60V
Input Current (Note 2)...........................................–10mA
SENSEHI, SENSELO Input Current........................ ±10mA
Differential SENSEHI or SENSELO Input Current....±2.5mA
Amplifier Output Short-Circuit Duration (to V–)... Indefinite
Operating Temperature Range (Note 3)
LT6109I.................................................–40°C to 85°C
LT6109H............................................. –40°C to 125°C
Specified Temperature Range (Note 3)
LT6109I.................................................–40°C to 85°C
LT6109H............................................. –40°C to 125°C
Maximum Junction Temperature........................... 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................... 300°C
TOP VIEW
SENSELO
EN/RST
OUTC2
OUTC1
V–
1
2
3
4
5
10
9
8
7
6
SENSEHI
V+
OUTA
INC2
INC1
MS PACKAGE
10-LEAD PLASTIC MSOP
θJA = 160°C/W, θJC = 45°C/W
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
LT6109AIMS-1#PBF
LT6109AIMS-1#TRPBF
LTFNJ
10-Lead Plastic MSOP
–40°C to 85°C
LT6109IMS-1#PBF
LT6109IMS-1#TRPBF
LTFNJ
10-Lead Plastic MSOP
–40°C to 85°C
LT6109AHMS-1#PBF
LT6109AHMS-1#TRPBF
LTFNJ
10-Lead Plastic MSOP
–40°C to 125°C
LT6109HMS-1#PBF
LT6109HMS-1#TRPBF
LTFNJ
10-Lead Plastic MSOP
–40°C to 125°C
LT6109AIMS-2#PBF
LT6109AIMS-2#TRPBF
LTFWY
10-Lead Plastic MSOP
–40°C to 85°C
LT6109IMS-2#PBF
LT6109IMS-2#TRPBF
LTFWY
10-Lead Plastic MSOP
–40°C to 85°C
LT6109AHMS-2#PBF
LT6109AHMS-2#TRPBF
LTFWY
10-Lead Plastic MSOP
–40°C to 125°C
LT6109HMS-2#PBF
LT6109HMS-2#TRPBF
LTFWY
10-Lead Plastic MSOP
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
610912fa
2
LT6109-1/LT6109-2
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 12V, VPULLUP = V+, VEN/RST = 2.7V, RIN = 100Ω,
ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise noted. (See Figure 3)
SYMBOL
PARAMETER
V+
Supply Voltage Range
IS
Supply Current (Note 4)
CONDITIONS
MIN
l
TYP
2.7
V+ = 2.7V, RIN = 1k, VSENSE = 5mV
V+ = 60V, RIN = 1k, VSENSE = 5mV
60
475
V+ = 2.7V, VEN/RST = 0V, RIN = 1k, VSENSE = 0.5V
VIH
VIL
VEN/RST = 0V, V+ = 60V
EN/RST Pin Input High
V+ = 2.7V to 60V
l
EN/RST Pin Input Low
V+ = 2.7V to 60V
l
µA
µA
µA
3
5
7
µA
µA
7
11
13
µA
µA
l
EN/RST Pin Current
V
700
1000
l
V+ = 60V, VEN/RST = 0V, RIN = 1k, VSENSE = 0.5V
UNITS
600
l
Supply Current in Shutdown
MAX
–200
nA
1.9
V
0.8
V
125
350
250
450
µV
µV
µV
µV
Current Sense Amplifier
VSENSE = 5mV, LT6109A
VSENSE = 5mV, LT6109
VSENSE = 5mV, LT6109A
VSENSE = 5mV, LT6109
l
l
Input Offset Voltage Drift
VSENSE = 5mV
l
Input Bias Current
(SENSELO, SENSEHI)
V+ = 2.7V to 60V
IOS
Input Offset Current
V+ = 2.7V to 60V
IOUTA
Output Current (Note 5)
PSRR
Power Supply Rejection Ratio
(Note 6)
V+ = 2.7V to 60V
Common Mode Rejection Ratio
V+ = 36V, VSENSE = 5mV, VICM = 2.7V to 36V
VOS
∆VOS/∆T
IB
CMRR
Input Offset Voltage
–125
–350
–250
–450
±0.8
60
l
V+ = 60V, V
µV/°C
300
350
±5
l
1
l
120
114
nA
mA
127
dB
dB
125
dB
125
dB
dB
l
110
103
RIN = 500Ω
l
500
V+ = 2.7V to 12V
V+ = 12V to 60V, VSENSE = 5mV to 100mV
l
–0.2
SENSELO Voltage (Note 8)
V+ = 2.7V, VSENSE = 100mV, ROUT = 2k
V+ = 60V, VSENSE = 100mV
l
l
2.5
27
Output Swing High (V+ to VOUTA)
V+ = 2.7V, VSENSE = 27mV
l
0.2
V
V+ = 12V, V
l
0.5
V
VSENSE(MAX) Full-Scale Input Sense Voltage
(Note 5)
Gain Error (Note 7)
SENSE = 5mV, VICM = 27V to 60V
nA
nA
SENSE = 120mV
mV
–0.08
0
%
%
V
V
BW
Signal Bandwidth
IOUT = 1mA
IOUT = 100µA
1
140
MHz
kHz
tr
Input Step Response (to 50% of
Final Output Voltage)
V+ = 2.7V, VSENSE = 24mV Step, Output Rising Edge
V+ = 12V to 60V, VSENSE = 100mV Step, Output Rising Edge
500
500
ns
ns
tSETTLE
Settling Time to 1%
VSENSE = 10mV to 100mV, ROUT = 2k
2
µs
610912fa
3
LT6109-1/LT6109-2
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 12V, VPULLUP = V+, VEN/RST = 2.7V, RIN = 100Ω,
ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise noted. (See Figure 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Reference and Comparator
VTH(R)
(Note 9)
Rising Input Threshold Voltage
(LT6109-1 Comparator 1
LT6109-2 Both Comparators)
V+ = 2.7V to 60V, LT6109A
V+ = 2.7V to 60V, LT6109
l
l
395
392
400
400
405
408
mV
mV
VTH(F)
(Note 9)
Falling Input Threshold Voltage
(LT6109-1 Comparator 2)
V+ = 2.7V to 60V, LT6109A
V+ = 2.7V to 60V, LT6109
l
l
395
392
400
400
405
408
mV
mV
VHYS
VHYS = VTH(R) – VTH(F)
V+ = 2.7V to 60V
3
10
15
mV
Comparator Input Bias Current
VOL
Output Low Voltage
VINC1,2
= 0V, V+ = 60V
IOUTC1,C2
l
–50
= 500µA, V+ = 2.7V
nA
60
l
High to Low Propagation Delay
5mV Overdrive
100mV Overdrive
150
220
mV
mV
3
0.5
µs
µs
Output Fall Time
0.08
µs
tRESET
Reset Time
0.5
µs
tRPW
Valid RST Pulse Width
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Input and output pins have ESD diodes connected to ground. The
SENSEHI and SENSELO pins have additional current handling capability
specified as SENSEHI, SENSELO input current.
Note 3: The LT6109I is guaranteed to meet specified performance from
–40°C to 85°C. LT6109H is guaranteed to meet specified performance
from –40°C to 125°C.
Note 4: Supply current is specified with the comparator outputs high.
When the comparator outputs go low the supply current will increase by
75µA typically per comparator.
l
2
15
µs
Note 5: The full-scale input sense voltage and the maximum output
current must be considered to achieve the specified performance.
Note 6: Supply voltage and input common mode voltage are varied while
amplifier input offset voltage is monitored.
Note 7: Specified gain error does not include the effects of external
resistors RIN and ROUT. Although gain error is only guaranteed between
12V and 60V, similar performance is expected for V+ < 12V, as well.
Note 8: Refer to SENSELO, SENSEHI Range in the Applications
Information section for more information.
Note 9: The input threshold voltage which causes the output voltage of the
comparator to transition from high to low is specified. The input voltage
which causes the comparator output to transition from low to high is
the magnitude of the difference between the specified threshold and the
hysteresis.
610912fa
4
LT6109-1/LT6109-2
TYPICAL
PERFORMANCE
CHARACTERISTICS Performance characteristics taken at TA = 25°C,
+
+
V = 12V, VPULLUP = V , VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless
otherwise noted. (See Figure 3)
Supply Current vs Supply Voltage
Start-Up Supply Current
Enable/Disable Response
700
SUPPLY CURRENT (µA)
600
V+
5V/DIV
500
VEN/RST
2V/DIV
0V
400
0V
300
200
IS
500µA/DIV
100
0µA
0
10
40
30
20
SUPPLY VOLTAGE (V)
50
60
10µs/DIV
610912 G03
Input Offset Voltage
vs Temperature
Amplifier Offset Voltage
vs Supply Voltage
100
5 TYPICAL UNITS
200
Offset Voltage Drift Distribution
12
5 TYPICAL UNITS
80
60
OFFSET VOLTAGE (µV)
INPUT OFFSET VOLTAGE (µV)
300
100µs/DIV
610912 G02
610912 G01
100
0
–100
40
20
0
–20
–40
–60
–200
10
PERCENTAGE OF UNITS (%)
0
IS
500µA/DIV
0µA
8
6
4
2
–80
–300
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
–100
0
10
30
40
20
SUPPLY VOLTAGE (V)
Amplifier Gain Error
vs Temperature
25
Amplifier Output Swing
vs Temperature
RIN = 1k
–0.05
RIN = 100Ω
–0.10
–0.15
0.50
VSENSE = 5mV TO 100mV
0.45
0.40
20
V+ = 12V
VSENSE = 120mV
0.35
V+ – VOUTA (V)
PERCENTAGE OF UNITS (%)
0
–2 –1.5 –1 –0.5 0 0.5 1 1.5 2
OFFSET VOLTAGE DRIFT (µV/°C)
610912 G06
Amplifier Gain Error Distribution
VSENSE = 5mV TO 100mV
GAIN ERROR (%)
0
60
610912 G05
610912 G04
0.05
50
0.30
15
0.25
0.20
10
V+ = 2.7V
VSENSE = 27mV
0.15
0.10
5
0.05
–0.20
–50
–25
50
0
75
25
TEMPERATURE (°C)
100
125
610912 G07
0
–0.048 –0.052 –0.056 –0.060 –0.064 –0.68
GAIN ERROR (%)
610912 G08
0
–50
–25
50
25
0
75
TEMPERATURE (°C)
100
125
610912 G18
610912fa
5
LT6109-1/LT6109-2
TYPICAL
PERFORMANCE
CHARACTERISTICS Performance characteristics taken at TA = 25°C,
+
+
V = 12V, VPULLUP = V , VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless
otherwise noted. (See Figure 3)
Common Mode Rejection Ratio
vs Frequency
Power Supply Rejection Ratio
vs Frequency
120
100
80
60
40
20
1
10
100 1k 10k 100k
FREQUENCY (Hz)
1M
120
100
80
60
28
G = 20, ROUT = 2k
22
20
1
10
100 1k 10k 100k
FREQUENCY (Hz)
1M
10M
16
IOUTA = 1mA
IOUTA = 100µA
1k
10k
100k
1M
FREQUENCY (Hz)
Amplifier Step Response
(VSENSE = 0mV to 100mV)
Amplifier Input Bias Current
vs Temperature
System Step Response
100
VSENSE
100mV/DIV
0V
RIN = 100Ω
G = 100V/V
INPUT BIAS CURRENT (nA)
90
VOUTA
1V/DIV
0V
VOUTC1
2V/DIV
0V
ROUT = 2k,100mV INC1 OVERDRIVE
2µs/DIV
610912 G12
10M
610912 G11
610912 G10
610912 G09
VEN/RST
5V/DIV
0V
G = 50, ROUT = 5k
34
40
0
10M
G = 100
40
GAIN (dB)
COMMON MODE REJECTION RATIO (dB)
POWER SUPPLY REJECTION RATIO (dB)
140
0
Amplifier Gain vs Frequency
46
140
160
80
70
SENSEHI
60
50
VOUTA
2V/DIV
SENSELO
0V
40
30
20
VSENSE
50mV/DIV
10
0V
0
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
2µs/DIV
610912 G14
610912 G13
Amplifier Step Response
(VSENSE = 10mV to 100mV)
Amplifier Step Response
(VSENSE = 10mV to 100mV)
Amplifier Step Response
(VSENSE = 0mV to 100mV)
RIN = 1k
ROUT = 20k
G = 20V/V
RIN = 100Ω
G = 100V/V
VOUTA
2V/DIV
RIN = 1k
ROUT = 20k
G = 20V/V
VOUTA
1V/DIV
VOUTA
1V/DIV
0V
0V
VSENSE
100mV/DIV
0V
VSENSE
100mV/DIV
0V
0V
VSENSE
50mV/DIV
0V
2µs/DIV
2µs/DIV
610912 G15
2µs/DIV
610912 G16
610912 G17
610912fa
6
LT6109-1/LT6109-2
TYPICAL
PERFORMANCE
CHARACTERISTICS Performance characteristics taken at TA = 25°C,
+
+
V = 12V, VPULLUP = V , VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless
otherwise noted. (See Figure 3)
Comparator Threshold
vs Temperature
Comparator Threshold
Distribution
408
20
15
10
5
0
396
397.6 399.2 400.8 402.8
COMPARATOR THRESHOLD (mV)
Hysteresis Distribution
30
5 TYPICAL PARTS
406
25
PERCENTAGE OF UNITS (%)
COMPARATOR THRESHOLD (mV)
PERCENTAGE OF UNITS (%)
25
404
402
400
398
396
394
14
12
10
8
6
4
2
0
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
0
10
8
6
4
–50
–100
–150
–200
2
0
0
10
20
30
V+ (V)
40
50
60
–250
–10
125°C
25°C
–40°C
20
40
COMPARATOR INPUT VOLTAGE (V)
60
610912 G25
1.00
0
–5
–10
125°C
25°C
–40°C
–15
–20
0
0.2
0.4
0.6
0.8
COMPARATOR INPUT VOLTAGE (V)
50
60
125°C
25°C
–40°C
5
VOLOUTC1, OUTC2 (V)
COMPARATOR INPUT BIAS CURRENT (nA)
–5
20
30
40
EN/RST VOLTAGE (V)
Comparator Output Low Voltage
vs Output Sink Current
10
0
10
610912 G24
Comparator Input Bias Current
vs Input Voltage
5
0
610912 G23
10
COMPARATOR INPUT BIAS CURRENT (nA)
EN/RST Current vs Voltage
12
Comparator Input Bias Current
vs Input Voltage
0
5
50
5 TYPICAL PARTS
610912 G22
–20
10
610912 G21
EN/RST CURRENT (nA)
COMPARATOR HYSTERESIS (mV)
COMPARATOR HYSTERESIS (mV)
18
–15
15
Hysteresis vs Supply Voltage
Hysteresis vs Temperature
20
14
125°C
610912 G20
610912 G19
16
25°C
0
3.0 4.6 6.2 7.7 9.3 10.9 12.5 14.1 15.7 17.3
COMPARATOR HYSTERESIS (mV)
392
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
404
–40°C
20
1.0
610912 G26
0.75
0.50
0.25
0
0
2
1
3
IOUTC (mA)
610912 G27
610912fa
7
LT6109-1/LT6109-2
TYPICAL
PERFORMANCE
CHARACTERISTICS Performance characteristics taken at TA = 25°C,
+
+
V = 12V, VPULLUP = V , VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless
otherwise noted. (See Figure 3)
Comparator Propagation Delay
vs Input Overdrive
Comparator Output Leakage
Current vs Pull-Up Voltage
5.0
18
125°C
13
8
3
–2
–40°C AND 25°C
0
50
60
20
30
40
10
COMPARATOR OUTPUT PULL-UP VOLTAGE (V)
10000
4.0
3.5
3.0
2.5
2.0
H TO L
1.5
1000
RISE TIME
FALL TIME
100
1.0
L TO H
0.5
0
0
40
120
160
200
80
COMPARATOR INPUT OVERDRIVE (mV)
610912 G28
10
1
10
100
RC PULL-UP RESISTOR (kΩ)
1000
610912 G30
610912 G29
Comparator Step Response
(5mV INC1 Overdrive)
Comparator Step Response
(100mV INC1 Overdrive)
Comparator Reset Response
VINC
0.5V/DIV
0V
VINC
0.5V/DIV
0V
VOH = 0.9 • VPULLUP
VOL = 0.1 • VPULLUP
100mV INC1 OVERDRIVE
CL = 2pF
4.5
RISE/FALL TIME (ns)
COMPARATOR PROPAGATION DELAY (µs)
OUTC1, OUTC2 LEAKAGE CURRENT (nA)
23
Comparator Rise/Fall Time
vs Pull-Up Resistor
VOUTC
5V/DIV
0V
VOUTC
2V/DIV
VOUTC
2V/DIV
0V
0V
VEN/RST
5V/DIV
0V
VEN/RST
2V/DIV
VEN/RST
5V/DIV
0V
0V
5µs/DIV
5µs/DIV
610912 G31
5µs/DIV
610912 G32
610912 G33
PIN FUNCTIONS
SENSELO (Pin 1): Sense Amplifier Input. This pin must
be tied to the load end of the sense resistor.
EN/RST (Pin 2): Enable and Latch Reset Input. When the
EN/RST pin is pulled high the LT6109 is enabled. When the
EN/RST pin is pulled low for longer than typically 40µs,
the LT6109 will enter the shutdown mode. Pulsing this pin
low for between 2µs and 15µs will reset the comparators
of the LT6109.
OUTC2 (Pin 3): Open-Drain Comparator 2 Output. Offstate voltage may be as high as 60V above V–, regardless
of V+ used.
OUTC1 (Pin 4): Open-Drain Comparator 1 Output. Offstate voltage may be as high as 60V above V–, regardless
of V+ used.
V– (Pin 5): Negative Supply Pin. This pin is normally connected to ground.
610912fa
8
LT6109-1/LT6109-2
PIN FUNCTIONS
V+ (Pin 9): Positive Supply Pin. The V+ pin can be connected directly to either side of the sense resistor, RSENSE.
When V+ is tied to the load end of the sense resistor, the
SENSEHI pin can go up to 0.2V above V+. Supply current
is drawn through this pin.
INC1 (Pin 6): This is the inverting input of comparator 1.
The second input of this comparator is internally connected
to the 400mV reference.
INC2 (Pin 7): This is the input of comparator 2. For the
LT6109-1 this is the noninverting input of comparator 2.
For the LT6109-2 this is the inverting input of comparator 2. The second input of each of these comparators is
internally connected to the 400mV reference.
SENSEHI (Pin 10): Sense Amplifier Input. The internal
sense amplifier will drive SENSEHI to the same potential
as SENSELO. A resistor (typically RIN) tied from supply
to SENSEHI sets the output current, IOUT = VSENSE/RIN,
where VSENSE is the voltage developed across RSENSE.
OUTA (Pin 8): Current Output of the Sense Amplifier. This
pin will source a current that is equal to the sense voltage
divided by the external gain setting resistor, RIN.
BLOCK DIAGRAMS
9
V+
LT6109-1
100Ω
10
1
SENSEHI
3k
SENSELO
3k
34V
–
+
OUTA
V–
V–
6V
8
V–
V+
200nA
2
EN/RST
ENABLE AND
RESET TIMING
RESET
V+
OUTC2
INC2
+
3
UNDERCURRENT FLAG
7
–
V–
400mV
REFERENCE
V+
OUTC1
+
OVERCURRENT FLAG
–
4
INC1
6
V–
5
610912 F01
Figure 1. LT6109-1 Block Diagram (Comparators with Opposing Polarity)
610912fa
9
LT6109-1/LT6109-2
BLOCK DIAGRAMS
9
V+
LT6109-2
100Ω
10
1
SENSEHI
3k
SENSELO
3k
34V
–
+
OUTA
V–
V–
6V
8
V–
V+
200nA
2
EN/RST
ENABLE AND
RESET TIMING
RESET
V+
INC2
–
3
OUTC2
OVERCURRENT FLAG
7
+
V–
400mV
REFERENCE
V+
OUTC1
+
4
OVERCURRENT FLAG
INC1
6
–
V–
5
610912 F02
Figure 2. LT6109-2 Block Diagram (Comparators with the Same Polarity)
APPLICATIONS INFORMATION
The LT6109 high side current sense amplifier provides
accurate monitoring of currents through an external sense
resistor. The input sense voltage is level-shifted from the
sensed power supply to a ground referenced output and
is amplified by a user-selected gain to the output. The
output voltage is directly proportional to the current flowing through the sense resistor.
The LT6109 comparators have a threshold set with a built-in
400mV precision reference and have 10mV of hysteresis.
The open-drain outputs can be easily used to level shift
to digital supplies.
Amplifier Theory of Operation
An internal sense amplifier loop forces SENSEHI to have
the same potential as SENSELO as shown in Figure 3.
Connecting an external resistor, RIN, between SENSEHI
and VSUPPLY forces a potential, VSENSE, across RIN. A
corresponding current, IOUTA, equal to VSENSE/RIN, will
flow through RIN. The high impedance inputs of the sense
amplifier do not load this current, so it will flow through
an internal MOSFET to the output pin, OUTA.
610912fa
10
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
The output current can be transformed back into a voltage
by adding a resistor from OUTA to V–(typically ground).
The output voltage is then:
VOUT
= V– + I
OUTA • ROUT
where ROUT = R1 + R2 + R3 as shown in Figure 3.
Table 1. Example Gain Configurations
GAIN
RIN
ROUT
VSENSE FOR VOUT = 5V
IOUTA AT VOUT = 5V
20
499Ω
10k
250mV
500µA
50
200Ω
10k
100mV
500µA
100
100Ω
10k
50mV
500µA
Useful Equations
Input Voltage: VSENSE = ISENSE •RSENSE
Voltage Gain:
VOUT
R
= OUT
VSENSE RIN
I
R
Current Gain: OUTA = SENSE
ISENSE
RIN
Note that VSENSE(MAX) can be exceeded without damaging the amplifier, however, output accuracy will degrade
as VSENSE exceeds VSENSE(MAX), resulting in increased
output current, IOUTA.
Selection of External Current Sense Resistor
The external sense resistor, RSENSE, has a significant effect
on the function of a current sensing system and must be
chosen with care.
First, the power dissipation in the resistor should be
considered. The measured load current will cause power
dissipation as well as a voltage drop in RSENSE. As a
result, the sense resistor should be as small as possible
while still providing the input dynamic range required by
the measurement. Note that the input dynamic range is
the difference between the maximum input signal and the
minimum accurately reproduced signal, and is limited
primarily by input DC offset of the internal sense amplifier of the LT6109. To ensure the specified performance,
RSENSE should be small enough that VSENSE does not
exceed VSENSE(MAX) under peak load conditions. As an
example, an application may require the maximum sense
voltage be 100mV. If this application is expected to draw
2A at peak load, RSENSE should be set to 50mΩ.
Once the maximum RSENSE value is determined, the minimum sense resistor value will be set by the resolution or
dynamic range required. The minimum signal that can be
accurately represented by this sense amplifier is limited by
the input offset. As an example, the LT6109 has a maximum
input offset of 125µV. If the minimum current is 20mA, a
sense resistor of 6.25mΩ will set VSENSE to 125µV. This is
the same value as the input offset. A larger sense resistor
will reduce the error due to offset by increasing the sense
voltage for a given load current. Choosing a 50mΩ RSENSE
will maximize the dynamic range and provide a system
that has 100mV across the sense resistor at peak load
(2A), while input offset causes an error equivalent to only
2.5mA of load current.
In the previous example, the peak dissipation in RSENSE
is 200mW. If a 5mΩ sense resistor is employed, then
the effective current error is 25mA, while the peak sense
voltage is reduced to 10mV at 2A, dissipating only 20mW.
The low offset and corresponding large dynamic range of
the LT6109 make it more flexible than other solutions in this
respect. The 125µV maximum offset gives 72dB of dynamic
range for a sense voltage that is limited to 500mV max.
Sense Resistor Connection
Kelvin connection of the SENSEHI and SENSELO inputs
to the sense resistor should be used in all but the lowest
power applications. Solder connections and PC board
interconnections that carry high currents can cause significant error in measurement due to their relatively large
resistances. One 10mm × 10mm square trace of 1oz copper
is approximately 0.5mΩ. A 1mV error can be caused by as
little as 2A flowing through this small interconnect. This
will cause a 1% error for a full-scale VSENSE of 100mV.
A 10A load current in the same interconnect will cause
a 5% error for the same 100mV signal. By isolating the
sense traces from the high current paths, this error can
be reduced by orders of magnitude. A sense resistor with
integrated Kelvin sense terminals will give the best results.
Figure 3 illustrates the recommended method for connecting the SENSEHI and SENSELO pins to the sense resistor.
610912fa
11
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
VSUPPLY
+
RIN
VSENSE
–
+
LOAD
V
ISENSE = SENSE
RSENSE
VPULLUP
VRESET
RC
–
V–
V+
V+
2 EN/RST
9
C1
OUTA 8
V+
3 OUTC2
CLC
IOUTA
V–
RC
INC2 7
VOUT
R3*
CL
4 OUTC1
5
V–
–
CLC
400mV
REFERENCE
V+
R2*
+
OVERCURRENT
FLAG
SENSEHI 10
–
UNDERCURRENT
FLAG
LT6109-1
1 SENSELO
+
RSENSE
INC1 6
R1*
V–
610912 F03
*ROUT = R1 + R2 + R3
Figure 3. LT6109-1 Typical Connection
Selection of External Input Gain Resistor, RIN
RIN should be chosen to allow the required speed and
resolution while limiting the output current to 1mA. The
maximum value for RIN is 1k to maintain good loop stability. For a given VSENSE, larger values of RIN will lower
power dissipation in the LT6109 due to the reduction
in IOUT while smaller values of RIN will result in faster
response time due to the increase in IOUT . If low sense
currents must be resolved accurately in a system that has
a very wide dynamic range, a smaller RIN may be used
if the maximum IOUTA current is limited in another way,
such as with a Schottky diode across RSENSE (Figure 4).
This will reduce the high current measurement accuracy
by limiting the result, while increasing the low current
measurement resolution.
This approach can be helpful in cases where occasional
bursts of high currents can be ignored.
V+
RSENSE
DSENSE
610912 F04
LOAD
Figure 4. Shunt Diode Limits Maximum Input Voltage to Allow
Better Low Input Resolution Without Overranging
Care should be taken when designing the board layout for
RIN, especially for small RIN values. All trace and interconnect resistances will increase the effective RIN value,
causing a gain error.
The power dissipated in the sense resistor can create a
thermal gradient across a printed circuit board and consequently a gain error if RIN and ROUT are placed such
that they operate at different temperatures. If significant
power is being dissipated in the sense resistor then care
610912fa
12
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
should be taken to place RIN and ROUT such that the gain
error due to the thermal gradient is minimized.
Selection of External Output Gain Resistor, ROUT
The output resistor, ROUT , determines how the output current is converted to voltage. VOUT is simply IOUTA • ROUT .
Typically, ROUT is a combination of resistors configured
as a resistor divider which has voltage taps going to the
comparator inputs to set the comparator thresholds.
In choosing an output resistor, the maximum output voltage must first be considered. If the subsequent circuit is a
buffer or ADC with limited input range, then ROUT must be
chosen so that IOUTA(MAX) • ROUT is less than the allowed
maximum input range of this circuit.
In addition, the output impedance is determined by ROUT .
If another circuit is being driven, then the input impedance
of that circuit must be considered. If the subsequent circuit
has high enough input impedance, then almost any useful output impedance will be acceptable. However, if the
subsequent circuit has relatively low input impedance, or
draws spikes of current such as an ADC load, then a lower
output impedance may be required to preserve the accuracy
of the output. More information can be found in the Output
Filtering section. As an example, if the input impedance of
the driven circuit, RIN(DRIVEN), is 100 times ROUT, then the
accuracy of VOUT will be reduced by 1% since:
VOUT = IOUTA •
ROUT •RIN(DRIVEN)
ROUT +RIN(DRIVEN)
= IOUTA •ROUT •
100
= 0.99 •IOUTA •ROUT
101
Amplifier Error Sources
The current sense system uses an amplifier and resistors
to apply gain and level-shift the result. Consequently, the
output is dependent on the characteristics of the amplifier,
such as gain error and input offset, as well as the matching
of the external resistors.
In this case, the only error is due to external resistor
mismatch, which provides an error in gain only. However,
offset voltage, input bias current and finite gain in the
amplifier can cause additional errors:
Output Voltage Error, ∆VOUT(VOS), Due to the Amplifier
DC Offset Voltage, VOS
∆VOUT(VOS) = VOS •
ROUT
RIN
The DC offset voltage of the amplifier adds directly to the
value of the sense voltage, VSENSE. As VSENSE is increased,
accuracy improves. This is the dominant error of the system
and it limits the available dynamic range.
Output Voltage Error, ∆VOUT(IBIAS), Due to the Bias
Currents IB+ and IB–
The amplifier bias current IB+ flows into the SENSELO pin
while IB– flows into the SENSEHI pin. The error due to IB
is the following:


R
∆VOUT(IBIAS) = ROUT  IB+ • SENSE –IB–
RIN


Since IB+ ≈ IB– = IBIAS, if RSENSE << RIN then,
∆VOUT(IBIAS) = –ROUT (IBIAS)
It is useful to refer the error to the input:
∆VVIN(IBIAS) = –RIN (IBIAS)
For instance, if IBIAS is 100nA and RIN is 1k, the input referred error is 100µV. This error becomes less significant
as the value of RIN decreases. The bias current error can
be reduced if an external resistor, RIN+, is connected as
shown in Figure 5, the error is then reduced to:
VOUT(IBIAS) = ±ROUT • IOS; IOS = IB+ – IB–
Minimizing low current errors will maximize the dynamic
range of the circuit.
Ideally, the circuit output is:
VOUT = VSENSE •
ROUT
; VSENSE = RSENSE •ISENSE
RIN
610912fa
13
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
There is also power dissipated due to the quiescent power
supply current:
V+
9
V+
LT6109
VBATT
RSENSE
PS = IS • V+
–
RIN 10 SENSEHI
+
1 SENSELO
RIN+
OUTA 8
ISENSE
5
VOUT
ROUT
V–
610912 F05
Figure 5. RIN+ Reduces Error Due to IB
Output Voltage Error, ∆VOUT(GAIN ERROR), Due to
External Resistors
The LT6109 exhibits a very low gain error. As a result,
the gain error is only significant when low tolerance
resistors are used to set the gain. Note the gain error is
systematically negative. For instance, if 0.1% resistors
are used for RIN and ROUT then the resulting worst-case
gain error is –0.4% with RIN = 100Ω. Figure 6 is a graph
of the maximum gain error which can be expected versus
the external resistor tolerance.
RESULTING GAIN ERROR (%)
10
The comparator output current flows into the comparator
output pin and out of the V– pin. The power dissipated in
the LT6109 due to each comparator is often insignificant
and can be calculated as follows:
POUTC1,C2 = (VOUTC1,C2 – V–) • IOUTC1,C2
The total power dissipated is the sum of these
dissipations:
PTOTAL = POUTA + POUTC1 + POUTC2 + PS
At maximum supply and maximum output currents, the
total power dissipation can exceed 100mW. This will
cause significant heating of the LT6109 die. In order to
prevent damage to the LT6109, the maximum expected
dissipation in each application should be calculated. This
number can be multiplied by the θJA value, 160°C/W, to
find the maximum expected die temperature. Proper heat
sinking and thermal relief should be used to ensure that
the die temperature does not exceed the maximum rating.
Output Filtering
1
RIN = 100Ω
0.1
0.01
0.01
RIN = 1k
0.1
1
RESISTOR TOLERANCE (%)
10
610912 F06
Figure 6. Gain Error vs Resistor Tolerance
Output Current Limitations Due to Power Dissipation
The LT6109 can deliver a continuous current of 1mA to the
OUTA pin. This current flows through RIN and enters the
current sense amplifier via the SENSEHI pin. The power
dissipated in the LT6109 due to the output signal is:
POUT = (VSENSEHI – VOUTA) • IOUTA
Since VSENSEHI ≈ V+, POUTA ≈ (V+ – VOUTA) • IOUTA
The AC output voltage, VOUT, is simply IOUTA • ZOUT. This
makes filtering straightforward. Any circuit may be used
which generates the required ZOUT to get the desired filter
response. For example, a capacitor in parallel with ROUT
will give a lowpass response. This will reduce noise at the
output, and may also be useful as a charge reservoir to
keep the output steady while driving a switching circuit
such as a MUX or ADC. This output capacitor in parallel
with ROUT will create an output pole at:
f –3dB =
1
2 • π •ROUT • CL
SENSELO, SENSEHI Range
The difference between VBATT (see Figure 7) and V+, as
well as the maximum value of VSENSE, must be considered
to ensure that the SENSELO pin doesn’t exceed the range
listed in the Electrical Characteristics table. The SENSELO
and SENSEHI pins of the LT6109 can function from 0.2V
610912fa
14
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
60
ALLOWABLE OPERATING VOLTAGES ON
SENSELO AND SENSEHI INPUTS (V)
above the positive supply to 33V below it. These operating voltages are limited by internal diode clamps shown
in Figures 1 and 2. On supplies less than 35.5V, the lower
range is limited by V– + 2.5V. This allows the monitored
supply, VBATT , to be separate from the LT6109 positive
supply as shown in Figure 7. Figure 8 shows the range of
operating voltages for the SENSELO and SENSEHI inputs,
for different supply voltage inputs (V+). The SENSELO and
SENSEHI range has been designed to allow the LT6109 to
monitor its own supply current (in addition to the load),
as long as VSENSE is less than 200mV. This is shown in
Figure 9.
50
40.2V
40
VALID SENSELO/
SENSEHI RANGE
30
27
20.2V
20
10
2.8V
2.5V
Minimum Output Voltage
The output of the LT6109 current sense amplifier can
produce a non-zero output voltage when the sense voltage
is zero. This is a result of the sense amplifier VOS being
forced across RIN as discussed in the Output Voltage Error, ∆VOUT(VOS) section. Figure 10 shows the effect of the
input offset voltage on the transfer function for parts at
the VOS limits. With a negative offset voltage, zero input
sense voltage produces an output voltage. With a positive
offset voltage, the output voltage is zero until the input
sense voltage exceeds the input offset voltage. Neglecting VOS, the output circuit is not limited by saturation of
pull-down circuitry and can reach 0V.
2.7
10
20
30 35.5 40
V + (V)
60
610912 F08
Figure 8. Allowable SENSELO, SENSEHI Voltage Range
9
V+
LT6109
VBATT
RIN 10 SENSEHI
RSENSE
1 SENSELO
–
+
OUTA 8
5
VOUT
ROUT
V–
ISENSE
Response Time
The LT6109 amplifier is designed to exhibit fast response
to inputs for the purpose of circuit protection or current
monitoring. This response time will be affected by the
external components in two ways, delay and speed.
50
610912 F09
Figure 9. LT6109 Supply Current Monitored with Load
120
G = 100
100
OUTPUT VOLTAGE (mV)
V+
9
V+
LT6109
VBATT
RIN 10 SENSEHI
RSENSE
ISENSE
1 SENSELO
–
+
OUTA 8
V–
5
VOUT
ROUT
610912 F07
80
VOS = –125µV
60
40
VOS = 125µV
20
0
0 100 200 300 400 500 600 700 800 900 1000
INPUT SENSE VOLTAGE (µV)
610912 F10
Figure 7. V+ Powered Separately from Load Supply (VBATT)
Figure 10. Amplifier Output Voltage vs Input Sense Voltage
610912fa
15
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
If the output current is very low and an input transient
occurs, there may be an increased delay before the
output voltage begins to change. The Typical Performance
Characteristics show that this delay is short and it can
be improved by increasing the minimum output current,
either by increasing RSENSE or decreasing RIN. Note that
the Typical Performance Characteristics are labeled with
respect to the initial sense voltage.
The speed is also affected by the external components.
Using a larger ROUT will decrease the response time, since
VOUT = IOUTA • ZOUT where ZOUT is the parallel combination
of ROUT and any parasitic and/or load capacitance. Note
that reducing RIN or increasing ROUT will both have the
effect of increasing the voltage gain of the circuit. If the
output capacitance is limiting the speed of the system, RIN
and ROUT can be decreased together in order to maintain
the desired gain and provide more current to charge the
output capacitance.
The response time of the comparators is the sum of the
propagation delay and the fall time. The propagation
delay is a function of the overdrive voltage on the input
of the comparators. A larger overdrive will result in a
lower propagation delay. This helps achieve a fast system
response time to fault events. The fall time is affected by
the load on the output of the comparator as well as the
pull-up voltage.
The LT6109 amplifier has a typical response time of 500ns
and the comparators have a typical response time of 500ns.
When configured as a system, the amplifier output drives
the comparator input causing a total system response
time which is typically greater than that implied by the
individually specified response times. This is due to the
overdrive on the comparator input being determined by
the speed of the amplifier output.
Internal Reference and Comparators
The integrated precision reference and comparators combined with the high precision current sense allow for rapid
and easy detection of abnormal load currents. This is often
critical in systems that require high levels of safety and
reliability. The LT6109 comparators are optimized for fault
detection and are designed with latching outputs. Latching outputs prevent faults from clearing themselves and
require a separate system or user to reset the outputs. In
applications where the comparator output can intervene
and disconnect loads from the supply, latched outputs are
required to avoid oscillation. Latching outputs are also
useful for detecting problems that are intermittent. The
comparator outputs on the LT6109 are always latching
and there is no way to disable this feature.
Each of the comparators has one input available externally,
with the two versions of the part differing by the polarity
of those available inputs. The other comparator inputs are
connected internally to the 400mV precision reference.
The input threshold (the voltage which causes the output
to transition from high to low) is designed to be equal to
that of the reference. The reference voltage is established
with respect to the device V– connection.
Comparator Inputs
The comparator inputs can swing from V– to 60V regardless
of the supply voltage used. The input current for inputs
well above the threshold is just a few pAs. With decreasing input voltage, a small bias current begins to be drawn
out of the input near the threshold, reaching 50nA max
when at ground potential. Note that this change in input
bias current can cause a small nonlinearity in the OUTA
transfer function if the comparator inputs are coupled to
the amplifier output with a voltage divider. For example, if
the maximum comparator input current is 50nA, and the
resistance seen looking out of the comparator input is 1k,
then a change in output voltage of 50µV will be seen on the
analog output when the comparator input voltage passes
through its threshold. If both comparator inputs are connected to the output then they must both be considered.
Setting Comparator Thresholds
The comparators have an internal precision 400mV reference. In order to set the trip points of the LT6109-1 comparators, the output currents, IOVER and IUNDER, as well
as the maximum output current, IMAX, must be calculated:
IOVER =
IMAX =
VSENSE(OVER)
RIN
, IUNDER =
VSENSE(UNDER)
RIN
,
VSENSE(MAX)
RIN
610912fa
16
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
where IOVER and IUNDER are the over and under currents
through the sense resistor which cause the comparators
to trip. IMAX is the maximum current through the sense
resistor.
R1=
R2 =
Depending on the desired maximum amplifier output voltage (VMAX) the three output resistors, R1, R2 and R3, can
be configured in two ways. If:
 400mV 400mV –IUNDER (R1) 
VMAX > 
+
 IMAX
IUNDER
 IOVER

If:
400mV
IOVER
400mV – IUNDER (R1)
IUNDER
V
–I
(R1+ R2 )
R3 = MAX MAX
IMAX
 400mV 400mV –IUNDER (R1) 
VMAX < 
+
 IMAX
IUNDER
 IOVER

then use the configuration shown in Figure 3. The desired
trip points and full-scale analog output voltage for the
circuit in Figure 3 can then be achieved using the following equations:
then use the configuration shown in Figure 11.
VSUPPLY
+
RIN
VSENSE
–
LT6109-1
1 SENSELO
+
LOAD
V
ISENSE = SENSE
RSENSE
VPULLUP
RC
–
V–
V+
2 EN/RST
C1
OUTA 8
V+
3 OUTC2
CLC
IOUTA
CL
INC2 7
400mV
REFERENCE
V+
V–
R2
–
5
VOUT
+
4 OUTC1
CLC
R3
V–
RC
OVERCURRENT
FLAG
9
V+
–
UNDERCURRENT
FLAG
VRESET
SENSEHI 10
+
RSENSE
V–
INC1 6
R1
610912 F11
Figure 11. Typical Configuration with Alternative ROUT Configuration
610912fa
17
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
The desired trip points and full-scale analog output voltage
for the circuit in Figure 13 can be achieved as follows:
R1=
R2 =
R3 =
OUTC1
(LT6109-1/LT6109-2)
OUTC2
(LT6109-2)
400mV
OUTC2
(LT6109-1)
IOVER
INCREASING
VINC1,2
VHYS VHYS
VMAX – IMAX (R1)
610912 F12
VTH
IMAX
400mV – IUNDER (R1+ R2 )
Figure 12. Comparator Output Transfer Characteristics
IUNDER
ing input thresholds, VTH (the actual internal threshold
remains unaffected).
Trip points for the LT6109-2 can be set by replacing IUNDER
with a second overcurrent, IOVER2.
Figure 13 shows how to add additional hysteresis to a
noninverting comparator.
Hysteresis
R6 can be calculated from the extra hysteresis being added,
VHYS(EXTRA) and the amplifier output current which you
want to cause the comparator output to trip, IUNDER. Note
that the hysteresis being added, VHYS(EXTRA), is in addition
to the typical 10mV of built-in hysteresis.
Each comparator has a typical built-in hysteresis of 10mV
to simplify design, ensure stable operation in the presence of noise at the inputs, and to reject supply noise that
might be induced by state change load transients. The
hysteresis is designed such that the threshold voltage is
altered when the output is transitioning from low to high
as is shown in Figure 12.
R6 =
External positive feedback circuitry can be employed
to increase the effective hysteresis if desired, but such
circuitry will have an effect on both the rising and fall-
V+
400mV – VHYS(EXTRA)
IUNDER
R1 should be chosen such that R1 >> R6 so that VOUTA
does not change significantly when the comparator trips.
9
V+
LT6109-1
V+
10 SENSEHI
–
1 SENSELO
+
RSENSE
ILOAD
V–
V+
R3
OUTA 8
V+
R5
INC2 7
+
RIN
3 OUTC2
R1 VTH
R6
400mV
REFERENCE
–
V–
R2
5
610912 F13
Figure 13. Noninverting Comparator with Added Hysteresis
18
610912fa
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
R3 should be chosen to allow sufficient VOL and comparator output rise time due to capacitive loading.
R2 can be calculated:
R2 =
(
)(
R1• V + – 400mV – VHYS(EXTRA) •R3
In the previous example, this is an error of 4.3mV at the
output of the amplifier or 43µV at the input of the amplifier
assuming a gain of 100.
When using the comparators with their inputs decoupled
from the output of the amplifier, they may be driven directly
by a voltage source. It is useful to know the threshold
voltage equations with the additional hysteresis. The input
falling edge threshold which causes the output to transition
from high to low is:
)
VHYS(EXTRA)
For very large values of R2 PCB related leakage may
become an issue. A tee network can be implemented to
reduce the required resistor values.
1   V + •R1 
 1
VTH(F) = 400mV •R1•  +
–
 R1 R2 +R3   R2 +R3 
The approximate total hysteresis will be:
 V + – 400mV 
VHYS = 10mV +R1• 

 R2 +R3 
The input rising edge threshold which causes the output
to transition from low to high is:
For example, to achieve IUNDER = 100µA with 50mV of
total hysteresis, R6 = 3.57k. Choosing R1 = 35.7k, R3 =
10k and V+ = 5V results in R2 = 4.12M.
 1 1
VTH(R) = 410mV •R1•  + 
 R1 R2 
Figure 14 shows how to add additional hysteresis to an
inverting comparator.
The analog output voltage will also be affected when the
comparator trips due to the current injected into R6 by
the positive feedback. Because of this, it is desirable to
have (R1 + R2 + R3) >> R6. The maximum VOUTA error
caused by this can be calculated as:
R7 can be calculated from the amplifier output current which
is required to cause the comparator output to trip, IOVER.
R7 =
R6


∆VOUTA = V • 
 R1+R2 +R3 +R6 
+
V+
400mV
, Assuming (R1+R2) >> R7
IOVER
9
V+
LT6109-1
V+
10 SENSEHI
–
1 SENSELO
+
RSENSE
ILOAD
V–
V+
V+
R6
INC1 6
4 OUTC1
R1 VTH
R7
400mV
REFERENCE
+
R3
OUTA 8
–
RIN
V–
VDD
5
R2
610912 F14
Figure 14. Inverting Comparator with Added Hysteresis
610912fa
19
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
To ensure (R1 + R2) >> R7, R1 should be chosen such
that R1 >> R7 so that VOUTA does not change significantly
when the comparator trips.
R3 should be chosen to allow sufficient VOL and comparator output rise time due to capacitive loading.
R2 can be calculated:
 V – 390mV 
R2 = R1•  DD

 VHYS(EXTRA) 
Note that the hysteresis being added, VHYS(EXTRA), is in
addition to the typical 10mV of built-in hysteresis. For very
large values of R2 PCB related leakage may become an
issue. A tee network can be implemented to reduce the
required resistor values.
The approximate total hysteresis is:
 V – 390mV 
VHYS = 10mV +R1•  DD


R2
For example, to achieve IOVER = 900µA with 50mV of total
hysteresis, R7 = 442Ω. Choosing R1 = 4.42k, R3 = 10k
and VDD = 5V results in R2 = 513k.
The analog output voltage will also be affected when the
comparator trips due to the current injected into R7 by
the positive feedback. Because of this, it is desirable to
have (R1 + R2) >> R7. The maximum VOUTA error caused
by this can be calculated as:
R7


∆VOUTA = VDD • 
 R1+R2+R7 
In the previous example, this is an error of 4.3mV at the
output of the amplifier or 43µV at the input of the amplifier
assuming a gain of 100.
When using the comparators with their inputs decoupled
from the output of the amplifier they may be driven directly
by a voltage source. It is useful to know the threshold
voltage equations with additional hysteresis. The input
rising edge threshold which causes the output to transition from high to low is:
 R1
VTH(R) = 400mV •  1+ 
 R2 
The input falling edge threshold which causes the output
to transition from low to high is:
 R1
 R1
VTH(F) = 390mV •  1+  – VDD  
 R2 
 R2 
Comparator Outputs
The comparator outputs can maintain a logic low level of
150mV while sinking 500µA. The outputs can sink higher
currents at elevated VOL levels as shown in the Typical
Performance Characteristics. Load currents are conducted
to the V– pin. The output off-state voltage may range
between 0V and 60V with respect to V–, regardless of the
supply voltage used. As with any open-drain device, the
outputs may be tied together to implement wire-OR logic
functions. The LT6109-1 can be used as a single-output
window comparator in this way.
EN/RST Pin
The EN/RST pin performs the two functions of resetting
the latch on the comparators as well as shutting down the
LT6109. After powering on the LT6109, the comparators
must be reset in order to guarantee a valid state at their
outputs.
Applying a pulse to the EN/RST pin will reset the comparators from their tripped state as long as the input on the
comparator is below the threshold and hysteresis for an
inverting comparator or above the threshold and hysteresis
for a noninverting comparator. For example, if VINC1 is
pulled higher than 400mV and latches the comparator, a
reset pulse will not reset that comparator unless its input
is held below the threshold by a voltage greater than the
10mV typical hysteresis. The comparator outputs typically
unlatch in 0.5µs with 2pF of capacitive load. Increased
capacitive loading will cause increased unlatch time.
Figure 15 shows the reset functionality of the EN/RST
pin. The width of the pulse applied to reset the comparators must be greater than tRPW(MIN) (2µs) but less than
tRPW(MAX) (15µs). Applying a pulse that is longer than
40µs typically (or tying the pin low) will cause the part
to enter shutdown. Once the part has entered shutdown,
the supply current will be reduced to 3µA typically and the
amplifier, comparators and reference will cease to function
610912fa
20
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
until the EN/RST pin is transitioned high. When the part
is disabled, both the amplifier and comparator outputs
are high impedance.
on VOUTA. Circuitry connected to OUTA can be protected
from these transients by using an external diode to clamp
VOUTA or a capacitor to filter VOUTA.
When the EN/RST pin is transitioned from low to high
to enable the part, the amplifier output PMOS can turn
on momentarily causing typically 1mA of current to flow
into the SENSEHI pin and out of the OUTA pin. Once the
amplifier is fully on, the output will go to the correct current. Figure 16 shows this behavior and the impact it has
Power Up
RESET PULSE WIDTH LIMITS
EN/RST
tRPW(MIN)
2µs
COMPARATOR
RESET
Reverse-Supply Protection
tRPW(MAX)
15µs
OUTC1
OUTC2
610912 F15
tRESET
0.5µs (TYPICAL)
Figure 15. Comparator Reset Functionality
V+ = 60V
RIN = 100Ω
ROUT = 10k
VEN/RST
2V/DIV
0V
VOUTA
2V/DIV
0V
50µs/DIV
610912 F14
Figure 16. Amplifier Enable Response
After powering on the LT6109, the comparators must be
reset in order to guarantee a valid state at their outputs.
Fast supply ramps may cause a supply current transient
during start-up as shown in the Typical Performance
Characteristics. This current can be lowered by reducing
the edge speed of the supply.
The LT6109 is not protected internally from external reversal of supply polarity. To prevent damage that may occur
during this condition, a Schottky diode should be added
in series with V— (Figure 17). This will limit the reverse
current through the LT6109. Note that this diode will limit
the low voltage operation of the LT6109 by effectively
reducing the supply voltage to the part by VD.
Also note that the comparator reference, comparator output
and EN/RST input are referenced to the V– pin. In order to
preserve the precision of the reference and to avoid driving
the comparator inputs below V–, R2 must connect to the
V– pin. This will shift the amplifier output voltage up by
VD. VOUTA can be accurately measured differentially across
R1 and R2. The comparator output low voltage will also be
shifted up by VD. The EN/RST pin threshold is referenced
to the V– pin. In order to provide valid input levels to the
LT6109 and avoid driving EN/RST below V– the negative
supply of the driving circuit should be tied to V–.
610912fa
21
LT6109-1/LT6109-2
APPLICATIONS INFORMATION
V+
9
V+
LT6109-1
V+
RIN
10 SENSEHI
–
1 SENSELO
+
RSENSE
VDD
OUTA 8
R3
+
V+
V–
R1
4 OUTC
INC 6
–
VDD
ILOAD
VOUTA
R2
400mV
REFERENCE
+
VDD
2
EN/RST
–
V–
5
+
610912 F17
VD
–
Figure 17. Schottky Prevents Damage During Supply Reversal
TYPICAL APPLICATIONS
Overcurrent and Undervoltage Battery Fault Protection
12 LITHIUM
40V CELL STACK
IRF9640
0.1Ω
+
10µF
+
+
1M
0.1µF
100k
R10
100Ω
INC2
10
13.3k
9
5V
+
10k
SENSEHI SENSELO
V+
OUTA
LT6109-1
RESET
2
4
3
EN/RST
INC1
OUTC1
OUTC2
V–
5
INC2
TO
LOAD
6.2V*
1
8
0.8A
OVERCURRENT
6 DETECTION
7
VOUT
9.53k
100k
475Ω
2N7000
30V
UNDERVOLTAGE
DETECTION
6109 TA02
*CMH25234B
The comparators monitor for overcurrent and undervoltage conditions. If either fault condition is detected the
battery will immediately be disconnected from the load.
The latching comparator outputs ensure the battery stays
disconnected from the load until an outside source resets
the LT6109 comparator outputs.
610912fa
22
LT6109-1/LT6109-2
TYPICAL APPLICATIONS
MCU Interfacing with Hardware Interupts
0.1Ω
V+
Example:
TO LOAD
5V
100Ω
10
9
AtMega1280
5
PB0
6
PB1
7
PCINT2
2
PCINT3
3
ADC2
1
PB5
SENSEHI SENSELO
V+
5V
8
LT6109-1
10k
RESET 2
3
4
5V
VOUT/ADC IN
OUTA
EN/RST
INC2
OUTC2
OUTC1
10k
V–
INC1
7
6
5
OUTC2 GOES LOW
0V
1
VOUT
ADC IN
MCU INTERUPT
2k
6.65k
UNDERCURRENT ROUTINE
1.33k
RESET COMPARATORS
6109 TA03
The comparators are set to have a 50mA undercurrent
threshold and a 300mA overcurrent threshold. The MCU
610912 TA03b
will receive the comparator outputs as hardware interrupts
and immediately run an appropriate fault routine.
Simplified DC Motor Torque Control
VMOTOR
100µF
1k
SENSEHI SENSELO
V+
OUTA
LT6109
RESET
EN/RST
CURRENT SET POINT (0V TO 5V)
VOUT
0.47µF
100k
5.62k
1µF
5V
INC2
3.4k
OUTC2
OUTC1
0.1Ω
V–
INC1
2
3
1k
–
+
4
7
6
1
LTC6246
78.7k
BRUSHED
DC MOTOR
(0A TO 5A)
MABUCHI
RS-540SH
5
V+
6
MOD OUT
LTC6992-1
3
1N5818
SET DIV
GND
2
4
IRF640
100k
1M
280k
5V
610912 TA04
The figure shows a simplified DC motor control circuit.
The circuit controls motor current, which is proportional
to motor torque; the LT6109 is used to provide current
feedback to a difference amplifier that controls the current
in the motor. The LTC®6992 is used to convert the output
of the difference amp to the motors PWM control signal.
610912fa
23
LT6109-1/LT6109-2
TYPICAL APPLICATIONS
Power-On Reset or Disconnect Using a TimerBlox® Circuit
5V
9
V+
LT6109-1
RIN
100Ω 10
RSENSE
1
SENSEHI
–
SENSELO
+
ILOAD
R5
10k
V+
OUTA 8
–
V
V+
3
R1
8.06k
INC2 7
+
OUTC2
–
5V
R8
30k
Q1
2N2222
OPTIONAL:
DISCHARGES C1
WHEN SUPPLY
IS DISCONNECTED
V–
R4
10k
CREATES A DELAYED
C1 10µs RESET PULSE
0.1µF ON START-UP
R7
1M
TRIG
OUT
LTC6993-3
GND
V+
SET
400mV
REFERENCE
V+
4
OUTC1
2
EN/RST
R2
1.5k
+
–
INC1 6
R3
499Ω
V–
5
610912 TA06
DIV
R6
487k
The LTC6993-1 provides a 10µS reset pulse to the LT6109‑1.
The reset pulse is delayed by R7 and C1 whose time constant
must be greater than 10ms and longer than the supply
turn-on time. Optional components R8 and Q1 discharge
capacitor C1 when the supply and/or ground are disconnected. This ensures that when the power supply and/or
ground are restored, capacitor C1 can fully recharge and
trigger the LTC6993-3 to produce another comparator reset
pulse. These optional components are particularly useful
if the power and/or ground connections are intermittent,
as can occur when PCB are plugged into a connector.
610912fa
24
LT6109-1/LT6109-2
TYPICAL APPLICATIONS
Precision Power-On Reset Using a TimerBlox® Circuit
5V
9
V+
LT6109-1
RIN
100Ω 10
RSENSE
1
SENSEHI
–
SENSELO
+
ILOAD
R5
10k
V+
OUTA
8
V–
V+
3
R1
8.06k
INC2
+
OUTC2
7
–
V–
R4
10k
R8
100k
C1
0.1µF
1 SECOND DELAY
ON START-UP
10µs RESET PULSE
GENERATOR
TRIG
OUT
LTC6994-1
GND
V+
TRIG
OUT
LTC6993-1
GND
V+
SET
R7
191k
DIV
R6
1M
R5
681k
SET
DIV
C2
0.1µF
400mV
REFERENCE
V+
4
OUTC1
2
EN/RST
R2
1.5k
+
–
INC1
6
R3
499Ω
V–
5
610912 TA07
R4
487k
610912fa
25
LT6109-1/LT6109-2
PACKAGE DESCRIPTION
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661 Rev E)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.50
0.305 ± 0.038
(.0197)
(.0120 ± .0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
10 9 8 7 6
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0.497 ± 0.076
(.0196 ± .003)
REF
0° – 6° TYP
GAUGE PLANE
1 2 3 4 5
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.86
(.034)
REF
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MS) 0307 REV E
610912fa
26
LT6109-1/LT6109-2
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
12/12
Addition of A-grade Performance and Electrical Characteristics
1, 3, 4, 11, 13, 15 (Fig10), 28
Correction to Typical Application diagram
1
Addition of A-grade Order Information
2
Clarification to Absolute Maximum Short Circuit Duration
2
Edits to Electrical Characteristics conditions and notes
3, 4
Clarification to nomenclature used in Typical Performance Characteristics
5-8
Clarification to Description of Pin Functions
Internal Reference Block redrawn for consistency
Edits to Applications Information
Addition of LT6108 to Related Parts
8, 9
9, 10, 12, 17, 18, 19, 25, 26
10-16, 18, 20-25
28
610912fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LT6109-1/LT6109-2
TYPICAL APPLICATION
ADC Driving Application
IN
SENSE
HIGH
SENSE
LOW
0.1Ω
0.1µF
OUT
VCC
VREF
100Ω
10
9
SENSEHI SENSELO
V+
VCC
VCC
10k
OUTA
8
LT6109-1
RESET 2
3
10k
4
EN/RST
INC2
OUTC2
OUTC1
V–
INC1
COMP
1
7
6
5
IN+
2k
LTC2470
TO
MCU
0.1µF
6.65k
1.33k
OVERCURRENT
6109 TA05
UNDERCURRENT
The low sampling current of the LTC2470 16-bit delta
sigma ADC is ideal for the LT6109.
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1787
Bidirectional High Side Current Sense Amplifier
2.7V to 60V, 75µV Offset, 60µA Quiescent, 8V/V Gain
LTC4150
Coulomb Counter/Battery Gas Gauge
Indicates Charge Quantity and Polarity
LT6100
Gain-Selectable High Side Current Sense Amplifier
4.1V to 48V, Gain Settings: 10, 12.5, 20, 25, 40, 50V/V
LTC6101
High Voltage High Side Current Sense Amplifier
Up to 100V, Resistor Set Gain, 300µV Offset, SOT-23
LTC6102
Zero Drift High Side Current Sense Amplifier
Up to 100V, Resistor Set Gain, 10µV Offset, MSOP8/DFN
LTC6103
Dual High Side Current Sense Amplifier
4V to 60V, Resistor Set Gain, 2 Independent Amps, MSOP8
LTC6104
Bidirectional High Side Current Sense Amplifier
4V to 60V, Separate Gain Control for Each Direction, MSOP8
LT6105
Precision Rail-to-Rail Input Current Sense Amplifer
–0.3V to 44V Input Range, 300µV Offset, 1% Gain Error
LT6106
Low Cost High Side Current Sense Amplifier
2.7V to 36V, 250µV Offset, Resistor Set Gain, SOT-23
LT6107
High Temperature High Side Current Sense Amplifier
2.7V to 36V, –55°C to 150°C, Fully Tested: –55°C, 25°C, 150°C
LT6108
High Side Current Sense Amplifier with Reference and
Comparator
2.7V to 60V, 125µV Offset, Resistor Set Gain, ±1.25% Threshold
Error
LT6700
Dual Comparator with 400mV Reference
1.4V to 18V, 6.5µA Supply Current
610912fa
28 Linear Technology Corporation
LT 1212 REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
 LINEAR TECHNOLOGY CORPORATION 2011
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