AD ADM6321CY50ARJR7 Supervisory circuits with watchdog and manual reset in 5-lead sot-23 Datasheet

Supervisory Circuits with Watchdog
and Manual Reset in 5-Lead SOT-23
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
26 reset threshold options
2.5 V to 5 V in 100 mV increments
4 reset timeout options
1 ms, 20 ms, 140 ms, and 1120 ms (minimum)
4 watchdog timeout options
6.3 ms, 102 ms, 1600 ms, and 25.6 sec (typical)
Manual reset input
Reset output stages
Push-pull active low
Open-drain active low
Push-pull active high
Low power consumption: 5 µA
Guaranteed reset output valid to VCC = 1 V
Power supply glitch immunity
Specified over industrial temperature range
5-lead SOT-23 package
ADM6316
VCC
VCC
RESET
GENERATOR
VREF
MR
RESET
DEBOUNCE
GND
04533-001
WATCHDOG
DETECTOR
WDI
Figure 1.
ADM6320
VCC
APPLICATIONS
RESET
GENERATOR
VREF
Microprocessor systems
Computers
Controllers
Intelligent instruments
Portable equipment
MR
RESET
DEBOUNCE
WATCHDOG
DETECTOR
GND
04533-028
Data Sheet
WDI
Figure 2.
GENERAL DESCRIPTION
The ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/
ADM6321/ADM6322 are supervisory circuits that monitor
power supply voltage levels and code execution integrity in
microprocessor-based systems. As well as providing poweron reset signals, an on-chip watchdog timer can reset the
microprocessor if it fails to strobe within a preset timeout
period. A reset signal can also be asserted by an external push
button through a manual reset input. The seven parts feature
different combinations of watchdog input, manual reset input,
and output stage configuration, as shown in Table 1.
Each part is available in a choice of 26 reset threshold options
ranging from 2.5 V to 5 V in 100 mV increments. There are also
four reset timeout options of 1 ms, 20 ms, 140 ms, and 1120 ms
(minimum) and four watchdog timeout options of 6.3 ms, 102 ms,
1600 ms, and 25.6 sec (typical).
The ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/
ADM6321/ADM6322 are available in 5-lead SOT-23 packages
and typically consume only 3 µA, making them suitable for use
in low power portable applications.
Table 1. Selection Table
Output Stage
Part No.
ADM6316
ADM6317
ADM6318
ADM6319
ADM6320
ADM6321
ADM6322
Rev. F
Watchdog
Yes
Yes
Yes
No
Yes
Yes
No
Manual Reset
Yes
Yes
No
Yes
Yes
No
Yes
RESET
Push-pull
No
Push-pull
Push-pull
Open-drain
Open-drain
Open-drain
RESET
No
Push-pull
Push-pull
Push-pull
No
Push-pull
Push-pull
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ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Open-Drain RESET Output ........................................................9
Applications ....................................................................................... 1
Manual Reset Input .......................................................................9
Functional Block Diagrams ............................................................. 1
Watchdog Input .............................................................................9
General Description ......................................................................... 1
Applications Information .............................................................. 10
Revision History ............................................................................... 2
Watchdog Input Current ........................................................... 10
Specifications..................................................................................... 3
Negative-Going VCC Transients ................................................ 10
Absolute Maximum Ratings ............................................................ 5
Ensuring Reset Valid to VCC = 0 V ........................................... 10
ESD Caution .................................................................................. 5
Watchdog Software Considerations ......................................... 10
Pin Configurations and Function Descriptions ........................... 6
Options ............................................................................................ 11
Typical Performance Characteristics ............................................. 7
Outline Dimensions ....................................................................... 13
Circuit Description ........................................................................... 9
Ordering Guide .......................................................................... 13
Reset Output ................................................................................. 9
REVISION HISTORY
5/13—Rev. E to Rev. F
Changes to Table 8 .......................................................................... 12
Changes to Ordering Guide .......................................................... 13
10/10—Rev. D to Rev. E
Changes to Table 8 .......................................................................... 12
Updated Outline Dimensions ....................................................... 13
8/08—Rev. C to Rev. D
Change to Figure 18 ......................................................................... 9
4/07—Rev. B to Rev. C
Added Figure 2.................................................................................. 1
Changes to Figure 23 ...................................................................... 13
Changes to Ordering Guide .......................................................... 13
1/07—Rev. A to Rev. B
Changes to Functional Block Diagram .......................................... 1
Changes to Figure 18 ...................................................................... 10
5/06—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Changes to Functional Block Diagram .......................................... 1
Changes to Table 8 .......................................................................... 12
Changes to Figure 22 ...................................................................... 13
Changes to Ordering Guide .......................................................... 13
10/04—Revision 0: Initial Version
Rev. F | Page 2 of 16
Data Sheet
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
SPECIFICATIONS
VCC = full operating range, TA = TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
SUPPLY
VCC Operating Voltage Range
Supply Current
Min
RESET THRESHOLD VOLTAGE
VTH − 1.5%
VTH − 2.5%
RESET THRESHOLD TEMPERATURE
COEFFICIENT
RESET THRESHOLD HYSTERESIS
RESET TIMEOUT PERIOD
ADM63xxA
ADM63xxB
ADM63xxC
ADM63xxD
VCC TO RESET DELAY
PUSH-PULL OUTPUT (ADM6316, ADM6317,
ADM6318, ADM6319, ADM6321, ADM6322)
RESET Output Voltage
Typ
1
10
5
VTH
VTH
40
Max
Unit
Test Conditions/Comments
5.5
20
12
VTH + 1.5%
VTH + 2.5%
V
µA
µA
V
V
ppm/°C
VCC = 5.5 V
VCC = 3.6 V
TA = 25°C
TA = −40°C to +85°C
3
1
20
140
1120
1.4
28
200
1600
40
mV
2
40
280
2240
5
RESET Output Voltage
0.3
V
VCC ≥ 1.0 V, ISINK = 50 µA
V
0.3
0.4
V
V
V
V
ns
VCC ≥ 1.2 V, ISINK = 100 µA
VCC ≥ 2.7 V, ISINK = 1.2 mA
VCC ≥ 4.5 V, ISINK = 3.2 mA
VCC ≥ 2.7 V, ISOURCE = 500 µA
VCC ≥ 4.5 V, ISOURCE = 800 µA
From 10% to 90% VCC, CL = 5 pF,
VCC = 3.3 V
VCC ≥ 2.7 V, ISINK = 1.2 mA
VCC ≥ 4.5 V, ISINK = 3.2 mA
VCC ≥ 1.8 V, ISOURCE = 150 µA
VCC ≥ 2.7 V, ISOURCE = 500 µA
VCC ≥ 4.5 V, ISOURCE = 800 µA
25
0.3
0.4
V
V
V
V
V
0.3
0.3
0.3
0.4
1
V
V
V
V
µA
9.3
153
2.4
38.4
ms
ms
sec
sec
ns
V
µA
µA
0.8 × VCC
0.8 × VCC
VCC − 1.5
OPEN-DRAIN OUTPUT (ADM6320, ADM6321,
ADM6322)
RESET Output Voltage
Open-Drain Reset Output Leakage Current
WATCHDOG INPUT (ADM6316, ADM6317,
ADM6318, ADM6320, ADM6321)
Watchdog Timeout Period
ADM63xxxW
ADM63xxxX
ADM63xxxY
ADM63xxxZ
WDI Pulse Width
WDI Input Threshold
WDI Input Current
4.3
71
1.12
17.9
50
0.3 × VCC
−20
6.3
102
1.6
25.6
120
−15
VCC falling at 1 mV/µs
0.3
0.8 × VCC
VCC − 1.5
RESET Rise Time
ms
ms
ms
ms
µs
0.7 × VCC
160
Rev. F | Page 3 of 16
VCC ≥ 1.0 V, ISINK = 50 µA
VCC ≥ 1.2 V, ISINK = 100 µA
VCC ≥ 2.7 V, ISINK = 1.2 mA
VCC ≥ 4.5 V, ISINK = 3.2 mA
VIL = 0.3 × VCC, VIH = 0.7 × VCC
VWDI = VCC, time average
VWDI = 0, time average
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
Parameter
MANUAL RESET INPUT (ADM6316, ADM6317,
ADM6319, ADM6320, ADM6322)
MR Input Threshold
MR Input Pulse Width
MR Glitch Rejection
MR Pull-Up Resistance
MR to Reset Delay
Min
Typ
0.8
0.3 × VCC
1
35
100
52
230
Data Sheet
Max
Unit
Test Conditions/Comments
2.0
0.7 × VCC
V
V
µs
ns
kΩ
ns
VTH > 4.0 V
VTH < 4.0 V
75
Rev. F | Page 4 of 16
VCC = 5 V
Data Sheet
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
VCC
RESET (ADM6320, ADM6321, ADM6322)
All Other Pins
Output Current (RESET, RESET)
Operating Temperature Range
Storage Temperature Range
θJA Thermal Impedance, SOT-23
Lead Temperature
Soldering (10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
Rating
−0.3 V to +6 V
−0.3 V to +6 V
−0.3 V to (VCC + 0.3 V)
20 mA
−40°C to +85°C
−65°C to +125°C
270°C/W
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
300°C
215°C
220°C
Rev. F | Page 5 of 16
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
4
WDI
RESET 1
5
RESET 1
VCC
TOP VIEW
(Not to Scale)
GND 2
4
WDI
04533-003
MR 3
4
WDI
Figure 5. ADM6318/ADM6321 Pin Configuration
ADM6317
GND 2
VCC
TOP VIEW
(Not to Scale)
RESET 3
Figure 3. ADM6316/ADM6320 Pin Configuration
5
ADM6318/
ADM6321
04533-004
GND 2
TOP VIEW
(Not to Scale)
MR 3
RESET 1
VCC
RESET 3
Figure 4. ADM6317 Pin Configuration
5
VCC
4
MR
ADM6319/
ADM6322
TOP VIEW
(Not to Scale)
04533-005
GND 2
5
ADM6316/
ADM6320
04533-002
RESET 1
Figure 6. ADM6319/ADM6322 Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
1
2
3
4
5
Mnemonic
RESET (ADM6316/ADM6318/ADM6319/
ADM6320/ADM6321/ADM6322)
RESET (ADM6317)
GND (all models)
MR (ADM6316/ADM6317/ADM6320)
RESET (ADM6318/ADM6319/ADM6321/ADM6322)
WDI (ADM6316/ADM6317/ADM6318/
ADM6320/ADM6321)
MR (ADM6319/ADM6322)
VCC (all models)
Description
Active-Low Reset Output. Asserted whenever VCC is below the reset
threshold, VTH.
Push-Pull Output Stage for the ADM6316/ADM6318/ADM6319.
Open-Drain Output Stage for the ADM6320/ADM6321/ADM6322.
Active-High Push-Pull Reset Output.
Ground.
Manual Reset Input. This is an active-low input that when forced low for at
least 1 µs, generates a reset. It features a 52 kΩ internal pull-up.
Active-High Push-Pull Reset Output.
Watchdog Input. Generates a reset if the logic level on the pin remains low
or high for the duration of the watchdog timeout. The timer is cleared if a
logic transition occurs on this pin or if a reset is generated. Leave this pin
floating to disable the watchdog timer.
Manual Reset Input.
Power Supply Voltage Being Monitored.
Rev. F | Page 6 of 16
Data Sheet
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
TYPICAL PERFORMANCE CHARACTERISTICS
10.0
100
9.5
90
9.0
80
VCC = 5V
7.0
6.5
6.0
VCC = 3V
5.5
5.0
4.5
VCC = 1.5V
–20
0
80
60
40
20
TEMPERATURE (°C)
40
30
20
–20
0
20
40
TEMPERATURE (°C)
60
80
Figure 10. VCC Falling to Reset Propagation Delay vs. Temperature
80
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
0
0.5
1.0
1.5
2.0
2.5 3.0
VCC (V)
3.5
4.0
4.5
5.0
5.5
280
260
240
220
200
180
160
140
120
100
–40
–20
0
20
40
TEMPERATURE (°C)
60
80
Figure 11. Manual Reset to Reset Propagation Delay vs. Temperature
(ADM6316/ADM6317/ADM6319/ADM6320/ADM6322)
Figure 8. Supply Current vs. Supply Voltage
1.20
1.05
1.04
1.15
NORMALIZED RESET TIMEOUT
1.03
1.02
1.01
1.00
0.99
0.98
0.97
1.10
1.05
1.00
0.95
0.90
0.85
0.96
–20
0
20
40
TEMPERATURE (°C)
60
80
0.80
–40
04533-008
0.95
–40
320
300
04533-010
MANUAL RESET TO RESET DELAY (ns)
340
04533-007
ICC (µA)
50
0
–40
Figure 7. Supply Current vs. Temperature
(ADM6316/ADM6317/ADM6318/ADM6320/ADM6321)
NORMALIZED RESET THRESHOLD
60
10
04533-006
4.0
3.5
–40
70
–20
0
20
40
TEMPERATURE (°C)
60
80
Figure 12. Normalized Reset Timeout Period vs. Temperature
Figure 9. Normalized Reset Threshold vs. Temperature
Rev. F | Page 7 of 16
04533-011
ICC (µA)
7.5
04533-009
8.0
VCC TO RESET DELAY (µs)
8.5
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
1.20
Data Sheet
190
MR MINIMUM PULSE WIDTH (ns)
1.10
1.05
1.00
0.95
160
150
140
130
120
–20
0
20
40
TEMPERATURE (°C)
80
60
100
–50
Figure 13. Normalized Watchdog Timeout Period vs. Temperature
(ADM6316/ADM6317/ADM6318/ADM6320/ADM6321)
160
50
Figure 15. Manual Reset Minimum Pulse Width vs. Temperature
(ADM6316/ADM6317/ADM6319/ADM6320/ADM6322)
3.8
RESET OCCURS ABOVE CURVE
3.6
140
MINIMUM PULSE WIDTH (ns)
120
100
VTH = 4.63V
80
60
40
20
NEGATIVE PULSE
3.2
3.0
2.8
2.6
2.4
POSITIVE PULSE
2.0
–40
Figure 14. Maximum VCC Transient Duration vs. Reset
Threshold Overdrive
10
TEMPERATURE (°C)
60
04533-015
1000
04533-013
100
OVERDRIVE VOLTAGE (mV)
3.4
2.2
VTH = 2.93V
0
10
0
TEMPERATURE (°C)
04533-014
0.90
–40
MAXIMUM TRANSIENT DURATION (µs)
170
110
04533-012
NORMALIZED WATCHDOG TIMEOUT
180
1.15
Figure 16. Watchdog Input Minimum Pulse Width vs. Temperature
(ADM6316/ADM6317/ADM6318/ADM6320/ADM6321)
Rev. F | Page 8 of 16
Data Sheet
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
CIRCUIT DESCRIPTION
RESET OUTPUT
The ADM6316 features an active-low push-pull reset output,
while the ADM6317/ADM6321/ADM6322 have active-high
push-pull reset outputs. The ADM6318/ADM6319 feature dual
active-low and active-high push-pull reset outputs. For activelow and active-high outputs, the reset signal is guaranteed to be
logic low and logic high, respectively, for VCC down to 1 V.
The reset output is asserted when VCC is below the reset threshold (VTH), when MR is driven low, or when WDI is not serviced
within the watchdog timeout period (tWD). Reset remains asserted
for the duration of the reset active timeout period (tRP) after VCC
rises above the reset threshold, after MR transitions from low to
high, or after the watchdog timer times out. Figure 17 illustrates
the behavior of the reset outputs.
VCC
VCC
VTH
VTH
MANUAL RESET INPUT
The ADM6316/ADM6317/ADM6319/ADM6320/ADM6322
feature a manual reset input (MR), which when driven low, asserts
the reset output. When MR transitions from low to high, reset
remains asserted for the duration of the reset active timeout
period before deasserting. The MR input has a 52 kΩ, internal
pull-up so that the input is always high when unconnected. An
external push-button switch can be connected between MR and
ground so that the user can generate a reset. Debounce circuitry
for this purpose is integrated on chip. Noise immunity is provided
on the MR input, and fast, negative-going transients of up to
100 ns (typical) are ignored. A 0.1 μF capacitor between MR and
ground provides additional noise immunity.
WATCHDOG INPUT
The ADM6316/ADM6317/ADM6318/ADM6320/ADM6321
feature a watchdog timer that monitors microprocessor activity.
A timer circuit is cleared with every low-to-high or high-to-low
logic transition on the watchdog input pin (WDI), which detects
pulses as short as 50 ns. If the timer counts through the preset
watchdog timeout period (tWD), reset is asserted. The microprocessor is required to toggle the WDI pin to avoid being reset.
Failure of the microprocessor to toggle WDI within the timeout
period, therefore, indicates a code execution error, and the reset
pulse generated restarts the microprocessor in a known state.
As well as logic transitions on WDI, the watchdog timer is also
cleared by a reset assertion due to an undervoltage condition on
VCC or due to MR being pulled low. When reset is asserted, the
watchdog timer is cleared and does not begin counting again
until reset deassserts. The watchdog timer can be disabled by
leaving WDI floating or by three-stating the WDI driver.
1V
0V
VCC
VCC
RESET
tRP
tRD
0V
RESET
1V
0V
tRP
tRD
04533-019
RESET
VCC
VCC
VTH
1V
0V
VCC
tRP
tWD
WDI
VCC
0V
Figure 17. Reset Timing Diagram
Figure 18. Watchdog Timing Diagram
OPEN-DRAIN RESET OUTPUT
The ADM6320/ADM6321/ADM6322 have an active-low, opendrain reset output. This output structure requires an external
pull-up resistor to connect the reset output to a voltage rail no
higher than 6 V. The resistor should comply with the microprocessor’s logic low and logic high voltage level requirements
while supplying input current and leakage paths on the RESET
line. A 10 kΩ resistor is adequate in most situations.
Rev. F | Page 9 of 16
tRP
0V
04533-022
The ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/
ADM6321/ADM6322 provide microprocessor supply voltage
supervision by controlling the microprocessor’s reset input. Code
execution errors are avoided during power-up, power-down,
and brownout conditions by asserting a reset signal when the
supply voltage is below a preset threshold and by allowing
supply voltage stabilization with a fixed timeout reset pulse
after the supply voltage rises above the threshold. In addition,
problems with microprocessor code execution can be monitored
and corrected with a watchdog timer (ADM6316/ADM6317/
ADM6318/ADM6320/ADM6321). If the user detects a problem
with the system’s operation, a manual reset input is available
(ADM6316/ADM6317/ADM6319/ADM6320/ADM6322) to
reset the microprocessor, for example, by means of an external
push button.
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
Data Sheet
APPLICATIONS INFORMATION
WATCHDOG INPUT CURRENT
WATCHDOG SOFTWARE CONSIDERATIONS
To minimize watchdog input current (and minimize overall
power consumption), leave WDI low for the majority of the
watchdog timeout period. When driven high, WDI can draw
as much as 160 µA. Pulsing WDI low-to-high-to-low at a low
duty cycle reduces the effect of the large input current. When
WDI is unconnected, a window comparator disconnects the
watchdog timer from the reset output circuitry so that reset is
not asserted when the watchdog timer times out.
In implementing the microprocessor’s watchdog strobe code,
quickly switching WDI low to high and then high to low (minimizing WDI high time) is desirable for current consumption
reasons. However, a more effective way of using the watchdog
function can be considered.
To avoid unnecessary resets caused by fast power supply transients,
the ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/
ADM6321/ADM6322 are equipped with glitch rejection circuitry.
The typical performance characteristic in Figure 14 plots VCC
transient duration vs. the transient magnitude. The curves show
combinations of transient magnitude and duration for which a
reset is not generated for 4.63 V and 2.93 V reset threshold
parts. For example, with the 2.93 V threshold, a transient that
goes 100 mV below the threshold and lasts 8 µs typically does
not cause a reset, but if the transient is any larger in magnitude
or duration, a reset is generated. An optional 0.1 µF bypass
capacitor mounted close to VCC provides additional glitch
rejection.
ENSURING RESET VALID TO VCC = 0 V
Both active-low and active-high reset outputs are guaranteed
to be valid for VCC as low as 1 V. However, by using an external
resistor with push-pull configured reset outputs, valid outputs
for VCC as low as 0 V are possible. For an active-low reset output, a
resistor connected between RESET and ground pulls the output
low when it is unable to sink current. For the active-high case, a
resistor connected between RESET and VCC pulls the output high
when it is unable to source current. A large resistance, such as
100 kΩ, should be used so that it does not overload the reset
output when VCC is above 1 V.
START
SET WDI
HIGH
RESET
PROGRAM
CODE
SUBROUTINE
SET WDI
LOW
RETURN
Figure 20. Watchdog Flow Diagram
VCC
VCC
VCC
RESET
100kΩ
ADM6317/
ADM6318/
ADM6319/
ADM6321/
ADM6322
MR
WDI
RESET
MICROPROCESSOR
I/O
04533-020
RESET
ADM6316
100kΩ
RESET
04533-018
ADM6316/
ADM6318/
ADM6319
INFINITE LOOP:
WATCHDOG
TIMES OUT
04533-021
NEGATIVE-GOING VCC TRANSIENTS
A low-to-high-to-low WDI pulse within a given subroutine
prevents the watchdog from timing out. However, if the subroutine becomes stuck in an infinite loop, the watchdog cannot
detect this because the subroutine continues to toggle WDI. A
more effective coding scheme for detecting this error involves
using a slightly longer watchdog timeout. In the program that
calls the subroutine, WDI is set high. The subroutine sets WDI
low when it is called. If the program executes without error, WDI
is toggled high and low with every loop of the program. If the
subroutine enters an infinite loop, WDI is kept low, the watchdog
times out, and the microprocessor is reset (see Figure 20).
Figure 19. Ensuring Reset Valid to VCC = 0 V
Rev. F | Page 10 of 16
Figure 21. Typical Application Circuit
Data Sheet
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
OPTIONS
Table 5. Reset Voltage Threshold Options
Part No.
ADM63xxx50
ADM63xxx49
ADM63xxx48
ADM63xxx47
ADM63xxx46
ADM63xxx45
ADM63xxx44
ADM63xxx43
ADM63xxx42
ADM63xxx41
ADM63xxx40
ADM63xxx39
ADM63xxx38
ADM63xxx37
ADM63xxx36
ADM63xxx35
ADM63xxx34
ADM63xxx33
ADM63xxx32
ADM63xxx31
ADM63xxx30
ADM63xxx29
ADM63xxx28
ADM63xxx27
ADM63xxx26
ADM63xxx25
Min
4.925
4.827
4.728
4.630
4.561
4.433
4.314
4.236
4.137
4.039
3.940
3.842
3.743
3.645
3.546
3.448
3.349
3.251
3.152
3.034
2.955
2.886
2.758
2.660
2.591
2.463
TA = +25°C
Typ
5.000
4.900
4.800
4.700
4.630
4.500
4.390
4.300
4.200
4.100
4.00
3.900
3.800
3.700
3.600
3.500
3.400
3.300
3.200
3.080
3.000
2.930
2.800
2.700
2.630
2.500
Max
5.075
4.974
4.872
4.771
4.699
4.568
4.446
4.365
4.263
4.162
4.060
3.959
3.857
3.756
3.654
3.553
3.451
3.350
3.248
3.126
3.045
2.974
2.842
2.741
2.669
2.538
Min
4.875
4.778
4.680
4.583
4.514
4.388
4.270
4.193
4.095
3.998
3.900
3.803
3.705
3.608
3.510
3.413
3.315
3.218
3.120
3.003
2.925
2.857
2.730
2.633
2.564
2.438
TA = −40°C to +85°C
Max
5.125
5.023
4.920
4.818
4.746
4.613
4.490
4.408
4.305
4.203
4.100
3.998
3.895
3.793
3.690
3.588
3.485
3.383
3.280
3.157
3.075
3.000
2.870
2.768
2.696
2.563
Table 6. Reset Timeout Options
Suffix
A
B
C
D
Min
1
20
140
1.12
Typ
1.6
30
200
1.60
Max
2
40
280
2.24
Unit
ms
ms
ms
sec
Typ
6.3
102
1.6
25.6
Max
9.3
153
2.24
38.4
Unit
ms
ms
sec
sec
Table 7. Watchdog Timer Options
Suffix
W
X
Y
Z
Min
4.3
71
1.12
17.9
Rev. F | Page 11 of 16
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
Data Sheet
Table 8. Standard Models
Model
ADM6316CW25-ARJZ-R7
ADM6316DZ26-ARJ-RL7
ADM6316DZ26-ARJZ-R7
ADM6316AY27-ARJZ-R7
ADM6316AY29-ARJZ-R7
ADM6316AZ29ARJZ-R7
ADM6316CY29-ARJ-RL7
ADM6316CY29-ARJZ-R7
ADM6316BX30-ARJZ-R7
ADM6316DZ31-ARJ-RL7
ADM6316DZ31-ARJZ-R7
ADM6316BX46-ARJZ-R7
ADM6316CY26ARJZ-R7
ADM6316CY46-ARJ-RL7
ADM6316CY46-ARJZ-R7
ADM6318CZ28-ARJ-RL7
ADM6318CZ28-ARJZ-R7
ADM6318CY29-ARJZ-R7
ADM6318CY45-ARJZ-R7
ADM6318CY46-ARJ-RL7
ADM6318CY46-ARJZ-R7
ADM6318BX49-ARJZ-R7
ADM6319C29-ARJ-RL7
ADM6319C29-ARJZ-RL7
ADM6319B25ARJZ-R7
ADM6319B31-ARJZ-RL7
ADM6319C46-ARJ-RL7
ADM6319C46-ARJZ-RL7
ADM6320CZ27-ARJZ-R7
ADM6320CX29-ARJZ-R7
ADM6320CY29-ARJ-RL7
ADM6320CY29-ARJZ-R7
ADM6320CZ29-ARJ-RL7
ADM6320CZ29-ARJZ-R7
ADM6320BX33-ARJZ-R7
ADM6320CW33-ARJZ-R7
ADM6320BX45-ARJZ-R7
ADM6320CY46-ARJ-RL7
ADM6320CY46-ARJZ-R7
ADM6321BZ25-ARJZ-R7
ADM6321AY30ARJZ-R7
ADM6321AY31ARJZ-R7
ADM6321AY43-ARJZ-R7
ADM6321CY46-ARJ-RL7
ADM6321CY46-ARJZ-R7
ADM6322C29ARJZ-RL7
ADM6322C46-ARJ-RL7
ADM6322C46-ARJZ-RL7
Reset Threshold (V)
2.5
2.63
2.63
2.7
2.93
2.93
2.93
2.93
3
3.08
3.08
4.63
2.63
4.63
4.63
2.8
2.8
2.93
4.5
4.63
4.63
4.9
2.93
2.93
2.5
3.08
4.63
4.63
2.7
2.93
2.93
2.93
2.93
2.93
3.3
3.3
4.5
4.63
4.63
2.5
3
3.08
4.3
4.63
4.63
2.93
4.63
4.63
Minimum Reset Timeout (ms)
140
1120
1120
1
1
1
140
140
20
1120
1120
20
140
140
140
140
140
140
140
140
140
20
140
140
20
20
140
140
140
140
140
140
140
140
140
20
20
140
140
20
1
1
1
140
140
140
140
140
Rev. F | Page 12 of 16
Typical Watchdog Timeout (sec)
0.0063
25.6
25.6
1.6
1.6
25.6
1.6
1.6
0.102
25.6
25.6
0.102
1.6
1.6
1.6
25.6
25.6
1.6
1.6
1.6
1.6
0.102
N/A
N/A
n/A
N/A
N/A
N/A
25.6
0.102
1.6
1.6
25.6
25.6
0.102
0.0063
0.102
1.6
1.6
25.6
1.6
1.6
1.6
1.6
1.6
N/A
N/A
N/A
Data Sheet
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
OUTLINE DIMENSIONS
3.00
2.90
2.80
1.70
1.60
1.50
5
1
4
2
3.00
2.80
2.60
3
0.95 BSC
1.90
BSC
1.45 MAX
0.95 MIN
0.15 MAX
0.05 MIN
0.50 MAX
0.35 MIN
0.20 MAX
0.08 MIN
SEATING
PLANE
10°
5°
0°
0.60
BSC
0.55
0.45
0.35
11-01-2010-A
1.30
1.15
0.90
COMPLIANT TO JEDEC STANDARDS MO-178-AA
Figure 22. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
ADM63 _ _ _ _ARJ_-_
ORDERING QUANTITY
RL7: 3000 PIECE REEL
R7: 3000 PIECE REEL RoHS COMPLIANT
GENERIC NUMBER
(16 TO 22)
Z: RoHS COMPLIANT
PACKAGE CODE
RJ: 5-LEAD SOT-23
WATCHDOG TIMEOUT PERIOD
W: 6.3ms (TYP)
X: 102ms (TYP)
Y: 1.6sec (TYP)
Z: 25.6sec (TYP)
TEMPERATURE RANGE
A: –40°C TO +85°C
RESET THRESHOLD NUMBER
(25 TO 50)
04533-024
RESET TIMEOUT PERIOD
A: 1ms (MIN)
B: 20ms (MIN)
C: 140ms (MIN)
D: 1120ms (MIN)
Figure 23. Ordering Code Structure (Modified Diagram)
ORDERING GUIDE
Model1, 2, 3
ADM6316xxxARJ-RL7
ADM6316xxxARJZ-R7
ADM6317xxxARJZ-R7
ADM6318xxxARJ-RL7
ADM6318xxxARJZ-R7
ADM6319xxARJ-RL7
ADM6319xxARJZ-R7
ADM6320xxxARJ-RL7
ADM6320xxxARJZ-R7
ADM6321xxxARJ-RL7
ADM6321xxxARJZ-R7
ADM6322xxARJ-RL7
ADM6322xxARJZ-RL7
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Ordering Quantity4
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
3,000
1
Package Description
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
5-Lead SOT-23
Package Option
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
Branding
N00
M7Q
M9N
N02
M4Q
N03
N0S
N04
N0T
N05
M8L
N06
M8J
Complete the ordering code by inserting reset threshold, reset timeout, and watchdog timeout (ADM6316/ADM6317/ADM6318/ADM6320/ADM6321) suffixes from
Table 5 to Table 7. No watchdog timeout is available for ADM6319/ADM6322.
Contact sales for the availability of nonstandard models. See Table 8 for a list of standard models.
3
Z = RoHS Compliant Part.
4
A minimum of 12,000 (four reels) must be ordered.
2
Rev. F | Page 13 of 16
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
NOTES
Rev. F | Page 14 of 16
Data Sheet
Data Sheet
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
NOTES
Rev. F | Page 15 of 16
ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322
NOTES
©2004–2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04533-0-5/13(F)
Rev. F | Page 16 of 16
Data Sheet