IRF IRF7769L2TR1PBF Rohs compliant, halogen free Datasheet

PD - 97413B
IRF7769L2TRPbF
IRF7769L2TR1PbF
DirectFET™ Power MOSFET ‚
RoHS Compliant, Halogen Free 
l Lead-Free (Qualified up to 260°C Reflow)
l Ideal for High Performance Isolated Converter
Primary Switch Socket
l Optimized for Synchronous Rectification
l Low Conduction Losses
l High Cdv/dt Immunity
l Low Profile (<0.7mm)
l Dual Sided Cooling Compatible 
l Compatible with existing Surface Mount Techniques 
l Industrial Qualified
l
Typical values (unless otherwise specified)
VDSS
SC
M2
RDS(on)
100V min ±20V max
Qg
D
G
S
S
S
S
S
S
S
S
Vgs(th)
110nC
2.7V
D
DirectFET™ ISOMETRIC
L8
M4
L4
2.8mΩ@ 10V
Qgd
tot
200nC
Applicable DirectFET Outline and Substrate Outline 
SB
VGS
L6
L8
Description
The IRF7769L2TR/TR1PbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to
achieve the lowest on-state resistance in a package that has a footprint smaller than a D2PAK and only 0.7 mm profile. The DirectFET package
is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection
soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package
allows dual sided cooling to maximize thermal transfer in power systems.
The IRF7769L2TR/TR1PbF is optimized for high frequency switching and synchronous rectification applications. The reduced total losses
in the device coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for system
reliability improvements, and makes this device ideal for high performance power converters.
Absolute Maxim um Ratings
Parameter
V DS
V GS
ID @
ID @
ID @
ID @
I DM
E AS
I AR
TC
TC
TA
TC
=
=
=
=
25°C
100°C
25°C
25°C
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @
Continuous Drain Current, VGS @
Continuous Drain Current, VGS @
Continuous Drain Current, VGS @
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
g
g
10V (Silicon Limited) f
10V (Silicon Limited) f
10V (Silicon Limited) e
10V (Package Limited) f
h
Units
100
±20
124
88
20
375
500
260
74
V
A
mJ
A
3.10
ID = 74A
8.00
6.00
TJ = 125°C
4.00
2.00
TJ = 25°C
TA= 25°C
(
DS(on) mΩ)
10.00
3.00
Typical R
Typical R DS (on), (mΩ)
12.00
Max.
2.90
VGS = 7.0V
VGS = 8.0V
VGS = 10V
VGS = 15V
0.00
2.0
Notes:
4.0 6.0 8.0 10.0 12.0 14.0 16.0
VGS, Gate-to-Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
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2.80
20
40
60
80
100
ID, Drain Current (A)
Fig 2. Typical On-Resistance vs. Drain Current
„ TC measured with thermocouple mounted to top (Drain) of part.
Repetitive rating; pulse width limited by max. junction temperature.
† Starting TJ = 25°C, L = 0.09mH, RG = 25Ω, IAS = 74A.
1
2/2/2010
IRF7769L2TR/TR1PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
Conditions
Typ. Max. Units
VGS = 0V, ID = 250µA
BVDSS
Drain-to-Source Breakdown Voltage
100
–––
–––
ΔΒVDSS/ΔTJ
Breakdown Voltage Temp. Coefficient
–––
0.02
–––
RDS(on)
Static Drain-to-Source On-Resistance
–––
2.8
3.5
VGS(th)
Gate Threshold Voltage
2.0
2.7
4.0
V
ΔVGS(th)/ΔTJ
Gate Threshold Voltage Coefficient
–––
-10
–––
mV/°C
IDSS
Drain-to-Source Leakage Current
–––
–––
20
µA
VDS = 100V, VGS = 0V
–––
–––
250
VDS = 80V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
IGSS
V
V/°C Reference to 25°C, ID = 2mA
mΩ VGS = 10V, ID = 74A i
VDS = VGS, ID = 250µA
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
-100
Forward Transconductance
410
–––
–––
Total Gate Charge
–––
200
300
Qgs1
Pre-Vth Gate-to-Source Charge
–––
30
–––
Qgs2
Post-Vth Gate-to-Source Charge
–––
9.0
–––
Qgd
Gate-to-Drain Charge
–––
110
165
ID = 74A
Qgodr
–––
51
–––
See Fig. 9
Qsw
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
119
–––
Qoss
Output Charge
–––
53
–––
nC
RG
Gate Resistance
–––
1.5
–––
Ω
td(on)
Turn-On Delay Time
–––
44
–––
tr
Rise Time
–––
32
–––
td(off)
Turn-Off Delay Time
–––
92
–––
tf
Fall Time
–––
41
–––
Ciss
Input Capacitance
–––
11560
–––
Coss
Output Capacitance
–––
1240
–––
Crss
Reverse Transfer Capacitance
–––
590
–––
Coss
Output Capacitance
–––
6665
–––
ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, f=1.0MHz
Coss
Output Capacitance
–––
690
–––
VGS = 0V, VDS = 80V, f=1.0MHz
gfs
Qg
VGS = -20V
S
VDS = 25V, ID = 74A
VDS = 50V
nC
VGS = 10V
VDS = 16V, VGS = 0V
VDD = 50V, VGS = 10Vi
ID = 74A
ns
RG=1.8Ω
VGS = 0V
pF
VDS = 25V
Diode Characteristics
Parameter
IS
Continuous Source Current
Min.
–––
Typ. Max. Units
–––
ISM
Pulsed Source Current
MOSFET symbol
124
(Body Diode)
A
–––
–––
Conditions
showing the
500
integral reverse
VSD
Diode Forward Voltage
–––
–––
1.3
V
p-n junction diode.
TJ = 25°C, IS = 74A, VGS = 0V i
trr
Reverse Recovery Time
–––
75
112
ns
TJ = 25°C, IF = 74A, VDD = 50V
Qrr
Reverse Recovery Charge
–––
220
330
nC
di/dt = 100A/µs i
(Body Diode)g
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
‡ Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
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IRF7769L2TR/TR1PbF
Absolute Maximum Ratings
f
f
c
Max.
Units
125
63
3.3
270
-55 to + 175
W
Parameter
Power Dissipation
Power Dissipation
Power Dissipation
Peak Soldering Temperature
Operating Junction and
Storage Temperature Range
PD @TC = 25°C
PD @TC = 100°C
PD @TA = 25°C
TP
TJ
TSTG
°C
Thermal Resistance
RθJA
RθJA
RθJA
RθJ-Can
RθJ-PCB
e
j
k
Parameter
Typ.
Max.
Units
–––
12.5
20
–––
–––
45
–––
–––
1.2
0.5
°C/W
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Can
Junction-to-PCB Mounted
fl
Thermal Response ( Z thJC ) °C/W
10
1
D = 0.50
0.20
0.1
0.01
0.001
0.0001
1E-006
0.10
0.05
0.02
0.01
τJ
τJ
τ1
R2
R2
τ2
τ1
R3
R3
Ri (°C/W)
R4
R4
τC
τ
τ2
τ3
τ3
Ci= τi/Ri
Ci= i/Ri
SINGLE PULSE
( THERMAL RESPONSE )
1E-005
R1
R1
τ4
τ4
τi (sec)
0.1080
0.000171
0.6140
0.053914
0.4520
0.006099
1.47e-05
0.036168
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Case „
Notes:
‰ Mounted on minimum footprint full size board with metalized
ƒ Surface mounted on 1 in. square Cu board, steady state.
„ TC measured with thermocouple incontact with top (Drain) of part. back and with small clip heatsink.
Š Rθ is measured at TJ of approximately 90°C.
ˆ Used double sided cooling, mounting pad with large heatsink.
ƒ Surface mounted on 1 in. square Cu
board (still air).
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‰ Mounted on minimum footprint full size board with metalized
back and with small clip heatsink. (still air)
3
IRF7769L2TR/TR1PbF
1000
100
BOTTOM
10
1
≤ 60µs PULSE WIDTH
Tj = 25°C
3.5V
BOTTOM
100
3.5V
≤ 60µs PULSE WIDTH
Tj = 175°C
0.1
10
0.1
1
10
100
0.1
VDS , Drain-to-Source Voltage (V)
100
2.5
≤ 60µs PULSE WIDTH
100
TJ = 175°C
TJ = 25°C
10
TJ = -40°C
1
0.1
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
ID = 74A
VGS = 10V
2.0
(Normalized)
RDS(on) , Drain-to-Source On Resistance
VDS = 25V
1.5
1.0
0.5
-60 -40 -20
VGS, Gate-to-Source Voltage (V)
100000
20 40 60 80 100 120 140 160 180
Fig 7. Normalized On-Resistance vs. Temperature
14
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Ciss
10000
0
TJ , Junction Temperature (°C)
Fig 6. Typical Transfer Characteristics
C, Capacitance (pF)
10
Fig 5. Typical Output Characteristics
1000
ID, Drain-to-Source Current (A)
1
VDS , Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
Coss
Crss
1000
ID= 74A
12
VDS = 80V
VDS = 50V
10
VDS = 20V
8
6
4
2
0
100
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
VGS
15V
10V
8.0V
6.0V
5.0V
4.5V
4.0V
3.5V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
1000
VGS
15V
10V
8.0V
6.0V
5.0V
4.5V
4.0V
3.5V
TOP
0
50
100
150
200
250
300
QG Total Gate Charge (nC)
Fig 9. Typical Total Gate Charge vs
Gate-to-Source Voltage
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IRF7769L2TR/TR1PbF
10000
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
1000
100
TJ = 175°C
TJ = 25°C
10
TJ = -40°C
1
OPERATION IN THIS AREA
LIMITED BY R DS (on)
1000
100
100µsec
DC
10
10msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
1msec
0.1
0.1
0.2
0.4
0.6
0.8
1.0
0
1.2
1
10
100
1000
VDS , Drain-toSource Voltage (V)
VSD , Source-to-Drain Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
Fig11. Maximum Safe Operating Area
125
4.0
VGS(th) Gate threshold Voltage (V)
ID = 1.0A
ID , Drain Current (A)
100
75
50
25
0
ID = 1.0mA
3.5
ID = 250µA
3.0
2.5
2.0
1.5
1.0
0.5
25
50
75
100
125
150
175
-75
-50 -25
TC , CaseTemperature (°C)
0
25
50
75
100 125 150 175
TJ , Temperature ( °C )
Fig 13. Typical Threshold Voltage vs.
Junction Temperature
Fig 12. Maximum Drain Current vs. Case Temperature
EAS, Single Pulse Avalanche Energy (mJ)
1200
ID
13A
20A
BOTTOM 74A
TOP
1000
800
600
400
200
0
25
50
75
100
125
150
175
Starting TJ, Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy Vs. Drain Current
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5
IRF7769L2TR/TR1PbF
1000
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
Avalanche Current (A)
Duty Cycle = Single Pulse
100
0.01
10
0.05
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 19a, 19b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
280
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 74A
EAR , Avalanche Energy (mJ)
240
200
160
120
80
40
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·ta
Fig 16. Maximum Avalanche Energy Vs. Temperature
D.U.T
Driver Gate Drive
ƒ
+
-
„
•
•
•
•
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
di/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
*

RG
D=
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
‚
-
Period
P.W.
+
+
-
Re-Applied
Voltage
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 17. Diode Reverse Recovery Test Circuit for N-Channel HEXFET® Power MOSFETs
6
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IRF7769L2TR/TR1PbF
Id
Vds
Vgs
L
D
VCC
DUT
G
0
Vgs(th)
S
20K
1K
Qgodr
Fig 18a. Gate Charge Test Circuit
Qgd
Qgs2 Qgs1
Fig 18b. Gate Charge Waveform
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
V
RGSG
+
V
- DD
IAS
20V
tp
A
0.01Ω
I AS
Fig 19b. Unclamped Inductive Waveforms
Fig 19a. Unclamped Inductive Test Circuit
VDS
VGS
RG
RD
VDS
90%
D.U.T.
+
- VDD
V10V
GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
10%
VGS
td(on)
Fig 20a. Switching Time Test Circuit
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tr
t d(off)
tf
Fig 20b. Switching Time Waveforms
7
IRF7769L2TR/TR1PbF
DirectFET™ Board Footprint, L8 (Large Size Can).
Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations
G = GATE
D = DRAIN
S = SOURCE
D
D
D
8
D
S
S
S
S
G
D
S
S
S
S
D
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IRF7769L2TR/TR1PbF
DirectFET™ Outline Dimension, L8 Outline (LargeSize Can).
Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations
DIMENSIONS
IMPERIAL
METRIC
MAX MIN
CODE MIN
MAX
9.15 0.356
A
9.05
0.360
7.10 0.270
B
6.85
0.280
6.00 0.232
C
5.90
0.236
0.65 0.022
D
0.55
0.026
0.62 0.023
E
0.58
0.024
1.22 0.046
F
1.18
0.048
G
0.98 1.02 0.015
0.017
0.77 0.029
H
0.73
0.030
0.42 0.015
J
0.38
0.017
1.47 0.053
K
1.34
0.058
2.69 0.099
L
2.52
0.106
M
0.616 0.676 0.0235 0.0274
N
0.020 0.080 0.0008 0.0031
0.18 0.003
P
0.09
0.007
DirectFET™ Part Marking
GATE MARKING
LOGO
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
Note: For the most current drawing please refer to IR website at http://www.irf.com/package
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9
IRF7769L2TR/TR1PbF
DirectFET™ Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm Std reel
quantity is 4000 parts. (ordered as IRF7769L2PBF).
REEL DIMENSIONS
STANDARD OPTION (QTY 4000)
IMPERIAL
METRIC
MIN
CODE
MAX
MIN
MAX
A
12.992 N.C
330.0
N.C
B
0.795
20.2
N.C
N.C
C
0.504
12.8
0.520
13.2
0.059
D
1.5
N.C
N.C
E
3.937
100.0
N.C
N.C
F
N.C
N.C
0.889
22.4
G
0.646
16.4
0.724
18.4
H
0.626
15.9
0.724
18.4
LOADED TAPE FEED DIRECTION
NOTE: CONTROLLING
DIMENSIONS IN MM
CODE
A
B
C
D
E
F
G
H
10
DIMENSIONS
IMPERIAL
METRIC
MIN
MIN
MAX
MAX
0.469
11.90
0.476
12.10
0.154
0.161
3.90
4.10
0.626
0.642
15.90
16.30
0.291
0.299
7.40
7.60
0.284
7.20
0.291
7.40
0.390
9.90
0.398
10.10
0.059
1.50
NC
NC
0.059
1.50
0.063
1.60
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IRF7769L2TR/TR1PbF
Part number
Package Type
IRF7769L2TRPbF
IRF7769L2TR1PbF
DirectFET2 Large Can
DirectFET2 Large Can
Standard Pack
Form
Quantity
Tape and Reel
4000
Tape and Reel
1000
Note
"TR" suffix
"TR1" suffix
†
Qualification Information
Industrial ††
Qualification level
(per JEDEC JESD47F††† guidelines)
Comments: This family of products has passed JEDEC’s Industrial
qualification. IR’s Consumer qualification level is granted by extension of the
higher Industrial level.
Moisture Sensitivity Level
MSL1
DFET2
(per JEDEC J-STD-020D†††)
RoHS Compliant
†
††
†††
Yes
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/product-info/reliability
Higher qualification ratings may be available should the user have such requirements.
Please contact your International Rectifier sales representative for further information:
http://www.irf.com/whoto-call/salesrep/
Applicable version of JEDEC standard at the time of product release.
Data and specifications subject to change without notice.
This product has been designed and qualified to MSL1 rating for the Industrial market.
Additional storage requirement details for DirectFET products can be found in application note AN1035 on IR’s Web site.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.2/2010
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11
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