TI1 DS36C279MX/NOPB Ds36c279 low power eia-rs-485 transceiver with sleep mode Datasheet

DS36C279
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SNLS098B – JULY 2000 – REVISED APRIL 2013
DS36C279 Low Power EIA-RS-485 Transceiver with Sleep Mode
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FEATURES
DESCRIPTION
•
The DS36C279 is a low power differential bus/line
transceiver designed to meet the requirements of RS485 Standard for multipoint data transmission. In
addition it is compatible with TIA/EIA-422-B.
1
•
•
•
•
•
•
•
•
•
•
•
•
(1)
100% RS-485 Compliant
– Specified RS-485 Device Interoperation
Low Power CMOS Design: ICC 500 μA Max
Automatic Sensing Sleep Mode
– Reduces ICC to 10 μA Maximum
Built-in Power Up/Down Glitch-Free Circuitry
– Permits Live Transceiver
Intersection/Displacement
SOIC Packages
Industrial Temperature Range: −40°C to
+85°C
On-Board Thermal Shutdown Circuitry
– Prevents Damage to the Device in the Event
of Excessive Power Dissipation
Wide Common Mode Range: −7V to +12V
Receive Open Input Fail-Safe (1)
¼ Unit Load (DS36C279): ≥ 128 Nodes
½ Unit Load (DS36C279T): ≥ 64 Nodes
ESD (Human Body Model): ≥ 2 kV
Drop-In Replacement for:
– LTC485 MAX485 DS75176 DS3695
Non-terminated, open input only
The sleep mode feature automatically puts the device
in a power saving mode when both the driver and
receiver are disabled. (2) The device is ideal for use in
power conscious applications where the device may
be disabled for extended periods of time.
The driver and receiver outputs feature TRI-STATE
capability. The driver outputs operate over the entire
common mode range of −7V to +12V. Bus contention
or fault situations that cause excessive power
dissipation within the device are handled by a thermal
shutdown circuit, which forces the driver outputs into
a high impedance state.
The receiver incorporates a fail safe circuit which
ensures a high output state when the inputs are left
open. (3)
The DS36C279T is fully specified over the industrial
temperature range (−40°C to +85°C).
(2)
(3)
Device enters sleep mode if enable conditions are held > 600
ns
Non-terminated, open input only
Connection and Logic Diagram
Figure 1. See Package Number D
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2013, Texas Instruments Incorporated
DS36C279
SNLS098B – JULY 2000 – REVISED APRIL 2013
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TRUTH TABLE
DRIVER SECTION
RE*
DE
DI
DO/RI
X
H
H
H
DO*/RI*
L
X
H
L
L
H
X
L
X
Z
Z
RECEIVER SECTION
RE*
DE
RI-RI*
RO
L
L
≥+0.2V
H
L
L
≤−0.2V
H
L
X
L
L
(1)
(2)
OPEN
L
Z
(2)
(1)
H
Device enters sleep mode if enable conditions are held > 600 ns
Non-terminated, open input only
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS (1) (2)
Supply Voltage (VCC)
+12V
−0.5V to (VCC +0.5V)
Input Voltage (DE, RE*, & DI)
Common Mode (VCM)
Driver Output/Receiver Input
±15V
Input Voltage (DO/RI, DO*/RI*)
±14V
−0.5V to (VCC +0.5V)
Receiver Output Voltage
Maximum Package Power Dissipation
@ +25°C
D Package 1190 mW, derate
9.5 mW/°C above +25°C
−65°C to +150°C
Storage Temperature Range
Lead Temperature
(1)
(2)
(Soldering 4 sec)
+260°C
Absolute Maximum Ratings are those values beyond which the safety of the device cannot be ensured. They are not meant to imply that
the devices should be operated at these limits. The table of Electrical Characteristics specifies conditions of device operation.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
RECOMMENDED OPERATING CONDITIONS
Supply Voltage (VCC)
Typ
Max
Units
+5.0
+5.25
V
+12
V
−7
Bus Voltage
Operating Free Air Temperature (TA)
Min
+4.75
DS36C279T
−40
+25
+85
°C
0
+25
+70
°C
DS36C279
2
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ELECTRICAL CHARACTERISTICS (1) (2)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
Symbol
Parameter
Conditions
Reference
Min
(422)
(485)
Typ
Max
Unit
s
1.5
5.0
V
0
5.0
V
5.0
V
DIFFERENTIAL DRIVER CHARACTERISTICS
VOD1
Differential Output Voltage
IO = 0 mA (No Load)
VOD0
Output Voltage
VOD0*
Output Voltage
IO = 0 mA
(Output to GND)
VOD2
Differential Output Voltage
(Termination Load)
0
RL = 50Ω
(422)
RL = 27Ω
(485)
(3)
See
Figure 2
2.0
2.8
1.5
2.3
5.0
V
V
(422, 485)
−0.2
0.1
+0.2
V
1.5
2.0
5.0
V
0
3.0
V
0
3.0
V
−0.2
+0.2
V
ΔVOD2
Balance of VOD2
|VOD2 − VOD2*|
RL = 27Ω or 50Ω
See
VOD3
Differential Output Voltage
(Full Load)
R1 = 54Ω, R2 = 375Ω
VTEST = −7V to +12V
See Figure 3
VOC
Driver Common Mode
Output Voltage
RL = 27Ω
(485)
RL = 50Ω
(422)
ΔVOC
Balance of VOC
|VOC − VOC*|
RL = 27Ω or
RL = 50Ω
See (3)
(422, 485)
IOSD
Driver Output Short-Circuit
Current
VO = +12V
(485) See Figure 5
200
+250
mA
VO = −7V
(485)
−190
−250
mA
+0.035
+0.2
V
See
Figure 2
RECEIVER CHARACTERISTICS
Differential Input High
Threshold Voltage
VO = VOH, IO = −0.4 mA
−7V ≤ VCM ≤ +12V
VTL
Differential Input Low
Threshold Voltage
VO = VOL, IO = 0.4 mA
−7V ≤ VCM ≤ +12V
VHST
Hysteresis
VCM = 0V
RIN
Input Resistance
−7V ≤ VCM ≤ +12V
VTH
IIN
Line Input Current
See (6)
IING
Line Input Current Glitch
See (6)
−0.035
V
70
mV
DS36C279T
24
68
kΩ
DS36C279
48
68
kΩ
DS36C279
VIN = +12V
0
0.19
0.25
mA
VIN = −7V
0
−0.1
−0.2
mA
DS36C279T
VIN = +12V
0
0.19
0.5
mA
VIN = −7V
0
−0.1
−0.4
mA
Other Input = 0V,
DE = VIL, RE* = VIL,
DS36C279
VIN = +12V
0
0.19
0.25
mA
VIN = −7V
0
−0.1
−0.2
mA
VCC = +3.0V or 0V,
TA = 25°C
DS36C279T
VIN = +12V
0
0.19
0.5
mA
VIN = −7V
0
−0.1
−0.4
mA
±400
mV
Input Balance Test
RS = 500Ω
VOH
High Level Output Voltage
IOH = −4 mA, VID = +0.2V
VOL
Low Level Output Voltage
IOL = +4 mA, VID = −0.2V
IOSR
Short Circuit Current
VO = GND
IOZR
TRI-STATE Leakage Current
VO = 0.4V to 2.4V
(2)
(3)
(4)
(5)
(6)
(7)
−0.2
See (5)
Other Input = 0V,
DE = VIL, RE* = VIL,
VCC = 4.75 to 5.25
or 0V
IB
(1)
See (4)
(422, 485)
(422) See (7)
RO
See Figure 12
3.5
RO
7
4.6
V
0.3
0.5
V
35
85
mA
±1
μA
Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground
except VOD1 and VOD2.
All typicals are given for: VCC = +5.0V, TA = + 25°C.
Delta |VOD2| and Delta |V OC| are changes in magnitude of VOD2 and VOC , respectively, that occur when input changes state.
Threshold parameter limits specified as an algebraic value rather than by magnitude.
Hysteresis defined as VHST = VTH − VTL.
IIN includes the receiver input current and driver TRI-STATE leakage current.
For complete details of test, see RS-485.
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ELECTRICAL CHARACTERISTICS(1)(2) (continued)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
Symbol
Parameter
Conditions
Reference
Min
Typ
Max
Unit
s
2.0
VCC
V
GND
0.8
V
DEVICE CHARACTERISTICS
VIH
High Level Input Voltage
VIL
Low Level Input Voltage
DE,
RE*,
DI
IIH
High Level Input Current
VIH = VCC
IIL
Low Level Input Current
VCC = 5V
VIL = 0V
VCC = +3.0V
ICC
ICCR
Power Supply Current
(No Load)
μA
μA
−2
μA
Driver and Receiver ON
200
500
μA
Driver OFF, Receiver ON
200
500
μA
200
500
μA
0.2
10
μA
ICCD
Driver ON, Receiver OFF
ICCX
Sleep Mode
4
2
−2
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VCC
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SWITCHING CHARACTERISTICS (1) (2)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
Symbol
Parameter
Conditions
Reference
Min
Typ
Max
Units
10
39
80
ns
10
40
80
ns
0
1
10
ns
3
25
50
ns
3
DRIVER CHARACTERISTICS
tPHLD
Differential Propagation
Delay High to Low
RL = 54Ω, CL = 100 pF
tPLHD
Differential Propagation
Delay Low to High
tSKD
Differential Skew
|tPHLD − tPLHD|
tr
Rise Time
tf
Fall Time
tPHZ
Disable Time High to Z
tPLZ
Disable Time Low to Z
tPZH
Enable Time Z to High
tPZL
Enable Time Z to Low
tPSH
Driver Enable from Sleep
Mode to Output High
CL = 100 pF
See (3)
See Figure 8 and
Figure 9
tPSL
Driver Enble from Sleep
Mode to Output Low
CL = 100 pF
See (3)
See Figure 10 and
Figure 11
See Figure 6 and
Figure 7
CL = 15 pF
RE* = L
CL = 100 pF
RE* = L
25
50
ns
See Figure 8 and
Figure 9
80
200
ns
See Figure 10 and
Figure 11
80
200
ns
See Figure 8 and
Figure 9
50
200
ns
See Figure 10 and
Figure 11
65
200
ns
70
98
250
ns
70
98
250
ns
30
210
400
ns
30
190
400
ns
0
20
50
ns
50
150
ns
55
150
ns
40
150
ns
45
150
ns
RECEIVER CHARACTERISTICS
tPHL
Propagation Delay
High to Low
tPLH
Propagation Delay
Low to High
tSK
Skew, |tPHL − tPLH|
tPLZ
Output Disable Time
CL = 15 pF
See Figure 13 and
Figure 14
CL = 15 pF DE = H
See Figure 15,
Figure 16 and
Figure 17
tPHZ
tPZL
Output Enable Time
tPZH
tPSH
Receiver Enable from Sleep
Mode to Output High
CL = 15 pF
See (3)
See Figure 15 and
Figure 17
70
97
250
ns
tPSL
Receiver Enable from Sleep
Mode to Output Low
CL = 15 pF
See (3)
See Figure 15 and
Figure 16
70
95
250
ns
(1)
(2)
(3)
All typicals are given for: VCC = +5.0V, TA = + 25°C.
CL includes probe and jig capacitance.
For enable from sleep mode delays DE = L and RE* = H for greater than 600 ns prior to test (device is in sleep mode).
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PARAMETER MEASUREMENT INFORMATION
Figure 2. Driver VOD2 and VOC
Figure 3. Driver VOD3
Vtest = −7V to +12V
Figure 4. Driver VOH and VOL
Figure 5. Driver IOSD
Figure 6. Driver Differential Propagation Delay Test Circuit
Figure 7. Driver Differential Propagation Delays and Differential Rise and Fall Times
6
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Figure 8. TRI-STATE and Sleep Mode Test Circuit
(tPZH, (tPSH), tPHZ)
Figure 9. TRI-STATE and Sleep Mode Waveforms
(tPZH, (tPSH), tPHZ)
Figure 10. TRI-STATE and Sleep Mode Test Circuit
(tPZL, (tPSL), tPLZ)
Figure 11. TRI-STATE and Sleep Mode Waveforms
(tPZL, (tPSL), tPLZ)
Figure 12. Receiver VOH and VOL
Figure 13. Receiver Differential Propagation Delay
Test Circuit
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Figure 14. Receiver Differential Propagation Delay Waveforms
Figure 15. Receiver TRI-STATE and Sleep Mode Test Circuit
Figure 16. Receiver Enable and Disable Waveforms (tPLZ, tPZL, (tPSL))
8
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Figure 17. Receiver Enable and Disable Waveforms (tPHZ, tPZH, (tPSH))
Figure 18. Entering Sleep Mode Conditions
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TYPICAL APPLICATION INFORMATION
Figure 19. Typical RS-485 Bus Interface
Table 1. DEVICE PIN DESCRIPTIONS
Pin No.
Name
Description
1
RO
Receiver Output: When RE (Receiver Enable) is LOW, the receiver is enabled (ON), if DO/RI ≥ DO*/RI* by 200 mV,
RO will be HIGH. If DO/RI ≤ DO*/RI* by 200 mV, RO will be LOW. Additionally RO will be HIGH for OPEN (Nonterminated) Inputs.
2
RE*
Receiver Output Enable: When RE* is LOW the receiver output is enabled. When RE* is HIGH, the receiver output
is in TRI-STATE (OFF). When RE* is HIGH and DE is LOW, the device will enter a low-current sleep mode after
600 ns.
3
DE
Driver Output Enable: When DE is HIGH, the driver outputs are enabled. When DE is LOW, the driver outputs are
in TRI-STATE (OFF). When RE* is HIGH and DE is LOW, the device will enter a low-current sleep mode after 600
ns.
4
DI
Driver Input: When DE (Driver Enable) is HIGH, the driver is enabled, if DI is LOW, then DO/RI will be LOW and
DO*/RI* will be HIGH. If DI is HIGH, then DO/RI is HIGH and DO*/RI* is LOW.
5
GND
Ground Connection.
6
DO/RI
Driver Output/Receiver Input, 485 Bus Pin.
7
DO*/RI*
Driver Output/Receiver Input, 485 Bus Pin.
8
VCC
Positive Power Supply Connection: Recommended operating range for VCC is +4.75V to +5.25V.
UNIT LOAD
A unit load for an RS-485 receiver is defined by the input current versus the input voltage curve. The gray
shaded region is the defined operating range from −7V to +12V. The top border extending from −3V at 0 mA to
+12V at +1 mA is defined as one unit load. Likewise, the bottom border extending from +5V at 0 mA to −7V at
−0.8 mA is also defined as one unit load (see Figure 20). An RS-485 driver is capable of driving up to 32 unit
loads. This allows up to 32 nodes on a single bus. Although sufficient for many applications, it is sometimes
desirable to have even more nodes. For example, an aircraft that has 32 rows with 4 seats per row would benefit
from having 128 nodes on one bus. This would allow signals to be transferred to and from each individual seat to
1 main station. Usually there is one or two less seats in the last row of the aircraft near the restrooms and food
storage area. This frees the node for the main station.
The DS36C278, the DS36C279, and the DS36C280 all have ½ unit load and ¼ unit load (UL) options available.
These devices will allow up to 64 nodes or 128 nodes specified over temperature depending upon which option
is selected. The ½ UL option is available in industrial temperature and the ¼ UL is available in commercial
temperature.
First, for a ½ UL device the top and bottom borders shown in Figure 20 are scaled. Both 0 mA reference points
at +5V and −3V stay the same. The other reference points are +12V at +0.5 mA for the top border and −7V at
−0.4 mA for the bottom border (see Figure 20). Second, for a ¼ UL device the top and bottom borders shown in
Figure 20 are scaled also. Again, both 0 mA reference points at +5V and −3V stay the same. The other
reference points are +12V at +0.25 mA for the top border and −7V at −0.2 mA for the bottom border (see
Figure 20).
10
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The advantage of the ½ UL and ¼ UL devices is the increased number of nodes on one bus. In a single master
multi-slave type of application where the number of slaves exceeds 32, the DS36C278/279/280 may save in the
cost of extra devices like repeaters, extra media like cable, and/or extra components like resistors.
Figure 20. Input Current vs Input Voltage Operating Range
The DS36C279 and DS36C280 have an additional feature which offers more advantages. The DS36C279 has
an automatic sleep mode function for power conscious applications. The DS36C280 has a slew rate control for
EMI conscious applications. Refer to the sleep mode and slew rate control portion of the application information
section in the corresponding datasheet for more information on these features.
SLEEP MODE
The DS36C279 features an automatic shutdown mode that allows the device to save power when not
transmitting data. Since the shutdown mode is automatic, no external components are required. It may be used
as little or as much as the application requires. The more the feature is utilized, the more power it saves.
The sleep mode is automatically entered when both the driver and receiver are disabled. This occurs when both
the DE pin is asserted to a logic low and the RE* pin is asserted to a logic high. Once both pins are asserted the
device will enter sleep mode typically in 50 ns. The DS36C279 is ensured to go into sleep mode within 600 ns
after both pins are asserted. The device wakes up (comes out of sleep mode) when either the DE pin is asserted
to a logic high and/or the RE* pin is asserted to a logic low. After the device enters sleep mode it will take longer
for the device to wake up than it does for the device to enable from TRI-STATE. Refer to data specifications tPSL
and tPSH and compare with tPZL and tPZH for timing differences.
The benefit of the DS36C279 is definitely its power savings. When active the device has a maximum ICC of
500 μA. When in sleep mode the device has a maximum ICC of only 10 μA, which is 50 times less power than
when active. The ICC when the device is active is already very low but when in sleep mode the ICC is ultra low.
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REVISION HISTORY
Changes from Revision A (April 2013) to Revision B
•
12
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 11
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PACKAGE OPTION ADDENDUM
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12-Jul-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
DS36C279M/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
36C27
9M
DS36C279MX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
36C27
9M
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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Addendum-Page 2
PACKAGE MATERIALS INFORMATION
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11-Oct-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
DS36C279MX/NOPB
Package Package Pins
Type Drawing
SOIC
D
8
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2500
330.0
12.4
Pack Materials-Page 1
6.5
B0
(mm)
K0
(mm)
P1
(mm)
5.4
2.0
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
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11-Oct-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
DS36C279MX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
Pack Materials-Page 2
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