LINER LTC7000 Fast 150v protected high side nmos static switch driver Datasheet

LTC7000/LTC7000-1
Fast 150V Protected
High Side NMOS Static Switch Driver
Features
Description
Wide Operating VIN: 3.5V to 135V (150V Abs Max)
nn 1Ω Pull-Down, 2.2Ω Pull-Up for Fast Turn-On and
Turn-Off Times with 35ns Propagation Delays
nn Internal Charge Pump for 100% Duty Cycle
nn Short-Circuit Protected
nn Adjustable Current Trip Threshold (LTC7000)
nn Current Monitor Output (LTC7000)
nn Automatic Restart Timer
nn Open-Drain Fault Flag
nn Adjustable Turn-On Slew Rate
nn Gate Driver Supply from 3.5V to 15V
nn Adjustable V Undervoltage and Overvoltage
IN
Lockouts (LTC7000)
nn Adjustable Driver Supply V
CC Undervoltage Lockout
nn Low Shutdown Current: 1µA
nn CMOS Compatible Input
nn Thermally Enhanced, High Voltage Capable 16-Lead
MSOP Packages
The LTC®7000/LTC7000-1 is a fast high side N-channel
MOSFET gate driver that operates from input voltages up
to 135V. It contains an internal charge pump that fully
enhances an external N-channel MOSFET switch, allowing
it to remain on indefinitely.
nn
Applications
Its powerful driver can easily drive large gate capacitances
with very short transition times, making it well suited for
both high frequency switching applications or static switch
applications that require a fast turn-on and/or turn-off time.
When an internal comparator senses that the switch
current has exceeded a preset level, a fault flag is asserted
and the switch is turned off after a period of time set by
an external timing capacitor. After a cooldown period, the
LTC7000/LTC7000-1 automatically retries.
The LTC7000/LTC7000-1 is available in the thermallyenhanced 16-lead MSOP packages.
Package
Static Switch Driver
Load and Supply Switch Driver
nn Electronic Valve Driver
nn High Frequency High Side Gate Driver
LTC7000
LTC7000-1
16-Lead MSOP
MSE16
16-Lead MSOP
MSE16(12)
nn
High Voltage Pin Spacing
0.157mm
0.657mm
nn
RUN/OVLO/ISET/IMON Pins
Yes
No
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Analog
Devices, Inc. All other trademarks are the property of their respective owners.
Typical Application
High Side Switch with 100% Duty Cycle and Overcurrent Protection
Turn-On Transient Waveform
VIN
3.5V TO 135V
VCC
1µF
100k
1nF OFF ON
VIN = 135V
SNS+
VIN
LTC7000-1
0.007Ω
SNS–
FAULT
TGUP
TIMER
TGDN
BST
INP
VCCUV
GND
TS
0.1µF
LOAD
3.5V TO 135V
3A CONTINUOUS MAX
7000 TA01a
VINP
2V/DIV
VLOAD
50V/DIV
20ns/DIV
7000 TA01b
7000fa
For more information www.linear.com/LTC7000
1
LTC7000/LTC7000-1
Absolute Maximum Ratings
(Note 1)
Supply Voltages
VIN........................................................ –0.3V to 150V
BST-TS.................................................... –0.3V to 15V
VCC......................................................... –0.3V to 15V
TS Voltage................................................... –6V to 150V
BST, SNS+ and SNS– Voltages ................. –0.3V to 150V
SNS+ – SNS– ......................................... –0.3V to +0.3V
INP Voltage.................................................... –6V to 15V
Driver Outputs TGUP, TGDN................................(Note 7)
TIMER, FAULT, Voltages.............................. –0.3V to 15V
VCCUV Voltage................................................. –0.3 to 6V
RUN Voltage (LTC7000)............................ –0.3V to 150V
ISET, IMON, OVLO Voltages (LTC7000)........... –0.3V to 6V
Operating Junction Temperature Range (Notes 2, 3, 4)
LTC7000E, LTC7000E-1, LTC7000I,
LTC7000I-1......................................... –40°C to 125°C
LTC7000H, LTC7000H-1..................... –40°C to 150°C
LTC7000MP, LTC7000MP-1................ –55°C to 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MSOP Package.................................................. 300°C
Pin Configuration
LTC7000
LTC7000-1
TOP VIEW
RUN 1
VIN 2
VCC 3
VCCUV 4
FAULT 5
TIMER 6
INP 7
OVLO 8
17
GND
16
15
14
13
12
11
10
9
SNS+
SNS–
BST
TS
TGUP
TGDN
IMON
ISET
TOP VIEW
16 SNS+
VIN 1
VCC 3
VCCUV
FAULT
TIMER
INP
5
6
7
8
17
GND
14 SNS–
12
11
10
9
BST
TS
TGUP
TGDN
MSE PACKAGE
16-LEAD PLASTIC MSOP
(NOTE 6)
MSE PACKAGE
VARIATION: MSE16 (12)
16-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 45°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
TJMAX = 150°C, θJA = 45°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
Order Information
http://www.linear.com/product/LTC7000#orderinfo
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC7000EMSE#PBF
LTC7000EMSE#TRPBF
7000
16-Lead Plastic MSOP
–40°C to 125°C
LTC7000IMSE#PBF
LTC7000IMSE#TRPBF
7000
16-Lead Plastic MSOP
–40°C to 125°C
LTC7000HMSE#PBF
LTC7000HMSE#TRPBF
7000
16-Lead Plastic MSOP
–40°C to 150°C
LTC7000MPMSE#PBF
LTC7000MPMSE#TRPBF
7000
16-Lead Plastic MSOP
–55°C to 150°C
LTC7000EMSE-1#PBF
LTC7000EMSE-1#TRPBF
7000-1
16-Lead Plastic MSOP
–40°C to 125°C
LTC7000IMSE-1#PBF
LTC7000IMSE-1#TRPBF
7000-1
16-Lead Plastic MSOP
–40°C to 125°C
LTC7000HMSE-1#PBF
LTC7000HMSE-1#TRPBF
7000-1
16-Lead Plastic MSOP
–40°C to 150°C
LTC7000MPMSE-1#PBF
LTC7000MPMSE-1#TRPBF 7000-1
16-Lead Plastic MSOP
–55°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *Temperature grades are identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
2
7000fa
For more information www.linear.com/LTC7000
LTC7000/LTC7000-1
Electrical Characteristics
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = VSNS+ = 10V, VCC = VBST = 10V, VTS = GND = 0V,
unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
3.5
150
V
0
135
V
3.5
150
V
85
60
3
µA
μA
μA
Input Supplies
VIN
Input Voltage Operating Range
TS Operating Voltage Range
VCC
UVLO
SNS+/– Input Voltage Range
Independent of VIN
Total Supply Current (Note 8)
ON Mode
Sleep Mode
Shutdown Mode
CVCC = 1µF, VBST-TS = 13V,
VINP = 4V, VRUN = 2V
VINP = 0.4V, VRUN = 2V
VRUN = 0V (LTC7000)
VIN DC Supply Current (Note 5)
ON Mode
Sleep Mode
Shutdown Mode
CVCC = 1µF, VBST-TS = 13V,
VINP = 4V, VRUN = 2V
VINP = 0.4V, VRUN = 2V
VRUN = 0V (LTC7000)
35
25
1
µA
μA
μA
SNS+ Current
VINP = 4V, VRUN = 2V
VINP = 0.4V, VRUN = 2V
VRUN = 0V (LTC7000)
21
12
0
µA
μA
μA
SNS– Current
VINP = 4V, VRUN = 2V
VINP = 0.4V, VRUN = 2V
VRUN = 0V (LTC7000)
4
0
0
60
37
1
l
l
6
µA
μA
μA
VCC LDO Output Voltage
CVCC = 1µF, VIN = 12V
10
V
VCC LDO Dropout Voltage (VIN-VCC)
VIN = 6V, IVCC = –1mA
0.2
V
VCC Undervoltage Lockout
VCCUV = OPEN, VIN = VCC
VCC Rising
VCC Falling
Hysteresis
VCCUV = 0V, VIN = VCC
VCC Rising
VCC Falling
Hysteresis
VCCUV = 1.5V, VIN = VCC
VCC Rising
VCC Falling
Hysteresis
l
l
6.5
5.8
7.0
6.4
600
7.5
6.9
V
V
mV
l
l
3.1
2.8
3.5
3.2
300
3.7
3.4
V
V
mV
9.7
9.1
10.5
9.9
600
10.9
10.3
V
V
mV
14
14
14
Bootstrapped Supply (BST-TS)
VBST-TS
VTG Above VTS with INP = 3V (DC)
VIN = VCC = VTS = 7V, IBST = 0µA
VIN = VCC = VTS = 10V, IBST = 0µA
VIN = VTS = 135V, IBST = 0µA
l
l
9
10
10
11
12
12
V
V
V
Charge Pump Output Current
VTS = 20V, VBST-TS = 10V
l
–15
–30
µA
BST-TS Floating UVLO
BST-TS Rising
BST-TS Falling
3.1
2.8
V
V
Output Gate Driver (TG)
TG Pull-Up Resistance
VIN = VBST = 12V
l
2.2
7
Ω
TG Pull-Down Resistance
VIN = VBST = 12V
l
1
4
Ω
tr
Output Rise Time
10% to 90%, CL = 1nF
10% to 90%, CL = 10nF
13
90
ns
ns
tf
Output Fall Time
10% to 90%, CL = 1nF
10% to 90%, CL = 10nF
13
40
ns
ns
tPLH
tPHL
Input to Output Propagation Delay
VINP Rising, CL = 1nF
VINP Falling, CL = 1nF
l
l
35
35
70
70
ns
ns
7000fa
For more information www.linear.com/LTC7000
3
LTC7000/LTC7000-1
Electrical Characteristics
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = VSNS+ = 10V, VCC = VBST = 10V, VTS = GND = 0V,
unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
1.7
1.3
2
1.6
400
2.2
1.8
1.16
1.05
1.21
1.10
110
1.26
1.15
V
V
mV
–100
0
100
nA
1.25
1.3
1.35
V
75
100
125
mV
Operation
VIH
VIL
Input Threshold Voltages
VINP Rising
VINP Falling
Hysteresis
l
l
V
V
mV
Input Pull-Down Resistance
VINP = 1V
RUN and OVLO Pin Threshold Voltages
Rising
Falling
Hysteresis
RUN and OVLO Leakage Current
VRUN = 1.3V, VOVLO = 1.3V
TIMER Threshold Voltage
VTIMER Rising to VFAULT Going Low
TIMER Early Warning Voltage
VFAULT Going Low to (TG-TS) Going Low
TIMER Pin Fault Pull-Up Current
VTIMER = 1.0V, ISET = OPEN
l
–115
–100
–80
µA
TIMER Pin Pull-Down Current
VTIMER = 0.6V ISET = OPEN
ΔVSNS = 0mV
l
2.0
2.5
3.0
µA
FAULT Output Low Voltage
IFAULT = 1mA
l
0.2
0.5
V
FAULT Leakage Current
VFAULT = 5V
l
–100
0
100
nA
ΔVTH
Current Sense Threshold Voltage
∆VSNS = (VSNS+ – VSNS–)
ISET = OPEN or LTC7000-1
VISET = 1.2V (LTC7000 Only)
VISET = 0V (LTC7000 Only)
l
22
54
15
30
60
20
36
64
24
mV
D
Retry Duty Cycle
∆VSNS = 200mV
CTIMER = 1nF
l
0.06
0.1
%
ISET (LTC7000 Only) and VCCUV Pull-Up Current
VISET = 1.0V, VCCUV = 1.0V
IMON Output Voltage (LTC7000 Only)
ΔVSNS = 60mV, VTIMER = 0V, VINP = 3.5V
ΔVSNS = 30mV, VTIMER = 0V, VINP = 3.5V
Over-Current to TG Low Propagation Delay
ΔVSNS Step 10mV to 50mV, ISET = OPEN,
VTIMER = VCC, VINP = 3.5V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC7000/LTC7000-1 is tested under pulsed load conditions
such that TJ ≈ TA. The LTC7000E/LTC7000E-1 is guaranteed to meet
performance specifications from 0°C to 85°C. Specifications over the
–40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC7000I/LTC7000I-1 is guaranteed over the –40°C to 125°C
operating junction temperature range, the LTC7000H/LTC7000H-1 is
guaranteed over the –40°C to 150°C operating junction temperature range
and the LTC7000MP/LTC7000MP-1 is tested and guaranteed over the
–55°C to 150°C operating junction temperature range.
High junction temperatures degrade operating lifetimes; operating lifetime is
derated for junction temperatures greater than 125°C. Note that the maximum
ambient temperature consistent with these specifications is determined by
specific operating conditions in conjunction with board layout, the rated
package thermal impedance and other environmental factors.
4
1
l
l
MΩ
–11.3
–10
–8.7
µA
1.12
1.2
0.6
1.28
V
V
70
ns
Note 3: The junction temperature (TJ, in °C) is calculated from the ambient
temperature (TA, in °C) and power dissipation (PD, in Watts) according to
the formula:
TJ = TA + (PD • θJA), where θJA is 45°C/W.
Note 4: This IC includes over temperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Operation above the specified absolute maximum operating junction
temperature may impair device reliability or permanently damage the
device.
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 6: For application concerned with pin creepage and clearance
distances at high voltages, the MSE16(12) variation package should be
used. See Applications Information.
Note 7: Do not apply a voltage or current source to these pins. They must
be connected to capacitive loads only; otherwise permanent damage may
occur.
Note 8: Total supply current is the sum of the current into the VIN, SNS+
and SNS– pins.
7000fa
For more information www.linear.com/LTC7000
LTC7000/LTC7000-1
Typical Performance Characteristics
Total Supply Current vs
VIN Voltage
100.0
80.0
TOTAL SUPPLY CURRENT (µA)
Driver On Resistance vs VBST-TS
Voltage
6
VBST–TS = 13V
VSNS+ = VIN
VCCUV = OPEN
VCCUV = 0V
TA = 25°C, unless otherwise noted.
VCCUV = 0V
Charge Pump No-Load Output
Voltage vs VTS
14
TGUP
TGDN
5
12
10
RDSON (Ω)
40.0
VBST - V TS (V)
4
60.0
3
2
SHUTDOWN
SLEEP
ON
0
0
30
60
90
VIN VOLTAGE (V)
120
150
1
2
0
0
VCC = 4V
6
11
5.0
12
15
7
5
3
–20
–40
IBST (µA)
–60
–80
–25.0
25°C
150°C
0
30
RUN and OVLO Threshold
Voltages vs Temperature
90
VTS (V)
8.0
15
7000 G03
40
30
20
120
ISET = 0V
ISET = OPEN
0
–50
150
0
ISET = 1.2V
ISET = 1.5V
50
100
TEMPERATURE (°C)
7000 G05
Driver On Resistance vs
Temperature
4
VCCUV = OPEN
VBST–TS = 12V
7.5
TGUP
TGDN
3
1.15
1.10
RISING
FALLING
0
50
100
TEMPERATURE (°C)
150
7000 G07
7.0
RESISTANCE (Ω)
VCCUV LOCKOUT (V)
THRESHOLD VOLTAGE (V)
150
7000 G06
1.20
1.05
–50
20
50
VCCUV Lockout vs Temperature
1.25
10
VTS (V)
60
10
60
7000 G04
5
70
–15.0
–45.0
0
∆VTH vs Temperature
VCC = 7V
VBST-TS = 10V
1
IBST = 0µA
80
–35.0
0
VCC = 4V
VCC = 5V
VCC = 6V
VCC = 7V
VCC ≥ 8V
7000 G02
–5.0
IBST (µA)
9
–1
9
VBST-TS (V)
Charge Pump Output Current
vs VTS
VTS = 4V
VTS = 6V
VTS = 8V
VTS = 10V
VTS = 12V
13
VBST-VTS (V)
3
7000 G01
Charge Pump Load Regulation
15
6
4
CURRENT SENSE
THRESHOLD VOLTAGE (mV)
20.0
8
6.5
6.0
2
1
5.5
5.0
–50
RISING
FALLING
0
50
100
TEMPERATURE (°C)
150
7000 G08
0
–50
0
50
100
TEMPERATURE (°C)
150
7000 G09
7000fa
For more information www.linear.com/LTC7000
5
LTC7000/LTC7000-1
Typical Performance Characteristics
SNS+ Supply Current vs
Temperature
VIN Supply Current vs
Temperature
35
30
VIN = 10V
30
6.0
VIN = VSNS+ = VSNS– = 10V
20
CURRENT (µA)
25
CURRENT (µA)
SNS– Supply Current vs
Temperature
20
15
10
5
0
–50
0
50
100
TEMPERATURE (°C)
10
0
SHUTDOWN
SLEEP
ON
SHUTDOWN
SLEEP
ON
0
50
100
TEMPERATURE (°C)
7000 G10
–2.0
–50
150
SHUTDOWN, SLEEP
ON
0
50
100
TEMPERATURE (°C)
7000 G11
VIN = 10V
150
7000 G12
SNS+ FAULT Threshold vs
Temperature
Input Threshold Voltage vs
Temperature
3.0
2.0
0
–10
–50
150
VIN = VSNS+ = VSNS– = 10V
4.0
CURRENT (µA)
40
TA = 25°C, unless otherwise noted.
Overcurrent to TGDN = LOW
Delay Time vs Temperature
3.4
22
3.3
21
CTIMER = 1nF
2.0
1.5
1.0
0.5
0
–50
RISING
FALLING
0
50
100
TEMPERATURE (°C)
TIME (µs)
THRESHOLD VOLTAGE (V)
THRESHOLD VOLTAGE (V)
2.5
3.2
3.1
19
3.0
–50
150
RISING
FALLING
0
50
100
TEMPERATURE (°C)
7000 G13
–9.0
150
7000 G16
3.5
PULL–UP CURRENT (µA)
THRESHOLD VOLTAGE (V)
DUTY CYCLE (%)
0.065
6
150
VISET = 1.0V (LTC7000 ONLY)
VVCCUV = 1.0V
0.070
50
100
TEMPERATURE (°C)
50
100
TEMPERATURE (°C)
ISET and VCCUV Pull-Up Current vs
Temperature
4.0
0.075
0
0
7000 G15
VBST-TS Floating UVLO Voltage vs
Temperature
CTIMER = 1nF
0.060
–50
18
–50
150
7000 G15
Retry Duty Cycle vs Temperature
0.080
20
3.0
2.5
2.0
–50
RISING
FALLING
0
50
100
TEMPERATURE (°C)
150
7000 G17
–9.5
–10.0
–10.5
–11.0
–50
0
50
100
TEMPERATURE (°C)
150
7000 G18
7000fa
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LTC7000/LTC7000-1
Pin Functions
(LTC7000/LTC7000-1)
RUN (Pin 1/NA): Run Control Input. A voltage on this pin
above 1.2V enables normal operation. Forcing this pin
below 0.7V shuts down the LTC7000, reducing quiescent
current to approximately 1µA. Optionally connect to the
input supply through a resistive divider to set the undervoltage lockout.
VIN (Pin 2/Pin 1): Main Supply Pin. A bypass capacitor
with a minimum value of 0.1µF should be tied between
this pin and GND.
VCC (Pin 3/Pin 3): Output of internal LDO and power
supply for gate drivers and internal circuitry. Decouple
this pin to GND with a minimum 1.0µF low ESR ceramic
capacitor. Do not use the VCC pin for any other purpose.
VCC can be overdriven from an external high efficiency
source for high frequency switching applications that
require higher power delivered to the external MOSFET.
Do not connect VCC to a voltage greater than VIN.
VCCUV (Pin 4/Pin 5): VCC Supply Undervoltage Lockout.
A resistor on this pin sets the reference for the Gate Drive
undervoltage lockout. The voltage on this pin in the range
of 0.4V to 1.5V is multiplied by 7 to be the undervoltage
lockout for the Gate Drive (VCC pin). Short to ground to
set the minimum gate drive UVLO of 3.5V. Leave open to
set gate drive UVLO to 7.0V
FAULT (Pin 5/Pin 6): Open Drain Fault Output. This pin
pulls low after the voltage on the TIMER pin has reached
the fault threshold of 1.3V. It indicates the pass transistor
is about to turn off due to an overcurrent condition. The
typical pull-down impedance is 200Ω. The FAULT pin does
not go to a high-impedance state until the overcurrent
condition and the TIMER cooldown period expire. If the
TIMER pin is pulled above 3.5V, the TIMER function is
disabled. In this state this pin pulls low when the VTGUP-TS
signal is driven high.
TIMER (Pin 6/Pin 7): Fault Timer Input. A timing capacitor, CT, from the TIMER pin to GND sets the times for fault
warning, fault turn off and retry periods (see Applications
Information). When the TIMER pin is connected to a
voltage higher than 3.5V, an overcurrent condition will
immediately pull the TGDN pin to TS. TGUP will not go
high again until the fault condition is reset by the INP pin
going low and then back high.
INP (Pin 7/Pin 8): Input Signal. CMOS compatible input
reference to GND that sets the state of TGDN and TGUP
pins (see Applications Information). INP has an internal
1MΩ pull-down to GND to keep TGDN pulled to TS during
startup transients.
OVLO (Pin 8/NA): Overvoltage Lockout Input. Connect
to the input supply through a resistor divider to set the
overvoltage lockout level. A voltage on this pin above
1.21V causes TGDN to be pulled to TS. Normal operation
resumes when the voltage on this pin decreases below
1.11V. Triggering an OVLO causes a fault condition. OVLO
should be tied to GND when not used.
ISET (Pin 9/NA): Current Trip Threshold Set. A resistor
on this pin to GND sets the peak current threshold. The
voltage on this pin (internally clamped between 0.4V and
1.5V) is divided by 20 to be the current comparator reference. Short to GND for minimum peak current (20mV
ΔVTH). Leave open for an accurate peak current (30mV
ΔVTH).
IMON (Pin 10/NA): Current Monitor. The voltage on this
pin with respect to GND represents the voltage across
the sense resistor multiplied by 20. The range on this pin
is 0V to 1.5V.
TGDN (Pin 11/Pin 9): High Current Gate Driver Pull-Down.
This pin pulls down to TS. For the fastest turn-off, tie this
pin directly to the gate of the external high side MOSFET.
TGUP (Pin 12/Pin 10): High Current Gate Driver Pull-Up.
This pin pulls up to BST. Tie this pin to TGDN for maximum gate drive transition speed. A resistor can be
connected between this pin and the gate of the external
MOSFET to control the in-rush current during turn-on.
See Applications Information.
TS (Pin 13/Pin 11): Top (High Side) source connection or
GND if used in ground referenced applications.
BST (Pin 14/Pin 12): High Side Bootstrapped Supply. An
external capacitor with a minimum value of 0.1µF should
be tied between this pin and TS. Voltage swing on this pin
is 12V to (VIN + 12V).
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7
LTC7000/LTC7000-1
Pin Functions
SNS– (Pin 15/Pin 14), SNS+ (Pin 16/Pin 16): Current
Sense Comparator Input. Place a sense resistor in
series with the drain of the external MOSFET to set the
peak current. The SNS– pin is connected to the drain
side of the sense resistor. Use a Kelvin connection
from the SNS+ and SNS– pins to the sense resistor.
The current comparator trip threshold voltage, ΔVTH is
8
the ISET voltage divided by 20. The trip threshold is internally clamped to a minimum of 20mV and a maximum
of 75mV. If ISET is open or greater than 2.0V, ΔVTH is set
internally to 30mV.
GND (Exposed Pad Pin 17): Ground. The exposed pad
must be soldered to the PCB for rated electrical and thermal performance.
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LTC7000/LTC7000-1
Block Diagram
3.5V TO 135V
2
9
VIN
10
IMON
ISET
2.3V
1.0V
3
–
+
100k
10µA
/20
VCC
CVCC
+
20x
–
20mV TO 75mV
SNS+
SNS–
+
–
9R
16
RSNS
15
VCC
BST
R
D1
(OPTIONAL)
14
PCH
TGUP
LEVEL
SHIFT
UP
CHARGE
PUMP
TGDN
CBST
12
M1
11
NCH
TS
SNS+
2.3V
3.2V
10µA
4
1
VCCUV
RUN
1.21V
8
7
OVLO
INP
1M
+
–
LEVEL
SHIFT
DOWN
+
–
2.3V
+
–
FAULT
13
LOAD
5
200Ω
102.5µA/5µA
LOGIC
+
–
TIMER
+
–
3.5V
1.4V
1.3V
0.4V
6
CT
2.5µA
7000 BD
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9
LTC7000/LTC7000-1
Timing Diagram
INPUT RISE/FALL TIME < 10ns
INPUT (INP)
VIH
VIL
90%
10%
OUTPUT (TG-TS)
tPLH
tr
tPHL
tf
7000 TD
Operation
(Refer to Block Diagram)
The LTC7000/LTC7000-1 is designed to receive a groundreferenced, low voltage digital input signal, INP and
quickly drive and protect a high side N-channel power
MOSFET whose drain can be up to 150V above ground.
The LTC7000/LTC7000-1 is capable of driving a 1nF load
using a 12V bootstrapped supply voltage (VBST –V TS) with
35ns of propagation delay and fast rise/fall times. The
high gate drive voltage reduces external power losses
associated with external MOSFET on-resistance. The
strong drivers not only provide fast turn on and off times
but hold the TGUP and TGDN to TS voltages in the desired
state in the presence of high slew rate transients which
can occur driving inductive loads at high voltages.
Overcurrent Protection
The LTC7000/LTC7000-1 protects a high side N-channel
MOSFET from an overcurrent condition by monitoring the
voltage across an external sense resistor placed in series
with the drain of an external MOSFET and forcing the
external MOSFET to turn off by pulling TGDN to TS when
the voltage across the sense resistor, ΔVSNS, exceeds
the current comparator threshold voltage, ΔV TH, after
a period of time set by the timing capacitor, CT. When
an overcurrent condition is detected with ISET open,
ΔV TH is internally programmed to a low value of 30mV
minimizing the external conduction loss associated with
current sensing by allowing the use of lower value sense
resistors. A resistor placed between ISET and ground
allows ΔV TH to be programmed from 20mV to 75mV.
10
An adjustable fault and overcurrent timer is enabled by
placing a capacitor, C T from the TIMER pin to ground
and allows the load to continue functioning during
brief overcurrent transient events while protecting the
MOSFET from long periods of high currents. An external
fault flag is available which can warn of an impending
MOSFET turn off. A fast turn-off mode where TGDN
is immediately pulled to TS due to an overcurrent is
available by connecting the TIMER pin to VCC.
Current Monitor (LTC7000 Only)
The LTC7000 provides an output voltage referenced to
ground on the IMON pin that reflects the current flowing
through the external sense resistor connected between
SNS+ and SNS– while TGUP is high. The voltage on IMON
is the voltage difference between the SNS+ and SNS– pins
multiplied by 20x and referenced to ground with a range
of 0V to 1.5V. The IMON output voltage has an output
impedance of 100kΩ and is pulled to ground with a
100kΩ resistor when INP is low.
VCC Power
Power for the MOSFET driver and internal circuitry is
derived from the VCC pin. The VCC pin voltage is generated from an internal P-channel LDO connected to VIN.
VCC can also be overdriven from a high efficiency external source for high frequency switching applications that
require higher power delivered to external MOSFET. VCC
should never be driven higher than VIN or permanent
damage to the LTC7000/LTC7000-1 could occur.
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LTC7000/LTC7000-1
Operation
(Refer to Block Diagram)
Internal Charge Pump
The LTC7000/LTC7000-1 contains an internal charge
pump that enables the MOSFET gate drive to have 100%
duty cycle. The charge pump regulates the BST-TS voltage to 12V reducing external power losses associated
with external MOSFET on-resistance. The charge pump
uses the higher voltage of TS or VCC as the source for
the charge.
Start-Up and Shutdown
If the voltage on the RUN pin (LTC7000 only) is less than
0.7V, the LTC7000 enters a shutdown mode in which all
internal circuitry is disabled, reducing the DC supply current to approximately 1µA. When the voltage on the RUN
pin exceeds 0.7V, the internal LDO connected to VIN is
enabled and regulates VCC to 10V. At VIN voltages less
than 10V, the LDO will operate in drop-out and VCC will
follow VIN. When the voltage on the RUN pin exceeds
1.21V, the input circuitry is enabled allowing TGUP and
TGDN to be driven high with respect to TS. The LTC7000-1
does not include the RUN pin. The internal LDO connected
to VIN and the input circuitry for the LTC7000-1 become
enabled when VIN is higher than 3.5V.
LTC7000/LTC7000-1 incorporates an overtemperature
shutdown feature. If the junction temperature reaches
approximately 180°C, the LTC7000/LTC7000-1 will enter
thermal shutdown mode and TGDN will be pulled to TS.
After the part has cooled below 160°C, TGDN will be
allowed to go back high. The overtemperature level is
not production tested. The LTC7000/LTC7000-1 is guaranteed to start a temperatures below 150°C.
The LTC7000/LTC7000-1 additionally implements protection features which prohibit TGUP being pulled to BST
when VIN, VCC or (VBST –V TS) are not within proper operating ranges. By using a resistive divider from VIN to ground
(LTC7000 only), the RUN and OVLO pins can serve as a
precise input supply overvoltage/undervoltage lockouts.
TGDN is pulled to TS when either RUN falls below 1.11V
or OVLO rises above 1.21V, which can be configured to
limit switching to a specific range on input supply voltages. Furthermore, if VIN falls below 3.5V, an internal
undervoltage detector pulls TGDN to TS.
Protection Circuitry
VCC contains an undervoltage lockout feature that will
pull TGDN to TS and is configured by the VCCUV pin. If
VCCUV is open, TGDN is pulled to TS until VCC is greater
than 7.0V. By using a resistor from VCCUV to ground, the
rising undervoltage lockout on VCC can be adjusted from
3.5V to 10.5V.
When using the LTC7000/LTC7000-1, care must be taken
not to exceed any of the ratings specified in the Absolute
Maximum Ratings section. As an added safeguard, the
An additional internal undervoltage lockout is included
that will pull TGDN to TS when the floating voltage from
BST to TS is less than 3.1V (typical).
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11
LTC7000/LTC7000-1
Applications Information
Input Stage
LTC7000/LTC7000-1
The LTC7000/LTC7000-1 employs CMOS compatible
input thresholds that allow a low voltage digital signal
connected to INP to drive standard power MOSFETs.
The LTC7000/LTC7000-1 contains an internal voltage
regulator which biases the input buffer connected to INP
allowing the input thresholds (VIH = 2.0V, VIL = 1.6V) to be
independent of variations in VCC. The 400mV hysteresis
between VIH and VIL eliminates false triggering due to
noise events. However, care should be taken to keep INP
from any noise pickup, especially in high frequency, high
voltage applications.
INP also contains an internal 1MΩ pull-down resistor
to ground, keeping TGDN pulled to TS during startup
and other unknown transient events. During shutdown
(VRUN<0.7V) the internal 1MΩ pull-down resistor is disabled and INP becomes high impedance.
INP has an Absolute Maximum of –6V to +15V which
allows the signal driving INP to have voltage excursions
outside the normal power supply and ground range. It is
not uncommon for signals routed with long PCB traces
and driven with fast rise/fall times to inductively ring to
voltages higher than power supply or lower than ground.
Output Stage
A simplified version of the LTC7000/LTC7000-1 output
stage is shown in Figure 1. The pull-down device is an
N-channel MOSFET with a typical 1Ω RDS(ON) and the
pull-up device is a P-channel MOSFET with a typical 2.2Ω
RDS(ON). The pull-up and pull-down pins have been separated to allow the turn-on transient to be controlled while
maintaining a fast turn-off.
The LTC7000/LTC7000-1 powerful output stage (1Ω pulldown and 2.2Ω pull-up) minimizes transition losses when
driving external MOSFETs and keeps the MOSFET in the
state commanded by INP even if high voltage and high
frequency transients couple from the power MOSFET back
to the driving circuitry.
The large gate drive voltage on TGUP and TGDN reduces
conduction losses in the external MOSFET because
RDS(ON) is inversely proportional to its gate overdrive
(VGS – VTH).
12
BST
12V
+
AV = 1
–
+
–
CHARGE
PUMP
VCC
2.2Ω
TGUP
TGDN
30µA
1Ω
INP
HIGH
SPEED
150V
LEVEL
SHIFTER
TS
7000 F01
Figure 1. Simplified Output Stage
SNS+ and SNS– Pins
SNS+ and SNS– are the inputs to the high side current
comparator and current monitor. The common mode
operational voltage range for these pins is 3.5V to 150V
independent of any other voltages. SNS+ also provides
power to the current comparator and current monitor
and draws approximately 21µA when not shut down and
INP is high. SNS– draws a bias current of approximately
4µA when not shut down and INP is high. When SNS+
is less than 3.2V typical (3.5V minimum), a fault condition occurs and the adjustable fault timer is enabled with
the same behavior as an overcurrent fault. Normally the
SNS pins are connected to the drain side of the external
MOSFET. However, the SNS pins can be connected to the
source side of the external MOSFET as long as the source
voltage rises above 3.5V before the Fault Timer expires.
See Fault Timer and Fault Flag section.
ISET Pin (LTC7000 Only)
The current comparator has an adjustable threshold
voltage, ΔVTH, of 20mV to 75mV and is set by placing a
resistor to ground on the ISET pin. The ISET pin is biased
with an internal 10µA current source. Floating ISET
enables the current comparator to have an accurate 30mV
threshold voltage which allows for lower value sense
resistors and reduces the external power dissipation.
By placing a 40kΩ to 150kΩ resistor between ISET and
ground, the sense threshold voltage can be programmed
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LTC7000/LTC7000-1
Applications Information
to values between 20mV and 75mV. The value of resistor
for a particular sense threshold voltage can be selected
using Figure 2 or the following equation:
RISET =
Δ VTH
0.5µA
Where 20mV< ΔVTH < 75mV.
CURRENT SENSE THRESHOLD ∆VTH (mV)
80
70
60
50
40
TOVER _ CURRENT =
30
1.4V • CTIMER
+ 1.5µs
100µA
The warning time, TWARNING, generated by an overcurrent
event is given by the following equation:
20
10
0
is turned off during an overcurrent fault condition. The
same capacitor also sets the cooldown period before the
external MOSFET is allowed to turn back on. Once a fault
condition is detected, a 100µA current charges the TIMER
pin. When the voltage on the TIMER pin reaches 1.3V, the
FAULT pin pulls low to indicate the detection of a fault
condition and provide warning of an impending power
loss. After the TIMER voltage crosses the 1.4V threshold, TGDN is immediately pulled to TS turning off the
external MOSFET. The on-time of the external MOSFET,
TOVER_CURRENT, during an overcurrent event is given by
the following equation:
0
TWARNING =
30 60 90 120 150 180 210 240
ISET RESISTOR TO GROUND (kΩ)
7000 F02
Figure 2. RISET Selection
Optional filtering can be placed in series with the SNS– pin
as shown in Figure 3. Note that the SNS– pin takes 4µA
of bias current which will affect the current sense and
current monitoring functions. The value of RFLT needs to
be less than 250Ω to keep current sensing error less than
1mV due to the bias current associated with SNS– pin.
POWER
LTC7000/
LTC7000-1
SNS+
CFLT
SNS–
INP = LO, 0µA
INP = HI, 4µA
RFLT
RSNS
M1
TGUP
TGDN
TS
7000 F03
0.1V • CTIMER
+ 1.5µs
100µA
If the overcurrent fault condition disappears before
TIMER has reached 1.4V, TIMER is discharged by a
2.5µA current. If TIMER had reached 1.3V (FAULT has
gone low) and the overcurrent fault condition disappears,
TIMER is discharged with a 2.5µA current and FAULT will
be reset when TIMER reaches 0.4V. The on-time and
warning times are shown graphically in Figure 4.
VTMR (V)
1.4
1.3
LOAD
Figure 3. Sense Pins Filtering
Fault Timer and Fault Flag
TIME
The LTC7000/LTC7000-1 includes an adjustable fault
timer. Connecting a capacitor from the TIMER pin to
ground sets the delay period before the external MOSFET
TFAULT
13ms/µF
TWARNING
1ms/µF
TOVER_CURRENT
14ms/µF
7000 F04
Figure 4. Fault Timer Trip Points
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13
LTC7000/LTC7000-1
Applications Information
Cooldown Period and Restart
As soon as TIMER reaches 1.4V, TGDN is pulled to TS in an
overcurrent fault condition and the TIMER pin starts discharging with a 2.5µA current. When TIMER reaches 0.4V,
TIMER charges with a 2.5µA current. When TIMER reaches
1.4V, it starts discharging again with a 2.5µA current. This
pattern repeats 32 times to form a long cooldown timer
period (TCOOL_DOWN) before retry (Figure 5).
If INP is cycled low, TGDN will be pulled to TS and TIMER
will be pulled low with an internal 100kΩ resistor. If INP is
cycled low during the cooldown period, the timer counter
will be reset. If INP then goes high, TGUP will pulled to
BST and the fault timer will be reactivated with the TIMER
voltage starting from it’s current value.
At the end of the cooldown period (when TIMER drops
below 0.4V for the 32nd time), the LTC7000/LTC7000-1
retries, pulling TGUP to BST and turning on the external
MOSFET. The FAULT pin will then go to a high impedance
state. The total cooldown timer period is given by:
The retry duty cycle in percent is to a first order independent of CT and is defined by:
D=
100 • TOVER _ CURRENT
TOVER _ CURRENT + TCOOL _ DOWN
To defeat the automatic retry, place a 100kΩ resistor in
parallel with the TIMER capacitor. Note that the time to
turn off from an overcurrent fault will be increased by 7%
and the FAULT pin will remain low indicating a fault has
occurred. To get the LTC7000/LTC7000-1 to retry and to
clear the fault flag the INP signal needs to cycle low then
back high.
Typical turn-off times and cooldown periods for some
standard value timer capacitors are shown Table 1:
Table 1. Fault Time for Typical Capacitors
63 • 1.0V • CTIMER
TCOOL _ DOWN =
2.5µA
CTIMER
TOVER_CURRENT
TCOOL_DOWN
Retry Duty Cycle
(nF)
(µs)
(s)
%
<0.1
~3
0.0005
~0.6
1
16
0.025
0.06
10
142
0.250
0.06
100
1402
2.500
0.06
>30mV
<30mV
∆VSNS
1.40V
1.30V
TIMER
0.4V
1ST
2ND
31ST
32ND
FAULT
V(TG-TS)
(TGUP SHORTED TO TGDN)
7000 F05
INP
COOLDOWN PERIOD (TCOOL_DOWN)
Figure 5. Auto Retry Cool-Down Timer Cycle
14
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LTC7000/LTC7000-1
Applications Information
>30mV
>30mV
<30mV
∆VSNS
1.40V
1.30V
TIMER
0.4V
1ST
1ST
31ST
32ND
FAULT
V(TG-TS)
(TGUP SHORTED TO TGDN)
7000 F06
INP
Figure 6. Auto Retry with INP Cycling Low
Fast Turn-Off Mode
If the TIMER pin is connected to VCC or any other supply
greater than 3.5V (abs max 15V), an overcurrent event
will immediately pull TGDN to TS and the LTC7000/
LTC7000-1 will remain there until the INP signal has
cycled low and then back high. In fast turn-off mode, the
typical delay from a ΔVSNS overcurrent step to TG going
low is around 70ns, so very fast short-circuit events can
be detected. Also, when the TIMER pin is connected to a
voltage greater than 3.5V, the FAULT signal is redefined to
be the inverse state of the high side pull-up (VTGUP – VTS).
The FAULT signal can be used in this application as lowvoltage digital information that has been level shifted
down from the high side MOSFET. An application for this
could include using this signal to wait until VTGUP–VTS has
gone low before turning on a redundant power MOSFET.
High Side Current Monitor Output (LTC7000 Only)
The LTC7000 contains a high side current monitor output.
The high side differential voltage sensed across the SNS+
and SNS– pins (ΔVSNS) is multiplied by 20 and ground
referenced on the IMON pin which makes it suitable for
monitoring and regulating the MOSFET current. The working range of IMON is 0V to 1.5V as ΔVSNS varies from 0mV
to 75mV. The IMON pin is a voltage output whose nominal
output impedance is 100kΩ and should not be resistively
loaded. The current monitor output is only available if the
INP signal is high, otherwise the IMON pin is pulled to
ground. A block diagram of the IMON circuit is shown in
Figure 7. The gm of the transimpedance amplifier tracks
the 100kΩ internal resistor to ground which makes variations over process minimal.
LTC7000
SNS+
SNS–
+
–
gm = 200µA/V
INP
IMON
100k
7000 F07
Figure 7. IMON Block diagram
RUN Pin and External Input Overvoltage/Undervoltage
Lockout (LTC7000 Only)
The RUN pin has two different threshold voltage levels.
Pulling RUN below 0.7V puts the LTC7000 into a low
quiescent current shutdown mode (IQ ~ 1µA). When
the RUN pin is greater than 1.20V, the part is enabled.
Figure 8 shows examples of configurations for driving
the RUN pin from logic.
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15
LTC7000/LTC7000-1
Applications Information
The RUN and OVLO pins can alternatively be configured
as precise undervoltage (UVLO) and overvoltage (OVLO)
lockouts on the VIN supply with a resistive divider
from VIN to ground. A simple resistive divider can be
used as shown in Figure 9 to meet specific VIN voltage
requirements. When RUN or OVLO is greater than 1.2V,
TGDN will be pulled to TS and the external MOSFET will
be turned off.
VIN
SUPPLY
R1
LTC7000
RUN
LTC7000
RUN
M2
7000 F08
Figure 8. RUN Pin Interface to Logic
VIN
RUN
LTC7000
OVLO
D5
R5
Similarly, for applications that do not require a precise
UVLO, the RUN pin can be tied to VIN. In this configuration, the UVLO threshold is limited by the internal VIN
UVLO thresholds as shown in the Electrical Characteristics
table. The resistor values for the OVLO can be computed
using the above equations with R3 = 0Ω.
Be aware that the OVLO pin cannot be allowed to exceed
its absolute maximum rating of 6V. To keep the voltage
on the OVLO pin from exceeding 6V, the following
relationship should be satisfied:
⎛
⎞
R5
VIN(MAX) • ⎜
⎟ < 6V
⎝ R3+R4+R5 ⎠
If the VIN(MAX) relationship for the OVLO pin cannot be
satisfied, an external 5V Zener diode should also be placed
from OVLO to ground in addition to any lockout setting
resistors.
R3
R4
For applications that do not need a precise external OVLO
the OVLO pin is required to be tied directly to ground.
The RUN pin in this type of application can be used as an
external UVLO using the above equations with R5 = 0Ω.
7000 F09
Bootstrapped Supply (BST-TS)
Figure 9. Adjustable UV and OV Lockout
The current that flows through the R3 – R4 – R5 divider
will directly add to the shutdown, sleep and active current
of the LTC7000, and care should be taken to minimize
the impact of this current on the overall current used by
the application circuit. Resistor values in the megaohm
range may be required to keep the impact of the quiescent
shutdown and sleep currents low. To pick resistor values,
the sum total of R3 + R4 + R5 (RTOTAL) should be chosen
first based on the allowable DC current that can be drawn
from VIN. The individual values of R3, R4 and R5 can then
be calculated from the following equations:
R5 = RTOTAL •
1.21V
Rising VIN OVLO Threshold
R4 = RTOTAL •
1.21V
– R5
Rising VIN UVLO Threshold
R3 = RTOTAL – R5 – R4
16
An external bootstrapped capacitor, CB, connected
between BST and TS supplies the gate drive voltage for
the MOSFET driver. The LTC7000/LTC7000-1 keeps the
BST-TS supply charged with an internal charge pump,
allowing for duty cycles up to 100%. When the high side
external MOSFET is to be turned on, the driver places
the CB voltage across the gate-source of the MOSFET.
This enhances the high side MOSFET and turns it on. The
source of the MOSFET, TS, rises to VIN and the BST pin
follows. With the high side MOSFET on, the BST voltage
is above the input supply; VBST = VIN + 12V. The boost
capacitor, CB, supplies the charge to turn on the external
MOSFET and needs to have at least 10 times the charge to
turn on the external MOSFET fully. The charge to turn on
the external MOSFET is referred to gate charge, QG, and
is typically specified in the external MOSFET data sheet.
Gate charge can range from 5nC to hundreds of nCs and is
influenced by the gate drive level and the type of external
MOSFET used. For most applications, a capacitor value
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LTC7000/LTC7000-1
Applications Information
of 0.1µF for CB will be sufficient. However, the following
relationship for CB should be maintained:
10 • External MOSFET QG
CB >
1V
The internal charge pump that charges the BST-TS supply
outputs approximately 30µA to the BST pin. If the time
to charge the external bootstrapped capacitor, CB from
initial power-up with the internal charge pump is not sufficient for the application, a low reverse leakage external
silicon diode, D1, with a reverse voltage rating greater
than VIN connected between VCC and BST should be used
as shown in Figure 10. An external silicon diode between
VCC and BST should be used if the following relationship
cannot be met:
BST diode required if
• 12V
C
power-up to INP going high < BST
≅ 40ms
30µA
LTC7000/
LTC7000-1
VCC
D1
CB
If the internal P-channel LDO is used to power VCC and an
external silicon diode is used between VCC and BST, care
must be taken not to switch an external MOSFET at too
high a frequency that can collapse the internal LDO. The
internal LDO can only supply 1mA with a 200mV drop-out.
In order to keep the internal LDO supply from collapsing
when an external silicon diode is used from VCC to BST,
the following relationship should be maintained:
7000 F10
Figure 10. External BST Diode
Another reason to use an external silicon diode between
VCC and BST is if the external MOSFET is switched at a
frequency so high that the BST-TS supply collapses. An
external silicon diode between VCC and BST should be
used if the following relationship cannot be met:
BST diode required
if switching frequency >
The VCC pin provides the power for the MOSFET gate
drivers and internal circuitry. The LTC7000/LTC7000-1
features an internal P-channel low dropout regulator
(LDO) that can supply power at VCC from the VIN supply
pin or VCC can be driven from an external power supply.
If the internal P-channel LDO is used to power VCC, it
must have a minimum 1.0µF low ESR ceramic capacitor to
ensure stability and should not be connected to any other
circuitry other than optionally biasing some pins on the
LTC7000/LTC7000-1 (FAULT, INP or TIMER).
Maximum switching
frequency with internal LDO<
BST
TS
VCC Generation
30µA
≅ 500Hz
2 • MOSFET QG
A Schottky diode should not be used between VCC and
BST, as the reverse leakage of the Schottky diode at hot
will be more current than the charge pump can overcome.
Some example silicon diodes with low leakage include:
• MMBD1501A - Fairchild Semiconductor
• CMPD3003 - Central Semiconductor
1mA
≅ 20kHz
2 • MOSFET QG
For higher gate charge applications, an external silicon
diode between VCC and BST should be used and VCC
can be driven from a high efficiency external supply. VCC
should never be driven higher than VIN or permanent
damage to the LTC7000/LTC7000-1 could occur.
VCC Undervoltage Comparator
The LTC7000/LTC7000-1 contains an adjustable
undervoltage lockout (UVLO) on the VCC voltage that
pulls TGDN to TS and can be easily programmed using a
resistor (RVCCUV) between the VCCUV pin and ground. The
voltage generated on VCCUV by RVCCUV and the internal
10µA current source set the VCC UVLO. The rising VCC
UVLO is internally limited within the range of 3.5V and
10.5V. If VCCUV is open the rising VCC UVLO is set internally
to 7.0V. The typical value of resistor for a particular rising
VCC UVLO can be selected using Figure 11 or the following
equation:
RVCCUV =
Rising VCC UVLO
70µA
7000fa
For more information www.linear.com/LTC7000
17
LTC7000/LTC7000-1
Applications Information
Limiting Inrush Current During Turn-On
Where 3.5V < Rising VCC UVLO < 10.5V.
11
10
9
VCC UVLO (V)
8
7
6
5
4
3
2
RISING VCC UVLO
FALLING VCC UVLO
1
0
0
30 60 90 120 150 180 210 240
VCCUV RESISTOR TO GROUND (kΩ)
7000 F11
Figure 11. VCCUV Resistor Selection
MOSFET Selection
The most important parameters in high voltage applications for MOSFET selection are the breakdown voltage
BVDSS, on-resistance RDS(ON) and the safe operating area,
SOA.
The MOSFET, when off, will see the full input range of the
input power supply plus any additional ringing than can
occur when driving inductive loads.
External conduction losses are minimized when using low
RDS(ON) MOSFETs. Since many high voltage MOSFETs
have higher threshold voltages (typical VTH ≥ 5V) and
RDS(ON) is directly related to the (VGS–VTH) of the MOSFET,
the LTC7000/LTC7000-1 maximum gate drive of greater
than 10V makes it an ideal solution to minimize external
conduction losses associated with external high voltage
MOSFETs.
SOA is specified in Typical Characteristic curves in power
N-channel MOSFET data sheets. The SOA curves show
the relationship between the voltages and current allowed
in a timed operation of a power MOSFET without causing
damage to the MOSFET. The overcurrent trip point (RSNS
and RISET) of the LTC7000/LTC7000-1 and TIMER capacitor should be chosen to stay within the SOA region of the
MOSFET selected for the application.
18
Driving large capacitive loads such as complex electrical
systems with large bypass capacitors should be powered
using the circuit shown in Figure 12. The pull-up gate
drive to the power MOSFET from TGUP is passed through
an RC delay network, RG and CG, which greatly reduces
the turn-on ramp rate of the MOSFET. Since the MOSFET
source voltage follows the gate voltage, the load is powered smoothly from ground. This dramatically reduces
the inrush current from the source supply and reduces
the transient ramp rate of the load allowing for slower
activation of sensitive electrical loads. The turn-off of the
MOSFET is not affected by the RC delay network as the
pull-down for the MOSFET gate is directly from the TGDN
pin. Note that the voltage rating on capacitor CG needs
to be the same or higher than the external MOSFET and
CLOAD.
Adding CG to the gate of the external MOSFET can cause
high frequency oscillation. A low power, low ohmic value
resistor (10Ω) should be placed in series with CG to
dampen the oscillations as shown in Figure 12 whenever
CG is used in an application. Alternatively, the low ohmic
value resistor can be placed in series with the gate of the
external MOSFET.
VIN
SNS+
LTC7000/
LTC7000-1
RSNS
SNS–
TGUP
TGDN
BST
TS
RG 100k
CB
1µF
7000 F12
10Ω
CG
0.047µF
CLOAD
100µF
LOAD
Figure 12. Powering Large Capacitive Loads
The values for RG and CG to limit the inrush current can
be calculated from the below equation:
IIN _ RUSH ≅
0.7 • 12V • CLOAD
RG • CG
7000fa
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LTC7000/LTC7000-1
Applications Information
For the values shown in Figure 12 the inrush current will be:
IIN _ RUSH ≅
0.7 • 12V • 100µF
≅ 180mA
100kΩ • 0.047µF
Correspondingly, the ramp rate at the load for the circuit
in Figure 12 is approximately:
Δ VLOAD 0.7 • 12V
≅
≅ 2V/ ms
ΔT
RG • CG
Reverse Input Protection
To protect the load from discharging back into VIN when
the external MOSFET is off and the VIN voltage drops
below the load voltage, two external N-channel MOSFETs
should be used and must be configured in a back-to-back
arrangement as shown in Figure 14. Dual N-channel
packages such as the Vishay/Siliconix Si7956DP are a
good choice for space saving designs.
VIN
When CG is added to the circuit in Figure 12, the value
of the bootstrap capacitor, CB, must be increased to be
able to supply the charge to both to MOSFET gate and
capacitor CG. The relationship for CB that needs to be
maintained when CG is used is given by:
LTC7000/
LTC7000-1
TGUP
INP
SNS+
RSNS
SNS–
7000 F13
M1B
Figure 14. Protecting Load from Voltage Drops on VIN
VIN
M1A
L1
TS
TS
LOAD
When turning off a power MOSFET that is connected to
an inductive load (inductor, long wire or complex load),
the TS pin can be pulled below ground until the current in
the inductive load has completely discharged. The TS pin
is tolerant of voltages down to –6V, however, an optional
Schottky diode with a voltage rating at least as high as the
load voltage should be connected between TS and ground
to prevent discharging the load through the TS pin of the
LTC7000/LTC7000-1. See Figure 13.
TGUP
M1A
TGDN
7000 F14
Optional Schottky Diode Usage on TS
TGDN
RSNS
SNS–
10 • MOSFET QG
CB >
+ 10 • CG
1V
LTC7000/
LTC7000-1
SNS+
LOAD
D2
Figure 13. Optional Schottky Diode Usage
Design Example
As a design example, consider a fast power supply switch
with the following specifications: VIN = VLOAD = 8V to
135V, ILOAD = 3A, Insertion Loss < 0.5W at room temp
with maximum load, output rise time with a 1µF load
is 1V/µs (1A inrush current) and a shorted load should
immediately turn off the MOSFET.
The first item to select is the N-channel MOSFET. The
IRF7815PBF is selected because it has sufficient breakdown
voltage (BVDSS_MIN = 150V), sufficient continuous current
rating for a 3A load (ID_MAX = 4.1A) and the on-resistance
is low enough (RDS(ON)_MAX = 43mΩ) to be able to meet
the power loss specification.
Examining the MOSFET data sheet, the VGS vs RDS(ON)
typical performance curve shows a sharp increase in
RDS(ON) as the MOSFET VGS gets below 8.0V. Since the
default VCC UVLO is 7.0V, a resistor (RVCCUV ) should be
placed between VCCUV and ground to increase the VCC
7000fa
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19
LTC7000/LTC7000-1
Applications Information
UVLO to 8.0V. The value of RVCCUV is calculated and
rounded to the nearest standard value as follows:
RVCCUV =
8.0V
= 113kΩ
70µA
The value of the current sense resistor, RSNS is calculated
next. The LTC7000-1 has a fixed current sense threshold,
ΔVTH, of 30mV typical and 22mV minimum. To provide
a minimum 3A load current, the minimum specified
ΔVTH = 22mV should be used for the RSNS calculation
below:
RSNS =
22mV
= 7.3mΩ
3A
The closest standard value is 7mΩ. The power dissipation
of RSNS is 63mW so choose a power rating of greater than
0.25W to provide adequate margin.
The next item to check is to make sure the insertion loss
specification is satisfied. The insertion loss is given by:
PLOSS = ILOAD 2 • RDS(ON)(MAX) +RSNS
(
)
= 3A 2 • (0.043Ω + 0.007Ω) = 0.45W
Which meets the design specification of less than 0.5W.
The fast output slew rate specification of 1V/µs into a 1µF
load can be met by placing a resistor, RG, in series with
the TGUP pin to the MOSFET gate, as well as connecting
TGDN and a capacitor, CG, to ground on the MOSFET
gate. The values of RG and TG can be calculated from the
following expression:
RG • CG ≅
0.7 • 12V
= 8.4µs
1V / µs
CG needs to have a voltage rating as high as the BVDSS
of the MOSFET. A good choice for CG is the AVX
06032C471KAT2A which has a value of 470pF and a voltage rating of 200V. RG is then calculated to be 17.8kΩ.
The bootstrap capacitor CB can be calculated from the
gate charge as specified in the MOSFET data sheet and
CG as follows:
10 • QG
10 • 30nC
+ 10 • CG =
+ 10 • 470pF
1V
1V
≅ 0.33µF
CB >
To meet the short-circuit specification, the TIMER pin
should be connected to VCC to enable immediate turn-off
(approximately 70ns) of the MOSFET in the case of an
overcurrent condition. If an overcurrent condition turns
off the MOSFET, it will not turn back on until the INP pin
has cycled low then back high.
The complete circuit is shown in Figure 15.
Turn–On Transient
VIN
8V TO 135V
SNS+
VIN
0.007Ω
VCC
1µF
SNS–
TIMER
FAULT
LTC7000-1
TGUP
TGDN
17.8k
INP
BST
VCCUV
113k
0.33µF
GND
IRF7815TRPBF
10Ω
CG
470pF
200V
TS
LOAD
8V TO 135V
1µF 3A CONTINUOUS MODE
VINP
5V/DIV
VIN = 135V
VLOAD
50V/DIV
IDMOSFET
1A/DIV
50µs/DIV
7000 F15b
7000 F15
Figure 15. Design Example
20
7000fa
For more information www.linear.com/LTC7000
LTC7000/LTC7000-1
Applications Information
PC Board Layout Considerations
1. Solder the exposed pad on the backside of the LTC7000/
LTC7000-1 packages directly to the ground plane of the
board.
2. Kelvin connect current sense resistor.
3. Limit the resistance of the TS trace, by making it short
and wide.
4. CB needs to be close to chip.
5. Always include an option in the PC board layout to
place a resistor in series with the gate of any external MOSFET. High frequency oscillations are design
dependent and having the option to add a series dampening resistor can save a design iteration of the PC
board.
Pin Creepage and Clearance
In some higher voltage applications, the MSE16 package
may not provide sufficient PC board trace clearance
between high and low voltage pins. In applications where
clearance is required, the LTC7000-1 in the MSE16(12)
package can be used. The MSE16(12) package has
removed pins between all the adjacent high voltage
and low voltage pins, providing 0.657mm clearance,
which will be sufficient for most applications. For more
information, refer to the printed circuit board design
standards described in IPC-2221 (www.ipc.org).
7000fa
For more information www.linear.com/LTC7000
21
LTC7000/LTC7000-1
Typical Applications
Protected Redundant Supply Switchover with Shoot Through Protection
0.003Ω
MAIN POWER
7V TO 135V
2×
BSC320N20NS3G
LOAD
10A CONTINUOUS
2×
BSC320N20NS3G
0.003Ω
1µF
10Ω
1nF
SNS+
VIN
RUN
SNS– TGDN
TGUP
TS
200k
LTC7000
BST
INP
FAULT
100k 1µF
GND
TIMER
OVLO
SNS+
VIN
RUN
NOTE: THE BACKUP PATH
WILL LATCH-OFF WITH AN
OVERCURRENT FAULT.
LTC7000
1µF
VCC
FAULT
VCCUV
IMON
ISET
TGDN SNS–
0.1µF
BST
6.98k
10Ω
10k
TGUP
TS
0.1µF
VCC
INP
TIMER
OVLO
1nF
VBACKUP
7V TO 135V
GND
VCCUV
IMON
ISET
7000 TA02
VLOAD vs Main Power Voltage
80
VMAIN Falling Through 33V
VBACKUP = 60V
VTG–TS
MAIN
10V/DIV
VLOAD (V)
70
VBACKUP = 60V
VTG–TS
MAIN
10V/DIV
VLOAD
20V/DIV
VLOAD
20V/DIV
50
40
40µs/DIV
0
10
20
30 40 50 60
MAIN POWER (V)
70
VBACKUP = 60V
VTG–TS
BACKUP
10V/DIV
VTG–TS
BACKUP
10V/DIV
60
30
VMAIN Rising Through 36V
7000 TA02c
2µs/DIV
7000 TA02d
80
7000 TA02b
22
7000fa
For more information www.linear.com/LTC7000
LTC7000/LTC7000-1
Typical Applications
High Side Switch with Input Overvoltage and Overcurrent Protection
VIN
3.5V TO 60V
(150V TOLERANT)
SNS+
VIN
RUN
OVLO
953k
19.6k
FAULT
1µF
100k
1nF
0.005Ω
LTC7000
VCC
TS
TIMER
OFF ON
INP
SNS–
TGUP
TGDN
BST
GND
BSC12DN20NS3G
0.1µF
ISET
IMON
VCCUV
LOAD
3.5V TO 60V
10A CONTINUOUS MAX
150k
7000 TA03a
High Side Switch with Overcurrent Protection and Fault Latchoff
VIN
3.5V TO 135V
SNS+
VIN
100k
1µF
RTIMER
10nF
0.04Ω
VCC
SNS–
FAULT
TIMER
LTC7000-1
TGUP
TGDN
BSC12DN20NS3G
BST
0.1µF
TS
OFF ON
INP
GND
VCCUV
LOAD
3.5V TO 135V
0.5A CONTINUOUS
7000 TA04a
RTIMER = OPEN
12Ω/100ms LOAD PULSE
RTIMER = 100k
12Ω/100mS LOAD PULSE
RLOAD
10kΩ/DIV
RLOAD
10kΩ/DIV
VLOAD
10V/DIV
VLOAD
10V/DIV
ILOAD
1A/DIV
ILOAD
1A/DIV
VTIMER
1A/DIV
VTIMER
1V/DIV
100ms/DIV
VIN = 12V
VINP = 4V
7000 TA04b
100ms/DIV
7000 TA04c
VIN = 12V
VINP = 4V
7000fa
For more information www.linear.com/LTC7000
23
LTC7000/LTC7000-1
Typical Applications
Average Current Trip
VIN
3.5V TO
135V
3.3V
D
VINP
Q
VIN
RUN
SNS+
INP
SNS–
TGUP
TGDN
RB
LTC7000
FAULT
Response to 1.2A Load Step
0.06Ω
ILOAD
1A/DIV
SI7738DP
VIMON
1V/DIV
BST
100k
0.1µF
VCC
VCCUV
TIMER
OVLO
1µF
TS
IMON
ISET
GND
VIN = 12V
VAMPOUT
2V/DIV
LOAD
3.5V TO 135V
<1A AVERAGE
VLOAD
10V/DIV
250ms/DIV
150k
7000 TA05b
500k
AMPOUT
3.3V
8
5
1
LTC1541
+
–
+
–
7
1µF
+
–
2
400k
3
0.1µF
6
1.2V
7000 TA05a
4
High Side Switch with Auto-Retry, Inrush Control and OVLO
7V TO 60V
(150V TOLERANT)
47µF
+ 1µF
590k
1µF
100k
RUN
VIN
SNS+
VCC
SNS–
VCCUV
TGUP
TGDN
FAULT
0.003Ω
LTC7000
12.1k
BST
INP
10Ω
IRFS4115PBF
GND
VINP
4V/DIV
VIN = 48V
VLOAD
20V/DIV
4.7µF
TS
TIMER
100nF
220k
0.47µF
OVLO
OFF ON
Turn-On Response
IMON
ISET
DFLS1150
LOAD
15mF
7V TO 60V
ILOAD
1A/DIV
200ms/DIV
7000 TA05b
7000 TA06
24
7000fa
For more information www.linear.com/LTC7000
LTC7000/LTC7000-1
Package Description
Please refer to http://www.linear.com/product/LTC7000#packaging for the most recent package drawings.
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev F)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
5.10
(.201)
MIN
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
8
1
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102 3.20 – 3.45
(.065 ±.004) (.126 – .136)
0.305 ±0.038
(.0120 ±.0015)
TYP
16
0.50
(.0197)
BSC
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.35
REF
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
9
NO MEASUREMENT PURPOSE
0.280 ±0.076
(.011 ±.003)
REF
16151413121110 9
DETAIL “A”
0° – 6° TYP
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
1234567 8
0.17 – 0.27
(.007 – .011)
TYP
0.50
NOTE:
(.0197)
1. DIMENSIONS IN MILLIMETER/(INCH)
BSC
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
0.86
(.034)
REF
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16) 0213 REV F
7000fa
For more information www.linear.com/LTC7000
25
LTC7000/LTC7000-1
Package Description
Please refer to http://www.linear.com/product/LTC7000#packaging for the most recent package drawings.
MSE Package
Variation: MSE16 (12)
16-Lead Plastic MSOP with 4 Pins Removed
Exposed Die Pad
(Reference LTC DWG # 05-08-1871 Rev D)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
5.10
(.201)
MIN
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
8
1
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102 3.20 – 3.45
(.065 ±.004) (.126 – .136)
16
0.305 ±0.038
(.0120 ±.0015)
TYP
0.50
(.0197)
1.0 BSC
(.039)
BSC
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.35
REF
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
9
NO MEASUREMENT PURPOSE
0.280 ±0.076
(.011 ±.003)
REF
16 14 121110 9
DETAIL “A”
0° – 6° TYP
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
1
3 567 8
1.0
(.039)
BSC
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
26
0.86
(.034)
REF
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16(12)) 0213 REV D
7000fa
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LTC7000/LTC7000-1
Revision History
REV
DATE
DESCRIPTION
A
07/17
Updated pin descriptions.
PAGE NUMBER
Modified Block Diagram.
7
8
Inserted paragraph.
11, 13
Modified equations.
13
Changed from 3.3V to 3.5V in Fast Turn-Off Mode paragraph, updated Table 1 numbers.
14
Changed to Zener from Schottky diode.
15
Schematic clarification.
22, 23
7000fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its information
circuits as described
herein will not infringe on existing patent rights.
For more
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27
LTC7000/LTC7000-1
Typical Application
Protected Motor Driver
VIN
40V TO 60V
(150V TOLERANT)
590k
SNS+
VIN
RUN
0.004Ω
6.04k
OVLO
12.1k
1nF
LTC7000
SNS–
TGUP
TGDN
TIMER
100k
86.6k
BSC12DN20NS3G
LOAD
40V TO 60V
8A CONTINUOUS MAX
TS
ISET
0.1µF
BST
VCCUV
BAS116L
PWM –20kHz
VS-12CWQ10FN
VCC
INP
IMON
100k
FAULT
GND
M
48V, 500W MOTOR
1µF
7000 TA07
Related Parts
PART NUMBER
DESCRIPTION
COMMENTS
LTC7001
Fast 150V High Side NMOS Static
Switch Driver
3.5V to 150V Operation, IQ = 35µA, Turn-On (CL = 1nF) = 35ns,
Internal Charge Pump
LTC4440/LTC4440-5/ High Speed, High Voltage High Side
LTC4440A-5
Gate Driver
Up to 100V Supply Voltage, 8V ≤ VCC ≤ 15V, 2.4A Peak Pull-Up/1.5Ω
Peak Pull-Down
LTC7138
High Efficiency, 150V 250mA/400mA Synchronous
Step-Down Regulator
Integrated Power MOSFETs, 4V ≤ VIN ≤ 150V, 0.8V ≤ VOUT ≤ VIN,
IQ = 12µA, MSOP-16 (12)
LTC7103
105V, 2.3A Low EMI Synchronous Step-Down Regulator
4.4V ≤ VIN ≤ 105V, 1V ≤ VOUT ≤ VIN, IQ = 2µA Fixed Frequency 200kHz
to 2MHz, 5mm x 6mm QFN
LTC7801
150V Low IQ, Synchronous Step-Down DC/DC Controller 4V ≤ VIN ≤ 140V, 150V abs max, 0.8V ≤ VOUT ≤ 60V, IQ = 40µA,
PLL Fixed Frequency 320kHz to 2.25MHz
LT1910
Protected High Side MOSFET Driver
8V to 48V Operation, ΔVSNS = 65mV, IQ = 110µA, Turn-On
(CL = 1nF) = 220µs, Internal Charge Pump
LTC4367
100V Overvoltage, Undervoltage and Reverse Supply
Protection
2.5V ≤ VIN ≤ 60V, VOUT Protection Up to 100V,
Reverse Protection to –40V, MSOP-8, 3mm × 3mm DFN-8
LTC4368
100V Overvoltage, Undervoltage and Revernse Protection 2.5V ≤ VIN ≤ 60V, VOUT Protection Up to 100V,
Reverse Protection to –40V, MSOP-8, 3mm × 3mm DFN-8
Controller with Bidirectional Circuit Breaker
LTC4364
Surge Stopper with Ideal Diode
4V to 80V Operation, ΔVSNS = 50mV, IQ = 425µA, Turn-On
(CL = 1nF) = 500µs, Internal Charge Pump
LTC7860
High Efficiency Switching Surge Stopper
4V to 60V Operation, ΔVSNS = 95mV, IQ = 370µA, PMOS Driver
LTC4231
Micropower Hot Swap Controller
2.7V to 36V Operation, ΔVSNS = 50mV, IQ = 4µA, Turn-On
(CL = 1nF) = 1ms, Internal Charge Pump
LTC3895
150V Low IQ, Synchronous Step-Down DC/DC Controller PLL Fixed Frequency 50kHz to 900kHz, 4V ≤ VIN ≤ 140V,
0.8V ≤ VOUT ≤ 60V, IQ = 40µA
LTC4380
Low Quiescent Current Surge Stopper
4V to 80V Operation, ΔVSNS = 50mV, IQ = 8µA, Turn-On = 5ms,
Internal Charge Pump
LTC3639
High Efficiency, 150V 100mA Synchronous Step-Down
Regulator
Integrated Power MOSFETs, 4V ≤ VIN ≤ 150V, 0.8V ≤ VOUT ≤ VIN,
IQ = 12µA, MSOP-16(12)
28
7000fa
LT 0717 REV A • PRINTED IN USA
For more information www.linear.com/LTC7000
www.linear.com/LTC7000
 LINEAR TECHNOLOGY CORPORATION 2017