ETC HPL1117-33G 1a low dropout fast response positive adjustable regulator and fixed 1.8v, 2.5v, 2.85v, 3.3v and 5v Datasheet

HPL1117
1A Low Dropout Fast Response Positive Adjustable Regulator and Fixed
1.8V, 2.5V, 2.85V, 3.3V and 5V
Features
General Description
•
•
•
The HPL1117 is a low dropout three-terminal adjustable regulators with 1A output current capability. In
order to obtain lower dropout voltage and faster transient response, which is critical for low voltage applications , the HPL1117 has been optimized. The
device is available in an adjustable version and fixed
output voltages of 1.8V, 2.5V, 2.85V, 3.3V and 5V.
The output available voltage range of an adjustable
version is from 1.25~10.7V with an input supply below 12V. Dropout voltage is guaranteed at a maximum of 1.3V at 1A. Current limit is trimmed to ensure
specified output current and controlled short-circuit
current. On-chip thermal limiting provides protection
against any combination of overload that would create excessive junction temperatures. The HPL1117
is available in the industry standard 3-pin TO-220, TO252, TO-263, and the low profile surface mount SOT223 power packages which can be used in applications where space is limited.
Guaranteed Output Voltage Accuracy within 2%
Fast Transient Response
Guaranteed Dropout Voltage at Multiple
Currents
•
•
•
•
•
•
•
Load Regulation : 0.1% Typ.
Line Regulation : 0.03% Typ.
Low Dropout Voltage : 1.1V Typ. at IOUT =1A
Current Limit : 1A Typ. at TJ=25°C
On-Chip Thermal Limiting : 150°C Typ.
Adjustable Output : 1.25~10.7V
Standard 3-pin TO-220, TO-252, TO-263 and
SOT-223 Power Packages
Applications
•
•
•
Pin Description
Front View for TO-220
Active SCSI Terminators
Low Voltage Logic Supplies
3
VIN
Post Regulator for Switching Power Supply
2
VOUT
1
ADJ/GND
Front View for TO-263
TAB is VOUT
3
VIN
2
VOUT
1
ADJ/GND
Front View for TO-252
TAB IS VOUT
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
1
3
VIN
2
VOUT
1
ADJ/GND
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HPL1117
Pin Description (Cont.)
Front View for SOT-223
T A B IS V O U T
3
IN
2
OUT
1
A D J /G N D
Ordering and Marking Information
Package Code
F : TO-220 G : TO-263
U : TO-252 V : SOT-223
Temp. Range
C : 0 to 70 °C
Handling Code
TU : Tube
TR : Tape & Reel
Voltage Code
18 : 1.8V
25 : 2.5V
28 : 2.85V
33 : 3.3V
50 : 5V
Blank : Adjustable Version
Lead Free Code
L : Lead Free Device
Blank : Orginal Device
HPL1117Lead Free Code
Handling Code
Temp. Range
Package Code
Voltage Code
XXXXX - Date Code
HPL1117 V :
HPL1117
XXXXX
XXXXX - Date Code
18
HPL1117-18F/G/U : HPL1117
XXXXX
XXXXX - Date Code
HPL1117-18V :
HPL1117
XXXXX18
XXXXX - Date Code
25
HPL1117-25F/G/U : HPL1117
XXXXX
XXXXX - Date Code
HPL1117-25V :
HPL1117
XXXXX25
XXXXX - Date Code
28
HPL1117-28F/G/U : HPL1117
XXXXX
XXXXX - Date Code
HPL1117-28V :
HPL1117
XXXXX28
XXXXX - Date Code
33
HPL1117 -33F/G/U : HPL1117
XXXXX
XXXXX - Date Code
HPL1117-33V :
HPL1117
XXXXX33
XXXXX - Date Code
50
HPL1117 -50F/G/U : HPL1117
XXXXX
XXXXX - Date Code
HPL1117-50V :
HPL1117
XXXXX50
XXXXX - Date Code
HPL1117 F/G/U :
HPL1117
XXXXX
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
2
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HPL1117
Absolute Maximum Ratings
Symbol
VI
TJ
TSTG
TL
Parameter
Rating
Input Voltage
HPL1117, HPL1117-50, HPL1117-33
HPL1117-25, HPL1117-18, HPL1117-28
Operating Junction Temperature Range
Control Section
Power Transistor
Storage Temperature Range
Lead Temperature (Soldering, 10 second)
(Note)
Unit
15
9
V
°C
0 to 125
0 to 150
-65 to +150
°C
260
°C
Note : The values here show the absolute maximum rating, and for normal usage please refer the test condition in Electrical
Characteristics Table.
Electrical Characteristics
Unless otherwise noted , these specifications apply over CIN=10uF , COUT=10uF , and TJ=0 to 125°C. Typical
values refer to TJ=25°C.
Symbol
Parameter
Test Conditions
HPL1117
Unit
Min.
Typ. Max.
VREF
Reference Voltage 10mA≤ IOUT ≤1A, 1.4V≤(VIN -VOUT) ≤10.75V,
V
1.225 1.250 1.275
TJ =0~125°C
VOUT
REGLINE
REGLOAD
Output Voltage
HPL1117-18 TJ =0~125°C,
0≤ IOUT≤ 1A, 3.1V≤VIN≤9V,
HPL1117-25 TJ =0~125°C,
0≤ IOUT≤ 1A, 3.8V≤VIN≤9V,
HPL1117-28 TJ =0~125°C,
0≤ IOUT≤1A, 4.25V≤VIN≤9V,
HPL1117-33 TJ =0~125°C,
0≤ IOUT≤ 1A, 4.6V≤VIN≤12V,
HPL1117-50 TJ =0~125°C,
0≤ IOUT≤ 1A, 6.45V≤VIN≤12V,
Line Regulation
HPL1117 IOUT=10mA, 1.5V≤(VIN -VOUT )≤10.75V (Note1)
HPL1117-18 IOUT=0A, 3.5V≤VIN≤9V (Note1)
HPL1117-25 IOUT=0A, 4V≤VIN≤9V (Note1)
HPL1117-28 IOUT=0A, 4.25V≤VIN ≤9V (Note1)
HPL1117-33 IOUT=0A, 4.75V≤VIN ≤12V (Note1)
HPL1117-50 I =0A, 6.45V≤V ≤12V (Note1)
OUT
IN
Load Regulation
HPL1117 (VIN -VOUT)=3V, 0≤ IOUT ≤1A (Note1)
HPL1117-18 VIN=3.5V, 0≤ IOUT ≤1A (Note1)
HPL1117-25 VIN =4V, 0≤ IOUT ≤1A (Note1)
HPL1117-28 VIN=4.25V, 0≤ IOUT ≤1A (Note1)
HPL1117-33 VIN=4.75V, 0≤ IOUT ≤1A (Note1)
HPL1117-50 V =6.45V, 0≤ I ≤1A (Note1)
IN
OUT
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
3
1.764 1.800 1.836
2.450 2.500 2.550
2.790 2.850 2.910
V
3.235 3.300 3.365
4.900 5.000 5.100
0.03
1
1
1
1
1
0.2
6
6
6
6
6
0.1
1
1
1
1
1
0.4
10
10
10
10
10
%mV
%mV
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HPL1117
Electrical Characteristics (Cont.)
Symbol
VD
Parameter
Dropout Voltage
Test Conditions
(Note2)
IOUT=100mA
(Note2)
IOUT=500mA
(Note2)
IOUT=1A
(VIN -VOUT)=5V, TJ=25°C
(VIN -VOUT)=3V, IOUT=10mA
ILIMIT
Current Limit
IADJ
Adjust Pin Current
HPL1117
Adjust Pin Current 10mA≤ IOUT ≤1A,
Change HPL1117
1.4V≤(VIN -VOUT) ≤10.75V
(Note3)
Minimum Load
(VIN -VOUT)=10.75V
Current HPL1117
Ripple Rejection
fRIPPLE=120Hz, VRIPPLE=1VP-P,
(VIN -VOUT)=3V
Thermal Regulation TJ=25°C, 30ms Pulse
∆IADJ
IO
PSRR
TR
TS
LS
Temperature
Stability
Long -Term Stability TJ =125°C,1000Hrs.
VN
RMS Output Noise
θth
Thermal Resistance Junction to Case, at Tab
Junction to Ambient
Over Temperature
Point
Quiescent Current
HPL1117-18 VIN≤9V
HPL1117-25 VIN≤9V
HPL1117-28 VIN≤9V
HPL1117-33 VIN≤12V
HPL1117-50 V ≤12V
IN
OT
IQ
TJ=25°C,10Hz≤F≤10kHz, (% of VOUT)
HPL1117
Min.
Typ.
1
1.05
1.1
1000
60
Max.
1.1
1.2
1.3
Unit
V
mA
60
120
µA
0.2
5
µA
1.7
mA
75
dB
0.01
0.02
%/W
0.5
%
0.3
%
0.003
%
15
50
150
°C/ W
5.5
5.5
5.5
5.5
5.5
°C
10
10
10
10
10
mA
Note 1 : See thermal regulation specifications for changes in output voltage due to heating effects. Load line regulations are measured at a constant junction temperature by low duty cycle pulse testing.
Note 2 : Dropout voltage is specified over the full output current range of the device. Dropout voltage is defined as the minimum input/output
differential measured at the specified output current. Test points and limits are also shown on the Dropout Voltage curve.
Note 3 : Minimum load current is defined as the minimum output current required to maintain regulation.
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
4
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HPL1117
Block Diagram
VOUT
V IN
Current
Lim it
Therm al
Protection
Voltage
Regulation
ADJ/GND
Application Circuits
1.25V to 10.7V Adjustable Regulator
VIN
IN
HPL1117
OUT
ADJ
Improving Ripple Rejection
VOUT1
VIN
R1
10µF
121Ω
+
10µ F
C1*
+
R2
1k
100µ F
C2
R2
365Ω
1%
R1
121Ω
1%
+
VOUT
150µF
C1
10µF
* C1 improves ripple rejection.
XC should be approximately
equal to R1 at ripple frequency
* Needed if device is far from filter capacitors
V OUT = 1.250V X
+
HPL1117
IN
OUT
ADJ
R1 + R2
R1
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
5
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HPL1117
Typical Characteristics
Load Transietn Response
HPL1117-33
5
Line Transient Response
0.02
6
0.01
5
HPL1117-33
0.15
Output Current (A)
4
Input Voltage (V)
4.5
3.5
0
3
2.5
2
1.5
CIN=10µF
COUT=10µF Tantalum
VIN=5V
-0.01
-0.02
1
0.1
4
CIN=10µF
COUT=10µF Tantalum
IOUT=0.1A
3
0.05
2
0
1
0.5
0
-100
100
300
500
700
-0.03
900
0
-20
30
80
Time (µS)
Time (µS)
Dropout Voltage vs. Output Current
Output Voltage vs. Input Voltage
HPL1117-33
1.25
6
1.2
5
Output Voltage (V)
Dropout Voltage (V)
-0.05
180
130
1.15
1.1
1.05
1
4
3
2
.
1
0.95
0
0.9
0
0.2
0.4
0.6
0.8
0
1
Output Current (A)
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
1
2
3
4
5
6
7
8
9
Input Voltage (V)
6
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HPL1117
Typical Characteristics Cont.
Input Current vs. Input Voltage
Current Limit vs. Input Voltage
HPL1117-33
6
2.2
Current Limit (A)
5
Input Current (mA)
HPL1117-33
2.4
4
3
2
1
2
1.8
1.6
1.4
1.2
0
1
0
2
4
6
8
10
12
5
7
Input Voltage (V)
9
11
13
Input Voltage (V)
Output Voltage vs. Temperature
Output Voltage vs. Temperature
2.6
3.4
2.5
3.3
Output Voltage (V)
Output Voltage (V)
2.4
2.3
2.2
2.1
2
1.9
1.8
3.1
3
2.9
2.8
1.7
1.6
-50
3.2
-25
0
25
50
75
100
2.7
-50
125
Temperature (°C)
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
-25
0
25
50
75
100
125
Temperature (°C)
7
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HPL1117
Typical Characteristics Cont.
Input Current vs. Tmeperature
5.3
8
5.2
7
Input Current (mA)
Output Voltage (V)
Output Voltage vs. Temperature
5.1
5
4.9
6
5
4
3
4.8
4.7
-50
-25
0
25
50
75
100
2
-50
125
Temperature (°C)
-25
0
25
50
75
125
PSRR vs. Frequency
HPL1117-33
HPL1117-33
1.9
100
Temperature (°C)
Current Limit vs. Temperature
+0
Cadj=22µF
-10 IOUT=0.1A
Vripple=1Vp-p
-20
1.8
1.7
VIN-VOUT=5V
-30
1.6
PSRR (dB)
Current Limit (A)
HPL1117-33
1.5
1.4
1.3
-40
-50
-60
VIN-VOUT>=Vdropout
-70
1.2
-80
1.1
-90
-100
10 20
1
-50
0
50
100
150
Temperature (°C)
 Copyright HIPAC Semiconductor, Inc.
6 - Mar., 2004
Rev. B.13
VIN-VOUT>=3V
50 100 200 500 1k 2k
5k 10k 20k 50k 200k
Frequency (Hz)
8
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HPL1117
Typical Characteristics Cont.
Adjustable Pin Current vs. Temperature
HPL1117-Adj
Adjustable Pin Current (µA)
70
68
66
64
62
60
58
56
54
52
50
-50
-25
0
25
50
75
100
125
Temperature (°C)
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
9
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HPL1117
Application Information
Output Voltage
The HPL1117 develops a 1.25V reference voltage between the output and the adjust terminal. By placing
VIN
HPL1117
IN
OUT
ADJ
Rp
PARASITIC
LINE RESISTANCE
a resistor between these two terminals, a constant
R1
Current is caused to flow through R1 and down through
R2 to set the overall output voltage. Normally this
CONNECT
R1 TO CASE
RL
R2
current is chosen to be the specified minimum load
current of 10mA. For fixed voltage devices R1 and R2
are included in the device.
HPL1117
IN
OUT
ADJ
VIN
CONNECT
R2 TO LOAD
VOUT
VREF
IADJ
60µA
V OUT
Figure 2. Connections for Best Load Regulation
R1
Input Capacitor
R2
A n i n p u t c a p a c i t o r o f 1 0 µF o r g r e a t e r i s
R2
= V REF (1+
)+I ADJ R2
R1
recommended. Tantalum, or aluminum electrolytic
capacitors can be used for bypassing. Larger Val-
Figure 1. Basic Adjustable Regulator
ues will improve ripple rejection by bypassing the in-
Load Regulation
put to the regulator.
When the adjustable regulator is used. Load regula-
Output Capacitor
tion will be limited by the resistance of the wire con-
The HPL1117 requires an output capacitor to maintain
necting the regulator to the load. The data sheet speci-
stability and improve transient response. Proper ca-
fication for load regulation is measured at the output
pacitor selection is important to ensure proper
pin of the device. Best load regulation is obtained
operation. The HPL1117 output capacitor selection is
when the top of the resistor divider (R1) is tied di-
dependent upon the ESR (equivalent series resistance)
rectly to the output pin of the device, not to the load.
of the output capacitor to maintain stability. When the
For fixed voltage devices the top of R1 is internally
output capacitor is 10uF or greater, the output capaci-
connected to the output, and the ground pin can be
tor should have an ESR less than 1Ω.This will improve
connected to low side of the load. If R1 were con-
transient response as well as promote stability. A low-
nected to the load, RP is multiplied by the divider
ESR solid tantalum capacitor works extremely well
ratio, the effective resistance between the regulator
and provides good transient response and stability over
and the load would be:
Rp X (1+
temperature.
R2
), Rp = Parasitic Line Resistance
R1
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
10
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HPL1117
Application Information (Cont.)
Output Capacitor (Cont.)
Figure 3&4 shows for the TO-252 and SOT-223 the
measured values of θ(J-A) for different copper area
Aluminum electrolytics can also be used, as long as
sizes using a 2 layers, 1.6mm, and 6Sq. cm FR-4
the ESR of the capacitor is <1Ω. The value of the
PCB with 2oz. copper and a ground plane layer on
output capacitor can be increased without limit. Higher
the backside area used for heatsinking. It can be
capacitance values help to improve transient response
used as a rough guideline in estimating thermal
and ripple rejection and reduce output noise.
resistance.
Ripple Rejection
Thermal Resistance
(Juntion to Ambient) (°C/W)
50
The curves for Ripple Rejection were generated using an adjustable device with the adjust pin bypassed.
With a 22µF bypassing capacitor 75dB ripple rejection is obtainable at any output level. The impedance
of the adjust pin capacitor, at the ripple frequency,
should be < R1. R1 is normally in the range of 100Ω200Ω. The size of the required adjust pin capacitor
is a function of the input ripple frequency. At 120Hz,
TA=25°C
45
40
35
30
25
0
with R1=100Ω, the adjust pin capacitor should be
2
4
6
8
10
12
14
Top Copper Area (cm2)
13µF. For fixed voltage devices, and adjustable devices without an adjust pin capacitor, the output ripple
Figure 3.
will increase as the ratio of the output voltage to the
θ(J-A) vs. copper area for the TO-252 package
reference voltage (VOUT /VREF ).
Thermal Considerations
HPL1117 has thermal protection which limits junction
temperature to 150°C. However, device functionality
is only guaranteed to a maximum junction temperature of +125°C.
Both the TO-220, TO-252, TO-263 and SOT-223
packages use a copper plane on the PCB and the
PCB itself as a heatsink. To optimize the heat sinking
ability of the plane and PCB, solder the tab of the
package to the plane.
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
11
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HPL1117
Application Information (Cont.)
Thermal Considerations (Cont.)
Thermal Resistance
(Juntion to Ambient) (°C/W)
60
TA=25°C
55
50
45
40
35
30
0
2
4
6
8
10
12
14
Top Copper Area (cm2)
Figure 4.
θ(J-A) vs. copper area for the SOT-223 package
The thermal resistance for each application will be
affected by thermal interactions with other components on the board. Some experimentation will be
necessary to determine the actual value.
The power dissipation of HPL1117 is equal to :
PD = (VIN - VOUT) x IOUT
Maximum junction temperature is equal to :
TJUNCTION = TAMBIENT + (PD x θJA)
Note: TJUNCTION must not exceed 125°C
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
12
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HPL1117
Package Information
TO-220 ( Reference JEDEC Registration TO-220)
D
R
Q
b
E
e
b1
e1
L1
L
H1
A
c
F
Millimeters
Dim
A
b1
b
c
D
e
e1
E
F
H1
J1
L
L1
R
Q
Min.
3.56
1.14
0.51
0.31
14.23
2.29
4.83
9.65
0.51
5.84
2.03
12.7
3.65
3.53
2.54
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
J1
Inches
Max.
4.83
1.78
1.14
1.14
16.51
2.79
5.33
10.67
1.40
6.86
2.92
14.73
6.35
4.09
3.43
13
Min.
0.140
0.045
0.020
0.012
0.560
0.090
0.190
0.380
0.020
0.230
0.080
0.500
0.143
0.139
0.100
Max.
0.190
0.070
0.045
0.045
0.650
0.110
0.210
0.420
0.055
0.270
0.115
0.580
0.250
0.161
0.135
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HPL1117
Package Informaion
TO-252( Reference JEDEC Registration TO-252)
E
A
b2
C1
L2
D
H
L1
L
b
C
e1
D1
A1
E1
Dim
M illim et er s
Inc he s
M in.
M ax.
M in.
M ax.
A
2. 1 8
2. 39
0. 0 86
0. 0 94
A1
0. 8 9
1. 27
0. 0 35
0. 0 50
b
0. 5 08
0. 89
0. 0 20
0. 0 35
b2
5. 2 07
5. 4 61
0. 2 05
0. 2 15
C
0. 4 6
0. 58
0. 0 18
0. 0 23
C1
0. 4 6
0. 58
0. 0 18
0. 0 23
D
5. 3 34
6. 22
0. 2 10
0. 2 45
D1
E
5. 2 R EF
6. 3 5
E1
0. 2 05 R EF
6. 73
0. 2 50
5. 3 R EF
0. 2 65
0. 2 09 R EF
e1
3. 9 6
5. 18
0. 1 56
0. 2 04
H
9. 3 98
10 . 41
0. 3 70
0. 4 10
L
0. 5 1
L1
0. 6 4
1. 02
0. 0 25
0. 0 40
L2
0. 8 9
2. 0 32
0. 0 35
0. 0 80
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
0. 0 20
14
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HPL1117
Package Information
TO-263 ( Reference JEDEC Registration TO-263)
E
L2
E1
TE RM INA L 4
D1
D
L
L3
b2
b
e
e1
A
c2
Φ 1
R
L1
L4
DE TA IL "A "RO TE D
c
Millimeters
Dim
A
b
b2
c
c2
D
e
e1
L
L1
L2
L3
Min.
4.06
0.51
1.14
Inches
Max.
4.83
1.016
1.651
Min.
0.160
0.02
0.045
1.40
9.65
10.54
0.045
0.340
0.380
15.88
2.84
2.92
1.78
0.575
0.090
0.040
0.050
0.38 TYP.
1.14
8.64
9.65
0.015 TYP.
2.54 TYP
14.60
2.24
1.02
1.20
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
Max.
0.190
0.040
0.065
0.055
0.380
0.415
0.100 TYP
15
0.625
0.110
0.112
0.070
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HPL1117
Package Information
SOT-223( Reference JEDEC Registration SOT-223)
D
A
B1
a
c
H
E
L
K
e
A1
e1
b
B
Dim
A
A1
B
B1
c
D
E
e
e1
H
L
K
α
β
Millimeters
Min.
1.50
0.02
0.60
2.90
0.28
6.30
3.30
Inches
Max.
1.80
0.08
0.80
3.10
0.32
6.70
3.70
Min.
0.06
Max.
0.07
0.02
0.11
0.01
0.25
0.13
0.03
0.12
0.01
0.26
0.15
2.3 BSC
4.6 BSC
6.70
0.91
1.50
0°
0.09 BSC
0.18 BSC
7.30
1.10
2.00
10°
13°
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
0.26
0.04
0.06
0°
0.29
0.04
0.08
10°
13°
16
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HPL1117
Physical Specifications
Terminal Material
Lead Solderability
Packaging
Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb
Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
2500 devices per reel
Reflow Condition
(IR/Convection or VPR Reflow)
tp
TP
Critical Zone
T L to T P
Tem perature
Ram p-up
TL
tL
Tsm ax
Tsm in
Ram p-down
ts
Preheat
25
t 25 °C to Peak
Classificatin Reflow Profiles
Profile Feature
Tim e
Sn-Pb Eutectic Assembly
Large Body
Small Body
Pb-Free Assembly
Large Body
Small Body
3°C/second max.
3°C/second max.
Average ramp-up rate
(TL to TP)
Preheat
- Temperature Min (Tsmin)
- Temperature Mix (Tsmax)
- Time (min to max)(ts)
Tsmax to TL
- Temperature(TL)
- Time (tL)
Peak Temperature(Tp)
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
3°C/second max
183°C
60-150 seconds
217°C
60-150 seconds
Time within 5°C of actual Peak
225 +0/-5°C
240 +0/-5°C
245 +0/-5°C
250 +0/-5°C
Temperature(tp)
Ramp-down Rate
10-30 seconds
10-30 seconds
10-30 seconds 20-40 seconds
Time 25°C to Peak Temperature
6°C/second max.
6°C/second max.
6 minutes max.
8 minutes max.
Note: All temperatures refer to topside of the package. Measured on the body surface.
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
17
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HPL1117
Package Reflow Conditions
pkg. thickness ≥ 2.5mm
and all bgas
Convection 220 +5/-0°C
VPR 215-219°C
IR/Convection 220 +5/-0°C
pkg. thickness < 2.5mm
3
and pkg. volume ≥ 350mm
pkg. thickness < 2.5mm and pkg.
3
volume < 350mm
Convection 235 +5/-0°C
VPR 235 +5/-0°C
IR/Convection 235 +5/-0°C
Reliability test program
Test item
SOLDERABILITY
HOLT
PCT
TST
ESD
Latch-Up
Method
MIL-STD-883D-2003
MIL-STD-883D-1005.7
JESD-22-B, A102
MIL-STD-883D-1011.9
MIL-STD-883D-3015.7
JESD 78
Description
245°C , 5 SEC
1000 Hrs Bias @ 125 °C
168 Hrs, 100 % RH , 121°C
-65°C ~ 150°C, 200 Cycles
VHBM > 2KV, VMM > 200V
10ms , Itr > 100mA
Carrier Tape & Reel Dimension
t
D
P
Po
E
P1
Bo
F
W
Ao
D1
Ko
T2
J
C
A
B
T1
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
18
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HPL1117
Carrier Tape & Reel Dimension
A
B
C
J
330 ±3
100 ± 2
13 ± 0. 5
2 ± 0 .5
T1
1 6 .4 + 0 . 3
- 0 .2
2 .5 ± 0 .5
W
1 6 + 0 .3
- 0 .1
8 ± 0 .1
1 .7 5 ± 0 .1
F
D
D1
Po
P1
Ao
Bo
Ko
t
7 .5 ± 0 .1
1 .5 + 0 . 1
1 . 5 ± 0 .2 5
4 .0 ± 0 .1
2 .0 ± 0 .1
6 .8 ± 0 .1
1 0 .4 ± 0 .1
2 . 5 ± 0 .1
0 .3 ± 0 .0 5
A
B
C
J
T1
T2
P
380±3
80 ± 2
13 ± 0. 5
2 ± 0 .5
24 ± 4
2 ± 0 .3
W
2 4 + 0 .3
- 0 .1
P1
Ao
Bo
A p p li c a t io n
T O -2 5 2
A p p li c a t io n
F
D
D1
Po
11 . 5 ± 0 . 1
1 .5 + 0 . 1
1 . 5 ± 0 .2 5
4 .0 ± 0 .1
T O -2 6 3
T2
2 .0 ± 0 .1 1 0 . 8 ± 0 . 1 1 6 .1 ± 0 .1
P
E
E
1 6 ± 0 .1
1 .7 5 ± 0 .1
Ko
t
5 . 2 ± 0 .1 0 .3 5 ±3 0 .0 1
A
B
T1
T2
W
P
6 2 ± 1 .5
C
1 2 .7 5 ±
0 .1 5
J
330±1
2 ± 0 .6
1 2 .4 + 0 .2
2 ± 0 .2
1 2 ± 0 .3
8 ± 0 .1
1 .7 5 ± 0 .1
F
D
D1
Po
P1
Ao
Bo
Ko
t
5 .5 ± 0 .0 5
1 .5 + 0 . 1
1 .5 + 0 . 1
7 . 5 ± 0 .1
2 . 1 ± 0 .1
0 .3 ± 0 .0 5
A p p li c a t io n
S O T -2 2 3
4 .0 ± 0 .1 2 . 0 ± 0 .0 5 6 .9 ± 0 .1
E
Cover Tape Dimensions
Application
TO- 252
TO- 263
SOT- 223
Carrier Width
16
24
12
Cover Tape Width
13.3
21.3
9.3
Devices Per Reel
2500
1000
2500
CONTACT
HIPAC Semiconductor, Inc.
2540 North First Street, Suite 308
San Jose, CA 95131-1016
U.S.A.
Tel: 1-408-943-0808
Fax: 1-408-943-0878
E-Mail: [email protected]
 Copyright HIPAC Semiconductor, Inc.
Rev. B.13 - Mar., 2004
19
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