BCM® Bus Converter BCM6123xD1E5135yzz ® C S US C NRTL US Isolated Fixed-Ratio DC-DC Converter Features & Benefits Product Ratings • Up to 35A continuous secondary current • Up to 2735W/in3 power density • 98% peak efficiency VPRI = 400V (260 – 410V) ISEC = up to 35A VSEC = 50V (32.5 – 51.3V) (no load) K = 1/8 • 4,242VDC isolation • Parallel operation for multi-kW arrays Product Description • OV, OC, UV, short circuit and thermal protection The BCM6123xD1E5135yzz Bus Converter (BCM®) is a high efficiency Sine Amplitude Converter™ (SAC™), operating from a 260 to 410VDC primary bus to deliver an isolated, ratiometric secondary voltage from 32.5 to 51.3VDC. • 6123 through-hole ChiP package ■■2.494” x 0.898” x 0.284” (63.34mm x 22.80mm x 7.21mm) • PMBus™ management interface* Typical Applications • 380VDC Power Distribution • High End Computing Systems • Automated Test Equipment • Industrial Systems • High Density Power Supplies • Communications Systems • Transportation The BCM6123xD1E5135yzz offers low noise, fast transient response, and industry leading efficiency and power density. In addition, it provides an AC impedance beyond the bandwidth of most downstream regulators, allowing input capacitance normally located at the input of a PoL regulator to be located at the primary side of the BCM module. With a primary to secondary K factor of 1/8, that capacitance value can be reduced by a factor of 64x, resulting in savings of board area, material and total system cost. Leveraging the thermal and density benefits of Vicor ChiP packaging technology, the BCM module offers flexible thermal management options with very low top and bottom side thermal impedances. Thermally-adept ChiP-based power components, enable customers to achieve low cost power system solutions with previously unattainable system size, weight and efficiency attributes, quickly and predictably. This product can operate in reverse direction, at full rated power, after being previously started in forward direction. * When used with D44TL1A0 and I13TL1A0 BCM® Bus Converter Page 1 of 30 Rev 1.4 10/2017 BCM6123xD1E5135yzz Typical Application BCM TM EN enable/disable switch SW1 VAUX F1 VPRI +VPRI +VSEC –VPRI –VSEC CPRI POL GND PRIMARY SECONDARY ISOLATION BOUNDRY BCM6123xD1E5135y00 at Point of load BCM SER-OUT SER-OUT EN SER-IN enable/disable switch SER-IN FUSE VPRI C +VPRI +VSEC –VPRI –VSEC POL I_BCM_ELEC PRIMARY SOURCE_RTN SECONDARY Digital Supervisor ISOLATION BOUNDRY Digital Isolator D44TL1A0 I13TL1A0 NC PRI_OUT_A Host µC SEC_IN_A VDDB SEC_IN_B TXD VDD PRI_IN_C SEC_OUT_C RXD PRI_COM SEC_COM SER-IN t + PRI_OUT_B – V EXT SER-OUT SGND SGND PMBus PMBus SGND SGND SGND BCM6123xD1E5135y01 at Point of load BCM® Bus Converter Page 2 of 30 Rev 1.4 10/2017 BCM6123xD1E5135yzz Typical Application PRM BCM ENABLE enable/disable switch TM/SER-OUT SGND VAUX/SER-IN R FUSE V C PRI +VPRI +VSEC –VPRI –VSEC PRIMARY R TRIM_PRM SHARE/ CONTROL NODE OUT +OUT VC PC IFB C R O_PRM_DAMP I_PRM_DAMP L V TM VTM Start Up Pulse VC AL_PRM SGND I_BCM_ELEC SOURCE_RTN R VTM Adaptive Loop Temperature Feedback VT AL EN enable/disable switch VAUX REF/ REF_EN TRIM I_PRM_FLT R +IN +OUT –IN –OUT L I_PRM_CER SGND LOAD O_VTM_CER +IN O_PRM_FLT C O_PRM_CER –IN –OUT PRIMARY SECONDARY SECONDARY LOAD_RTN ISOLATION BOUNDRY ISOLATION BOUNDRY SGND BCM6123xD1E5135yzz + PRM + VTM, Adaptive Loop Configuration V REF TM/SER-OUT VPRI C I_BCM_ELEC SOURCE_RTN +VPRI +VSEC –VPRI –VSEC PRIMARY VT SHARE/ CONTROL NODE VC IFB I_PRM_DAMP L C VTM SGND V+ SGND External Current Sense I_PRM_ELEC –IN SGND SECONDARY –OUT VC PC V– VOUT –IN +OUT TM VTM Start up Pulse +OUT R L C O_PRM_DAMP +IN O_PRM_FLT C O_PRM_CER –IN –OUT PRIMARY SECONDARY ISOLATION BOUNDRY ISOLATION BOUNDRY SGND BCM6123xD1E5135yzz + PRM + VTM, Remote Sense Configuration BCM® Bus Converter Page 3 of 30 Voltage Sense and Error Amplifier (Differential) Voltage Reference with Soft Start +IN +IN I_PRM_FLT SGND OUT GND REF/ REF_EN AL SGND R FUSE IN VAUX TRIM SGND VAUX/SER-IN REF 3312 ENABLE enable/disable switch EN enable/disable switch SGND PRM Rev 1.4 10/2017 Voltage Sense BCM O_VTM_CER LOAD BCM6123xD1E5135yzz Pin Configuration TOP VIEW 1 2 +VPRI A A’ +VSEC TM/SER-OUT B B’ –VSEC EN C VAUX/SER-IN D –VPRI E C’ +VSEC D’ –VSEC 6123 ChiP Package Pin Descriptions Power Pins Pin Number Signal Name Type Function A1 +VPRI PRIMARY POWER Positive primary transformer power terminal E1 -VPRI PRIMARY POWER RETURN Negative primary transformer power terminal A’2, C’2 +VSEC SECONDARY POWER Positive secondary transformer power terminal B’2, D’2 -VSEC SECONDARY POWER RETURN Negative secondary transformer power terminal Analog Control Signal Pins Pin Number Signal Name Type Function B1 TM OUTPUT C1 EN INPUT D1 VAUX OUTPUT Temperature Monitor; primary side referenced signals Enables and disables power supply; primary side referenced signals Auxilary Voltage Source; primary side referenced signals PMBus Control Signal Pins Pin Number Signal Name Type B1 SER-OUT OUTPUT C1 EN INPUT Enables and disables power supply; Primary side referenced signals D1 SER-IN INPUT UART receive pin; Primary side referenced signals BCM® Bus Converter Page 4 of 30 Function UART transmit pin; Primary side referenced signals Rev 1.4 10/2017 BCM6123xD1E5135yzz Part Ordering Information Product Function Package Size Package Mounting Max Primary Input Voltage Range Identifier Max Secondary Voltage Secondary Output Current Temperature Grade Option BCM 6123 x D1 E 51 35 y zz 61 = L 23 = W T = TH 00 = Analog Ctrl Bus Converter Module S = SMT 410V 260 – 410V 51.3V No Load 35A T = -40°C – 125°C 01 = PMBus Ctrl M = -55°C – 125°C 0R = Reversible Analog Ctrl 0P = Reversible PMBus Ctrl All products shipped in JEDEC standard high profile (0.400” thick) trays (JEDEC Publication 95, Design Guide 4.10). Standard Models Product Function Package Size Package Mounting Max Primary Input Voltage Range Identifier Max Secondary Voltage Secondary Output Current Temperature Grade Option BCM 6123 T D1 E 51 35 T 00 BCM 6123 T D1 E 51 35 T 01 BCM 6123 T D1 E 51 35 T 0R BCM 6123 T D1 E 51 35 T 0P Absolute Maximum Ratings The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device. Parameter Comments +VPRI_DC to –VPRI_DC Min Max Unit -1 480 V 1 V/µs 60 V 4.6 V 5.5 V 4.6 V VPRI_DC or VSEC_DC slew rate (operational) +VSEC_DC to –VSEC_DC -1 TM/SER-OUT to –VPRI_DC EN to –VPRI_DC -0.3 VAUX/SER-IN to –VPRI_DC BCM® Bus Converter Page 5 of 30 Rev 1.4 10/2017 BCM6123xD1E5135yzz Electrical Specifications Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit 410 V 120 V General Powertrain PRIMARY to SECONDARY Specification (Forward Direction) Primary Input Voltage range, continuous VPRI µController PRI to SEC Input Quiescent Current 260 VPRI_DC VµC_ACTIVE IPRI_Q VPRI_DC voltage where µC is initialized, (ie VAUX = Low, powertrain inactive) Disabled, EN Low, VPRI_DC = 400V 2 TINTERNAL ≤ 100ºC 4 VPRI_DC = 400V, TINTERNAL = 25ºC PRI to SEC No Load Power Dissipation PRI to SEC Inrush Current Peak PPRI_NL IPRI_INR_PK 10 6 VPRI_DC = 400V 21 15 VPRI_DC = 260V to 410V 22 6 TINTERNAL ≤ 100ºC DC Primary Input Current Transformation Ratio Secondary Output Current (continuous) Secondary Output Current (pulsed) IPRI_IN_DC K Secondary Output Power (continuous) PSEC_OUT_DC Secondary Output Power (pulsed) PSEC_OUT_PULSE A At ISEC_OUT_DC = 35A, TINTERNAL ≤ 100ºC 4.5 Primary to secondary, K = VSEC_DC / VPRI_DC, at no load 1/8 35 A 40 A Specified at VPRI_DC = 410V 1750 W Specified at VPRI_DC = 410V; 10ms pulse, 25% Duty cycle, PSEC_AVG ≤ 50% rated PSEC_OUT_DC 2000 W 10ms pulse, 25% Duty cycle, ISEC_OUT_AVG ≤ 50% rated ISEC_OUT_DC VPRI_DC = 400V, ISEC_OUT_DC = 35A 96.9 VPRI_DC = 260V to 410V, ISEC_OUT_DC = 35A 95.7 97.4 ηAMB VPRI_DC = 400V, ISEC_OUT_DC = 17.5A 97.5 98 PRI to SEC Efficiency (hot) ηHOT VPRI_DC = 400V, ISEC_OUT_DC = 35A 96.3 96.8 PRI to SEC Efficiency (over load range) η20% 7A < ISEC_OUT_DC < 35A 92 RSEC_COLD VPRI_DC = 400V, ISEC_OUT_DC = 35A, TINTERNAL = -40°C 12 16 RSEC_AMB VPRI_DC = 400V, ISEC_OUT_DC = 35A 16 22.6 33 RSEC_HOT VPRI_DC = 400V, ISEC_OUT_DC = 35A, TINTERNAL = 100°C 24 31 39 FSW Frequency of the Output Voltage Ripple = 2x FSW 1.05 1.10 1.14 VSEC_OUT_PP CSEC_EXT = 0μF, ISEC_OUT_DC = 35A, VPRI_DC = 400V, 20MHz BW Switching Frequency Secondary Output Voltage Ripple % Secondary Output Leads Inductance (Parasitic) Primary Input Series Inductance (internal) BCM® Bus Converter Page 6 of 30 % % 20 250 TINTERNAL ≤ 100ºC Primary Input Leads Inductance (Parasitic) A V/V PRI to SEC Efficiency (ambient) PRI to SEC Output Resistance W 12 ISEC_OUT_DC ISEC_OUT_PULSE 14 VPRI_DC = 260V to 410V, TINTERNAL = 25ºC VPRI_DC = 410V, CSEC_EXT = 100μF, RLOAD_SEC = 50% of full load current mA mΩ MHz mV 350 LPRI_IN_LEADS Frequency 2.5MHz (double switching frequency), Simulated lead model 6.7 nH LSEC_OUT_LEADS Frequency 2.5MHz (double switching frequency), Simulated lead model 1.3 nH Reduces the need for input decoupling inductance in BCM arrays 0.56 µH LIN_INT Rev 1.4 10/2017 BCM6123xD1E5135yzz Electrical Specifications (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit General Powertrain PRIMARY to SECONDARY Specification (Forward Direction) Cont. Effective Primary Capacitance (Internal) CPRI_INT Effective Value at 400VPRI_DC 0.37 µF Effective Secondary Capacitance (Internal) CSEC_INT Effective Value at 50VSEC_DC 25.6 µF Effective Secondary Output Capacitance (External) CSEC_OUT_EXT Excessive capacitance may drive module into SC protection Effective Secondary Output Capacitance (External) CSEC_OUT_AEXT CSEC_OUT_AEXT Max = N * 0.5 * CSEC_OUT_EXT MAX, where N = the number of units in parallel 100 µF 357.5 ms Powertrain Protection PRIMARY to SECONDARY (Forward Direction) Auto Restart Time tAUTO_RESTART Startup into a persistent fault condition. Non-Latching fault detection given VPRI_DC > VPRI_UVLO+ 292.5 Primary Overvoltage Lockout Threshold VPRI_OVLO+ 420 436 450 V Primary Overvoltage Recovery Threshold VPRI_OVLO- 405 426 440 V Primary Overvoltage Lockout Hysteresis VPRI_OVLO_HYST 10 V Primary Overvoltage Lockout Response Time tPRI_OVLO 100 µs 1 ms Primary Soft-Start Time tPRI_SOFT-START Secondary Output Overcurrent Trip Threshold ISEC_OUT_OCP Secondary Output Overcurrent Response Time Constant tSEC_OUT_OCP Secondary Output Short Circuit Protection Trip Threshold ISEC_OUT_SCP Secondary Output Short Circuit Protection Response Time tSEC_OUT_SCP Overtemperature Shutdown Threshold BCM® Bus Converter Page 7 of 30 tOTP+ From powertrain active. Fast Current limit protection disabled during Soft-Start 37.5 Effective internal RC filter 47 3.6 52 Rev 1.4 10/2017 125 A ms A 1 Temperature sensor located inside controller IC 59 µs °C BCM6123xD1E5135yzz Electrical Specifications (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit Powertrain Supervisory Limits PRIMARY to SECONDARY (Forward Direction) Primary Overvoltage Lockout Threshold VPRI_OVLO+ 420 436 450 V Primary Overvoltage Recovery Threshold VPRI_OVLO- 405 426 440 V Primary Overvoltage Lockout Hysteresis VPRI_OVLO_HYST 10 V Primary Overvoltage Lockout Response Time tPRI_OVLO 100 µs Primary Undervoltage Lockout Threshold VPRI_UVLO- 200 226 250 V Primary Undervoltage Recovery Threshold VPRI_UVLO+ 225 244 259 V Primary Undervoltage Lockout Hysteresis VPRI_UVLO_HYST 15 V Primary Undervoltage Lockout Response Time tPRI_UVLO 100 µs 20 ms Primary Undervoltage Startup Delay From VPRI_DC = VPRI_UVLO+ to powertrain active, EN tPRI_UVLO+_DELAY floating, (i.e One time Startup delay from application of VPRI_DC to VSEC_DC) Secondary Output Overcurrent Trip Threshold ISEC_OUT_OCP Secondary Output Overcurrent Response Time Constant tSEC_OUT_OCP Overtemperature Shutdown Threshold tOTP+ Overtemperature Recovery Threshold tOTP– Undertemperature Shutdown Threshold tUTP Undertemperature Restart Time BCM® Bus Converter Page 8 of 30 tUTP_RESTART 37.5 Effective internal RC filter Temperature sensor located inside controller IC 47 3.6 °C 110 Temperature sensor located inside controller IC; Protection not available for M-Grade units. Rev 1.4 10/2017 A ms 125 105 Startup into a persistent fault condition. Non-Latching fault detection given VPRI_DC > VPRI_UVLO+ 59 3 115 °C -45 °C s BCM6123xD1E5135yzz Electrical Specifications (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit 51.3 V General Powertrain SECONDARY to PRIMARY Specification (Reverse Direction) Secondary Input Voltage range, continuous 32.5 VSEC_DC VSEC_DC = 50V, TINTERNAL = 25ºC SEC to PRI No Load Power Dissipation DC Secondary Input Current Primary Output Power (continuous) Primary Output Power (pulsed) Primary Output Current (continuous) Primary Output Current (pulsed) PSEC_NL ISEC_IN_DC PPRI_OUT_DC PPRI_OUT_PULSE 12 6 VSEC_DC = 50V 22 VSEC_DC = 32.5V to 51.3V, TINTERNAL = 25ºC 18 VSEC_DC = 32.5V to 51.3V 23 At IPRI_DC = 4.38A, TINTERNAL ≤ 100ºC 36 A 1750 W Specified at VSEC_DC = 51.3V; 10ms pulse, 25% Duty cycle, PPRI_AVG ≤ 50 rated PPRI_OUT_DC 2000 W 4.38 A 5 A 10ms pulse, 25% Duty cycle, IPRI_OUT_AVG ≤ 50% rated IPRI_OUT_DC VSEC_DC = 50V, IPRI_OUT_DC = 4.38A 96.9 VSEC_DC = 32.5V to 51.3V, IPRI_OUT_DC= 4.38A 95.7 97.3 SEC to PRI Efficiency (ambient) ηAMB VSEC_DC = 50V, IPRI_OUT_DC = 2.2A 97.3 97.8 SEC to PRI Efficiency (hot) ηHOT VSEC_DC = 50V, IPRI_OUT_DC = 4.38A 96.3 96.8 SEC to PRI Efficiency (over load range) η20% 0.88A < IPRI_OUT_DC < 4.38A SEC to PRI Output Resistance Primary Output Voltage Ripple BCM® Bus Converter Page 9 of 30 % % 92 % RPRI_COLD VSEC_DC = 50V, IPRI_OUT_DC = 4.38A, TINTERNAL = -40°C 1400 1628 2200 RPRI_AMB VSEC_DC = 50V, IPRI_OUT_DC = 4.38A 1650 2026 2650 RPRI_HOT VSEC_DC = 50V, IPRI_OUT_DC = 4.38A, TINTERNAL = 100°C 2350 2683 3100 VPRI_OUT_PP W Specified at VSEC_DC = 51.3V IPRI_OUT_DC IPRI_OUT_PULSE 17 CPRI_OUT_EXT = 0μF, IPRI_OUT_DC = 4.38A, VSEC_DC = 50V, 20MHz BW TINTERNAL ≤ 100ºC 2000 mV 2800 Rev 1.4 10/2017 mΩ BCM6123xD1E5135yzz Electrical Specifications (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit 52.5 54.5 56.5 V Protection SECONDARY to PRIMARY (Reverse Direction) Secondary Overvoltage Lockout Threshold VSEC_OVLO+ Secondary Overvoltage Lockout Response Time tPRI_OVLO Secondary Undervoltage Lockout Threshold VSEC_UVLO- Secondary Undervoltage Lockout Response Time tSEC_UVLO Module latched shutdown with VPRI_DC < VPRI_UVLO-_R 100 Module latched shutdown with VPRI_DC < VPRI_UVLO-_R 13.75 15 µs 16 100 V µs Primary Undervoltage Lockout Threshold VPRI_UVLO-_R Applies only to reversilbe products in forward and in reverse direction; IPRI_DC ≤ 20% while VPRI_UVLO-_R < VPRI_DC < VPRI_MIN 110 120 130 V Primary Undervoltage Recovery Threshold VPRI_UVLO+_R Applies only to reversilbe products in forward and in reverse direction 120 135 150 V Primary Undervoltage Lockout Hysteresis VPRI_UVLO_HYST_R Applies only to reversilbe products in forward and in reverse direction Primary Output Overcurrent Trip Threshold IPRI_OUT_OCP Module latched shutdown with VPRI_DC < VPRI_UVLO-_R Primary Output Overcurrent Response Time Constant tPRI_OUT_OCP Effective internal RC filter Primary Short Circuit Protection Trip Threshold IPRI_SCP Primary Short Circuit Protection Response Time tPRI_SCP BCM® Bus Converter Page 10 of 30 Module latched shutdown with VPRI_DC < VPRI_UVLO-_R 10 4.69 5.88 3.6 6.5 7.38 A ms A 1 Rev 1.4 10/2017 V µs BCM6123xD1E5135yzz 2000 Primary/Secondary Output Power (W) 1800 1600 1400 1200 1000 800 600 400 200 0 35 45 55 65 75 85 95 105 115 125 Case Temperature (°C) Top only at temperture Top and leads at temperature Top, leads and belly at temperature 2000 1900 1800 1700 1600 1500 1400 1300 1200 1100 1000 900 800 Seondary Output Current (A) Secondary Output Power (W) Figure 1 — Specified thermal operating area 260 275 290 305 320 335 350 365 380 395 410 42 40 38 36 34 32 30 28 26 24 22 20 18 16 260 Primary Input Voltage (V) PSEC_OUT_DC 275 290 305 PSEC_OUT_PULSE ISEC_OUT_DC Secondary Output Capacitance (% Rated CSEC_EXT_MAX) Figure 2 — Specified electrical operating area using rated RSEC_HOT 110 100 90 80 70 60 50 40 30 20 10 0 0 20 40 60 80 Seondary Output Current (% ISEC_DC) Figure 3 — Specified Primary start-up into load current and external capacitance BCM® Bus Converter Page 11 of 30 320 335 350 365 380 Primary Input Voltage (V) Rev 1.4 10/2017 100 ISEC_OUT_PULSE 395 410 BCM6123xD1E5135yzz Analog Control Signal Characteristics Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted. Temperature Monitor • The TM pin is a standard analog I/O configured as an output from an internal µC. • The TM pin monitors the internal temperature of the controller IC within an accuracy of ±5°C. • µC 250kHz PWM output internally pulled high to 3.3V. SIGNAL TYPE STATE Startup ATTRIBUTE Powertrain active to TM time TM Duty Cycle TM Current SYMBOL CONDITIONS / NOTES MIN TYP MAX 100 tTM 18.18 TMPWM ITM UNIT µs 68.18 % 4 mA Recommended External filtering DIGITAL OUTPUT Regular Operation TM Capacitance (External) CTM_EXT Recommended External filtering 0.01 µF TM Resistance (External) RTM_EXT Recommended External filtering 1 kΩ ATM 10 mV / °C VTM_AMB 1.27 V Specifications using recommended filter TM Gain TM Voltage Reference TM Voltage Ripple VTM_PP RTM_EXT = 1kΩ, CTM_EXT = 0.01µF, VPRI_DC = 400V, ISEC_DC = 35A 28 TINTERNAL ≤ 100ºC mV 40 Enable / Disable Control • The EN pin is a standard analog I/O configured as an input to an internal µC. • It is internally pulled high to 3.3V. • When held low the BCM internal bias will be disabled and the powertrain will be inactive. • In an array of BCMs, EN pins should be interconnected to synchronize startup. SIGNAL TYPE STATE Startup ANALOG INPUT Regular Operation ATTRIBUTE EN to Powertrain active time tEN_START CONDITIONS / NOTES MIN VPRI_DC > VPRI_UVLO+, EN held low both conditions satisfied for T > tPRI_UVLO+_DELAY TYP MAX 250 VEN_TH EN Resistance (Internal) REN_INT Internal pull up resistor VEN_DISABLE_TH Rev 1.4 10/2017 UNIT µs 2.3 EN Voltage Threshold EN Disable Threshold BCM® Bus Converter Page 12 of 30 SYMBOL V 1.5 kΩ 1 V BCM6123xD1E5135yzz Analog Control Signal Characteristics (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted. Auxiliary Voltage Source • The VAUX pin is a standard analog I/O configured as an output from an internal µC. • VAUX is internally connected to µC output as internally pulled high to a 3.3V regulator with 2% tolerance, a 1% resistor of 1.5kΩ. • VAUX can be used as a “Ready to process full power” flag. This pin transitions VAUX voltage after a 2ms delay from the start of powertrain activating, signaling the end of softstart. • VAUX can be used as “Fault flag”. This pin is pulled low internally when a fault protection is detected. SIGNAL TYPE STATE Startup ANALOG OUTPUT Regular Operation Fault BCM® Bus Converter Page 13 of 30 ATTRIBUTE SYMBOL Powertrain active to VAUX time tVAUX VAUX Voltage VVAUX VAUX Available Current IVAUX CONDITIONS / NOTES MIN TYP 2 Powertrain active to VAUX High 2.8 VAUX Voltage Ripple VVAUX_PP VAUX Capacitance (External) CVAUX_EXT VAUX Resistance (External) RVAUX_EXT VAUX Fault Response Time tVAUX_FR MAX ms 3.3 V 4 mA 50 TINTERNAL ≤ 100ºC 100 0.01 VPRI_DC < VµC_ACTIVE From fault to VVAUX = 2.8V, CVAUX = 0pF Rev 1.4 10/2017 1.5 UNIT mV µF kΩ 10 µs BCM6123xD1E5135yzz PMBus™ Control Signal Characteristics Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted. UART SER-IN / SER-OUT Pins • Universal Asynchronous Receiver/Transmitter (UART) pins. • The BCM communication version is not intended to be used without a Digital Supervisor. • Isolated I2C communication and telemetry is available when using Vicor Digital Isolator and Vicor Digital Supervisor. Please see specific product data sheet for more details. • UART SER-IN pin is internally pulled high using a 1.5kΩ to 3.3V. SIGNAL TYPE STATE GENERAL I/O ATTRIBUTE SYMBOL Baud Rate BRUART CONDITIONS / NOTES MIN TYP MAX 750 Rate UNIT Kbit/s SER-IN Pin SER-IN Input Voltage Range VSER-IN_IH 2.3 V VSER-IN_IL DIGITAL INPUT Regular Operation V SER-IN rise time tSER-IN_RISE 10% to 90% 400 ns SER-IN fall time tSER-IN_FALL 10% to 90% 25 ns SER-IN RPULLUP RSER-IN_PLP Pull up to 3.3V 1.5 kΩ SER-IN External Capacitance CSER-IN_EXT 400 pF SER-OUT Pin VSER-OUT_OH 0mA ≥ IOH ≥ -4mA VSER-OUT_OL 0mA ≤ IOL ≤ 4mA SER-OUT rise time tSER-OUT_RISE 10% to 90% 55 ns SER-OUT fall time tSER-OUT_FALL 10% to 90% 45 ns SER-OUT Output Voltage Range DIGITAL OUTPUT 1 SER-OUT source current ISER-OUT SER-OUT output impedance ZSER-OUT 2.8 V 0.5 VSER-OUT = 2.8V 6 V mA Ω 120 Enable / Disable Control • • • • • The EN pin is a standard analog I/O configured as an input to an internal µC. It is internally pulled high to 3.3V. When held low the BCM internal bias will be disabled and the powertrain will be inactive. In an array of BCMs, EN pins should be interconnected to synchronize startup. Enable / disable command will have no effect if the EN pin is disabled. SIGNAL TYPE ANALOG INPUT STATE ATTRIBUTE SYMBOL CONDITIONS / NOTES Startup EN to Powertrain active time tEN_START VPRI_DC > VPRI_UVLO+, EN held low both conditions satisfied for t > tPRI_UVLO+_DELAY EN Voltage Threshold VENABLE EN Resistance (Internal) REN_INT Regular Operation EN Disable Threshold BCM® Bus Converter Page 14 of 30 VEN_DISABLE_TH Rev 1.4 10/2017 MIN TYP MAX 250 µs 2.3 Internal pull up resistor UNIT V 1.5 kΩ 1 V BCM6123xD1E5135yzz PMBus™ Reported Characteristics Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted. Monitored Telemetry • The BCM communication version is not intended to be used without a Digital Supervisor. DIGITAL SUPERVISOR PMBusTM READ COMMAND ACCURACY (RATED RANGE) FUNCTIONAL REPORTING RANGE UPDATE RATE REPORTED UNITS Input voltage (88h) READ_VIN ± 5% (LL - HL) 130V to 450V 100µs VACTUAL = VREPORTED x 10-1 Input current (89h) READ_IIN ± 20% (10 - 20% of FL) ± 5% (20 - 133% of FL) -5.9A to 5.9A 100µs IACTUAL = IREPORTED x 10-3 Output voltage[1] (8Bh) READ_VOUT ± 5% (LL - HL) 16.25V to 56.25V 100µs VACTUAL = VREPORTED x 10-1 Output current (8Ch) READ_IOUT ± 20% (10 - 20% of FL) ± 5% (20 - 133% of FL) -47.5A to 47.5A 100µs IACTUAL = IREPORTED x 10-2 Output resistance (D4h) READ_ROUT ± 5% (50 - 100% of FL) at NL ± 10% (50 - 100% of FL) (LL - HL) 10mΩ to 40mΩ 100ms RACTUAL = RREPORTED x 10-5 (8Dh) READ_TEMPERATURE_1 ± 7°C (Full Range) - 55ºC to 130ºC 100ms TACTUAL = TREPORTED ATTRIBUTE Temperature[2] [1] [2] Default READ Output Voltage returned when unit is disabled = -300 V. Default READ Temperature returned when unit is disabled = -273°C. Variable Parameter • Factory setting of all below Thresholds and Warning limits are 100% of listed protection values. • Variables can be written only when module is disabled either EN pulled low or VIN < VIN_UVLO-. • Module must remain in a disabled mode for 3ms after any changes to the below variables allowing ample time to commit changes to EEPROM. ATTRIBUTE DIGITAL SUPERVISOR PMBusTM COMMAND [3] CONDITIONS / NOTES Input / Output Overvoltage Protection Limit (55h) VIN_OV_FAULT_LIMIT VIN_OVLO- is automatically 3% lower than this set point Input / Output Overvoltage Warning Limit (57h) VIN_OV_WARN_LIMIT Input / Output Undervoltage Protection Limit (D7h) DISABLE_FAULTS Can only be disabled to a preset default value ACCURACY (RATED RANGE) FUNCTIONAL REPORTING RANGE DEFAULT VALUE ± 5% (LL - HL) 130V to 435V 100% ± 5% (LL - HL) 130V to 435V 100% ± 5% (LL - HL) 130V or 260V 100% Input Overcurrent Protection Limit (5Bh) IIN_OC_FAULT_LIMIT ± 20% (10 - 20% of FL) ± 5% (20 - 133% of FL) 0 to 5.625A 100% Input Overcurrent Warning Limit (5Dh) IIN_OC_WARN_LIMIT ± 20% (10 - 20% of FL) ± 5% (20 - 133% of FL) 0 to 5.625A 100% Overtemperature Protection Limit (4Fh) OT_FAULT_LIMIT ± 7°C (Full Range) 0 to 125°C 100% Overtemperature Warning Limit (51h) OT_WARN_LIMIT ± 7°C (Full Range) 0 to 125°C 100% ± 50µs 0 to 100ms 0ms Turn on Delay [3] (60h) TON_DELAY Additional time delay to the Undervoltage Startup Delay Refer to Digital Supervisor datasheet for complete list of supported commands. BCM® Bus Converter Page 15 of 30 Rev 1.4 10/2017 BCM® Bus Converter Page 16 of 30 Rev 1.4 10/2017 VAUX TM OUTPUT OUTPUT OUTPUT EN +VPRI +VSEC BIDIR INPUT STARTUP tVAUX tPRI_UVLO+_DELAY VPRI_UVLO+ VµC_ACTIVE VPRI_OVLO+ VNOM OVER VOLTAGE VPRI_UVLO- VPRI_OVLO- up ll u N O P ER T N- AL PU OV R N T U TU TER UT E YO N NP G E U T IN Z I I R P O L Y TA IN U X IA NDA RN A R OL T A C I D V _ IN CO TU RIM V RI P VP N & µc SE E tAUTO-RESTART ENABLE CONTROL OVER CURRENT > tPRI_UVLO+_DELAY tSEC_OUT_SCP SHUTDOWN GE NT TA H L E W G EV VO LO HI S T F IT D D RE U U F P LE LE T RC IN N-O UL PUL PU CI Y P R N T R I R A TU LE LE C _D IM AB AB HO RI R S N P N P V E E RT TA BCM6123xD1E5135yzz BCM Module Timing Diagram BCM6123xD1E5135yzz High Level Functional State Diagram Application of input voltage to VPRI_DC VµC_ACTIVE < VPRI_DC < VPRI_UVLO+ STANDBY SEQUENCE VPRI_DC > VPRI_UVLO+ STARTUP SEQUENCE TM Low TM Low EN High EN High VAUX Low VAUX Low Powertrain Stopped Powertrain Stopped ENABLE falling edge, or OTP detected Fault Autorecovery FAULT SEQUENCE TM Low EN High VAUX Low Input OVLO or UVLO, Output OCP, or UTP detected ENABLE falling edge, or OTP detected Input OVLO or UVLO, Output OCP, or UTP detected Powertrain Stopped Short Circuit detected BCM® Bus Converter Page 17 of 30 tPRI_UVLO+_DELAY expired ONE TIME DELAY INITIAL STARTUP Rev 1.4 10/2017 SUSTAINED OPERATION TM PWM EN High VAUX High Powertrain Active BCM6123xD1E5135yzz Application Characteristics 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 260 275 290 305 320 335 350 365 380 395 PRI to SEC, Full Load Efficiency (%) PRI to SEC, Power Dissipation (W) Product is mounted and temperature controlled via top side cold plate, unless otherwise noted. All data presented in this section are collected data from primary sourced units processing power in forward direction.See associated figures for general trend data. 410 98.0 97.8 97.5 97.3 97.0 96.8 96.5 96.3 96.0 95.8 95.5 -40 -20 0 Primary Input Voltage (V) -40°C 25°C PRI to SEC, Efficiency (%) Figure 4 — No load power dissipation vs. VPRI_DC 99 98 97 96 95 94 93 92 91 90 89 88 0.0 3.5 7.0 VPRI: 80°C 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 88 80 72 64 56 48 40 32 24 16 8 0 0.0 3.5 7.0 Secondary Output Current (A) VPRI : 260V 400V 98 97 96 95 94 93 92 91 3.5 7.0 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 260V Figure 8 — Efficiency at TCASE = 25°C BCM® Bus Converter Page 18 of 30 100 260V 400V 410V 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 260V 400V 410V 72 64 56 48 40 32 24 16 8 0 0.0 3.5 7.0 Load Current (A) VPRI : 80 Figure 7 — Power dissipation at TCASE = -40°C PRI to SEC, Power Disipation PRI to SEC, Efficiency (%) VPRI : 99 0.0 60 Secondary Output Current (A) 410V Figure 6 — Efficiency at TCASE = -40°C 90 40 Figure 5 — Full load efficiency vs. temperature; VPRI_DC PRI to SEC, Power Dissipation TTOP SURFACE CASE: 20 Case Temperature (ºC) 400V 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 Load Current (A) 410V VPRI : 260V 400V Figure 9 — Power dissipation at TCASE = 25°C Rev 1.4 10/2017 410V 99 72 98 64 Power Dissipation (W) PRI to SEC, Efficiency (%) BCM6123xD1E5135yzz 97 96 95 94 93 92 91 90 56 48 40 32 24 16 8 0 0.0 3.5 7.0 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 0.0 3.5 7.0 Secondary Output Current (A) Secondary Output Current (A) VPRI : 260V 400V VPRI : 410V 50 40 30 20 10 -40 -20 0 20 40 60 80 100 Case Temperature (°C) ISEC_OUT: 400V 410V 300 250 200 150 100 50 0 0.0 3.5 7.0 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 Secondary Output Current (A) VPRI: 35A Figure 12 — RSEC vs. temperature; Nominal VPRI_DC ISEC_DC = 24A at TCASE = 80°C 400V Figure 13 — VSEC_OUT_PP vs. ISEC_DC ; No external CSEC_OUT_EXT. Board mounted module, scope setting: 20MHz analog BW Figure 14 — Full load ripple, 270µF CPRI_IN_EXT; No external CSEC_OUT_EXT. Board mounted module, scope setting: 20MHz analog BW BCM® Bus Converter Page 19 of 30 260V Figure 11 — Power dissipation at TCASE = 80°C Secondary Output Voltage Ripple (mV) PRI to SEC, Output Resistance (mΩ) Figure 10 — Efficiency at TCASE = 80°C 0 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 Rev 1.4 10/2017 BCM6123xD1E5135yzz Figure 15 — 0A – 35A transient response: CPRI_IN_EXT = 270µF, no external CSEC_OUT_EXT Figure 16 — 35A – 0A transient response: CPRI_IN_EXT = 270µF, no external CSEC_OUT_EXT Figure 17 — Start up from application of VPRI_DC = 400V, 50% ISEC_DC, 100% CSEC_OUT_EXT Figure 18 — Start up from application of EN with pre-applied VPRI_DC = 400V, 50% ISEC_DC, 100% CSEC_OUT_EXT BCM® Bus Converter Page 20 of 30 Rev 1.4 10/2017 BCM6123xD1E5135yzz General Characteristics Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit Mechanical Length L 62.96 / [2.479] 63.34 / [2.494] 63.72 / [2.509] mm/[in] Width W 22.67 / [0.893] 22.80 / [0.898] 22.93 / [0.903] mm/[in] Height H 7.11 / [0.280] mm/[in] Volume Vol Weight W Lead Finish Without Heatsink 7.21 / [0.284] 7.31 / [0.288] cm3/[in3] 10.41 / [0.636] 41 / [1.45] g/[oz] Nickel 0.51 2.03 Palladium 0.02 0.15 Gold 0.003 0.051 BCM6123xD1E5135yzz (T-Grade) -40 125 °C BCM6123xD1E5135yzz (M-Grade) -55 125 °C µm Thermal Operating Temperature Thermal Resistance Top Side Thermal Resistance Leads Thermal Resistance Bottom Side TINTERNAL θINT-TOP θINT-LEADS θINT-BOTTOM Estimated thermal resistance to maximum temperature internal component from isothermal top 1.33 °C/W Estimated thermal resistance to maximum temperature internal component from isothermal leads 5.64 °C/W Estimated thermal resistance to maximum temperature internal component from isothermal bottom 1.29 °C/W 34 Ws/°C Thermal Capacity Assembly BCM6123xD1E5135yzz (T-Grade) -55 125 °C BCM6123xD1E5135yzz (M-Grade) -65 125 °C Storage Temperature ESD Withstand BCM® Bus Converter Page 21 of 30 ESDHBM Human Body Model, “ESDA / JEDEC JDS-001-2012” Class I-C (1kV to < 2kV) ESDCDM Charge Device Model, “JESD 22-C101-E” Class II (200V to < 500V) Rev 1.4 10/2017 BCM6123xD1E5135yzz General Characteristics (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; Boldface specifications apply over the temperature range of -40°C ≤ TINTERNAL ≤ 125°C (T-Grade); All other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit 135 °C Soldering[1] Peak Temperature Top Case Safety Isolation voltage / Dielectric test VHIPOT PRIMARY to SECONDARY 4,242 PRIMARY to CASE 2,121 SECONDARY to CASE 2,121 Isolation Capacitance CPRI_SEC Unpowered Unit 620 Insulation Resistance RPRI_SEC At 500VDC 10 MTBF VDC 780 MIL-HDBK-217Plus Parts Count - 25°C Ground Benign, Stationary, Indoors / Computer 3.53 MHrs Telcordia Issue 2 - Method I Case III; 25°C Ground Benign, Controlled 3.90 MHrs cURus UL 60950-1 CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable Previous Part Numbers BCM400x500y1K8A3z BCM400x500y1K8A31 [1] Product is not intended for reflow solder attach. BCM® Bus Converter Page 22 of 30 pF MΩ cTUVus EN 60950-1 Agency Approvals / Standards 940 Rev 1.4 10/2017 BCM6123xD1E5135yzz PMBus™ System Diagram -OUT BCM SER-OUT -IN BCM SEC-IN-B PRI-OUT-B PRI-IN-C SEC-OUT-C PRI-COM RXD1 SEC-COM RXD4 VDDB RXD3 VDD RXD2 NC D44TL1A0 RXD1 VDD 5V EXT TXD4 NC NC TXD3 SSTOP 3 kΩ SDA TX D 1 ’ NC SEC-IN-A PRI-OUT-A SDA NC SER-IN SCL BCM EN NC Digital Isolator SGND SCL 3 kΩ VDD CP D Q SGND VCC D Flip-flop NC SADDR NC NC TXD1 TXD2 74LVC1G74DC 10 kΩ FDG6318P R2 10 kΩ EN Control 3.3V, at least 20mA when using 4xDISO Ref to Digital Isolator datasheet for more details SD RD Q SDA SCL Host µc PMBus R1 SGND The PMBus communication enabled bus converter provides accurate telemetry monitoring and reporting, threshold and warning limits adjustment, in addition to corresponding status flags. The BCM internal µC is referenced to primary ground. The Digital Isolator allows UART communication interface with the host Digital Supervisor at typical speed of 750kHz across the isolation barrier. One of the advantages of the Digital Isolator is its low power consumption. Each transmission channel is able to draw its internal bias circuitry directly from the input signal being transmitted to the output with minimal to no signal distortion. The Digital Supervisor provides the host system µC with access to an array of up to 4 BCMs. This array is constantly polled for status by the Digital Supervisor. Direct communication to individual BCM is enabled by a page command. For example, the page (0x00) prior to a telemetry inquiry points to the Digital Supervisor data and pages (0x01 – 0x04) prior to a telemetry inquiry points to the array of BCMs connected data. The Digital Supervisor constantly polls the BCM data through the UART interface. The Digital Supervisor enables the PMBus compatible host interface with an operating bus speed of up to 400kHz. The Digital Supervisor follows the PMBus command structure and specification. Please refer to the Digital Supervisor data sheet for more details. BCM® Bus Converter Page 23 of 30 Rev 1.4 10/2017 BCM6123xD1E5135yzz Sine Amplitude Converter™ Point of Load Conversion RSEC 1.77nH LPRI_IN_LEADS = 6.7nH + CPRI_INT_ESR 21.5mΩ CPRI_INT C IN 0.37µF VVPRIIN – 24.2mΩ I ISEC RCIN + + IPRI_Q IQ 25.8mA – K LPRI_INT = 0.56µH RCCSEC_INT_ESR OUT 139mΩ V•I 1/8 • ISEC LSEC_OUT_LEADS = 1.3nH ROUT OUT + 510µΩ 1/8 • VPRI CSEC_INT COUT 25.6µF – VSEC VOUT – Figure 19 — BCM module AC model The Sine Amplitude Converter (SAC™) uses a high frequency resonant tank to move energy from Primary to secondary and vice versa. The resonant LC tank, operated at high frequency, is amplitude modulated as a function of primary voltage and secondary current. A small amount of capacitance embedded in the primary and secondary stages of the module is sufficient for full functionality and is key to achieving high power density. Eq. (3) now becomes Eq. (1) and is essentially load independent, resistor R is now placed in series with VPRI. R R The BCM6123xD1E5135yzz SAC can be simplified into the preceeding model. Vin V PRI + – SAC™ SAC 1/8 KK==1/32 Vout V SEC At no load: VSEC = VPRI • K (1) Figure 20 — K = 1/8 Sine Amplitude Converter with series primary resistor K represents the “turns ratio” of the SAC. Rearranging Eq (1): K= VSEC The relationship between VPRI and VSEC becomes: VSEC = (VPRI – IPRI • R) • K (2) VPRI In the presence of load, VSEC is represented by: VSEC = VPRI • K – ISEC • RSEC Substituting the simplified version of Eq. (4) (IPRI_Q is assumed = 0A) into Eq. (5) yields: (3) VSEC = VPRI • K – ISEC • R • K2 and ISEC is represented by: ISEC = IPRI – IPRI_Q K (6) This is similar in form to Eq. (3), where RSEC is used to represent the characteristic impedance of the SAC™. However, in this case a real R on the primary side of the SAC is effectively scaled by K 2 with respect to the secondary. (4) RSEC represents the impedance of the SAC, and is a function of the RDSON of the primary and secondary MOSFETs and the winding resistance of the power transformer. IPRI_Q represents the quiescent current of the SAC control, gate drive circuitry, and core losses. Assuming that R = 1Ω, the effective R as seen from the secondary side is 16mΩ, with K = 1/8. The use of DC voltage transformation provides additional interesting attributes. Assuming that RSEC = 0Ω and IPRI_Q = 0A, BCM® Bus Converter Page 24 of 30 (5) Rev 1.4 10/2017 BCM6123xD1E5135yzz A similar exercise should be performed with the additon of a capacitor or shunt impedance at the primary input to the SAC. A switch in series with VPRI is added to the circuit. This is depicted in Figure 21. Low impedance is a key requirement for powering a highcurrent, low-voltage load efficiently. A switching regulation stage should have minimal impedance while simultaneously providing appropriate filtering for any switched current. The use of a SAC between the regulation stage and the point of load provides a dual benefit of scaling down series impedance leading back to the source and scaling up shunt capacitance or energy storage as a function of its K factor squared. However, the benefits are not useful if the series impedance of the SAC is too high. The impedance of the SAC must be low, i.e. well beyond the crossover frequency of the system. S VVin PRI + – SAC™ SAC K = 1/8 K = 1/32 C V SEC Vout A solution for keeping the impedance of the SAC low involves switching at a high frequency. This enables small magnetic components because magnetizing currents remain low. Small magnetics mean small path lengths for turns. Use of low loss core material at high frequencies also reduces core losses. Figure 21 — Sine Amplitude Converter with primary capacitor The two main terms of power loss in the BCM module are: A change in VPRI with the switch closed would result in a change in capacitor current according to the following equation: IC (t) = C dVPRI (7) dt nn No load power dissipation (PPRI_NL): defined as the power used to power up the module with an enabled powertrain at no load. nn Resistive loss (PRSEC): refers to the power loss across the BCM module modeled as pure resistive impedance. Assume that with the capacitor charged to VPRI, the switch is opened and the capacitor is discharged through the idealized SAC. In this case, Therefore, (8) IC = ISEC • K PSEC_OUT = PPRI_IN – PDISSIPATED = PPRI_IN – PPRI_NL – PRSEC (11) substituting Eq. (1) and (8) into Eq. (7) reveals: ISEC(t) = C K2 • dVSEC dt The above relations can be combined to calculate the overall module efficiency: (9) The equation in terms of the output has yielded a K 2 scaling factor for C, specified in the denominator of the equation. A K factor less than unity results in an effectively larger capacitance on the secondary when expressed in terms of the primary. With a K = 1/8 as shown in Figure 21, C = 1µF would appear as C = 64µF when viewed from the secondary. η= = PSEC_OUT PPRI_IN Rev 1.4 10/2017 = PPRI_IN – PPRI_NL – PRSEC PPRI_IN VPRI • IPRI – PPRI_NL – (ISEC)2 • RSEC = 1– BCM® Bus Converter Page 25 of 30 (10) PDISSIPATED = PPRI_NL + PRSEC VPRI • IPRI ( ) PPRI_NL + (ISEC)2 • RSEC VPRI • IPRI (12) BCM6123xD1E5135yzz Input and Output Filter Design Thermal Considerations A major advantage of SAC™ systems versus conventional PWM converters is that the transformer based SAC does not require external filtering to function properly. The resonant LC tank, operated at extreme high frequency, is amplitude modulated as a function of primary voltage and secondary current and efficiently transfers charge through the isolation transformer. A small amount of capacitance embedded in the primary and secondary stages of the module is sufficient for full functionality and is key to achieving power density. The ChiP package provides a high degree of flexibility in that it presents three pathways to remove heat from internal power dissipating components. Heat may be removed from the top surface, the bottom surface and the leads. The extent to which these three surfaces are cooled is a key component for determining the maximum current that is available from a ChiP, as can be seen from Figure 1. This paradigm shift requires system design to carefully evaluate external filters in order to: nn Guarantee low source impedance: To take full advantage of the BCM module’s dynamic response, the impedance presented to its primary terminals must be low from DC to approximately 5MHz. The connection of the bus converter module to its power source should be implemented with minimal distribution inductance. If the interconnect inductance exceeds 100nH, the input should be bypassed with a RC damper to retain low source impedance and stable operation. With an interconnect inductance of 200nH, the RC damper may be as high as 1µF in series with 0.3Ω. A single electrolytic or equivalent low-Q capacitor may be used in place of the series RC bypass. Since the ChiP has a maximum internal temperature rating, it is necessary to estimate this internal temperature based on a real thermal solution. Given that there are three pathways to remove heat from the ChiP, it is helpful to simplify the thermal solution into a roughly equivalent circuit where power dissipation is modeled as a current source, isothermal surface temperatures are represented as voltage sources and the thermal resistances are represented as resistors. Figure 22 shows the “thermal circuit” for a 6123 BCM in an application where the top, bottom, and leads are cooled. In this case, the BCM power dissipation is PDTOTAL and the three surface temperatures are represented as TCASE_TOP, TCASE_BOTTOM, and TLEADS. This thermal system can now be very easily analyzed using a SPICE simulator with simple resistors, voltage sources, and a current source. The results of the simulation would provide an estimate of heat flow through the various pathways as well as internal temperature. nn Further reduce primary and/or secondary voltage ripple without sacrificing dynamic response: Thermal Resistance Top Given the wide bandwidth of the module, the source response is generally the limiting factor in the overall system response. Anomalies in the response of the primary source will appear at the secondary of the module multiplied by its K factor. Thermal Resistance Bottom Power Dissipation (W) The module primary/secondary voltage ranges shall not be exceeded. An internal overvoltage lockout function prevents operation outside of the normal operating primary range. Even when disabled, the powertrain is exposed to the applied voltage and power MOSFETs must withstand it. Total load capacitance at the secondary of the BCM module shall not exceed the specified maximum. Owing to the wide bandwidth and low secondary impedance of the module, low-frequency bypass capacitance and significant energy storage may be more densely and efficiently provided by adding capacitance at the primary of the module. At frequencies <500kHz the module appears as an impedance of RSEC between the source and load. Within this frequency range, capacitance at the primary appears as effective capacitance on the secondary per the relationship defined in Eq. (13). CSEC_EXT = K2 Thermal Resistance Leads θINT-BOTTOM nn Protect the module from overvoltage transients imposed by the system that would exceed maximum ratings and induce stresses: CPRI_EXT MAX INTERNAL TEMP θINT-TOP TCASE_BOTTOM(°C) θINT-LEADS + – TLEADS(°C) + – + – Figure 22 — Top case, Bottom case and leads thermal model Alternatively, equations can be written around this circuit and analyzed algebraically: TINT – PD1 • θINT-TOP = TCASE_TOP TINT – PD2 • θINT-BOTTOM = TCASE_BOTTOM TINT – PD3 • θINT-LEADS = TLEADS PDTOTAL = PD1+ PD2+ PD3 Where TINT represents the internal temperature and PD1, PD2, and PD3 represent the heat flow through the top side, bottom side, and leads respectively. Thermal Resistance Top MAX INTERNAL TEMP θINT-TOP (13) Thermal Resistance Bottom θINT-BOTTOM This enables a reduction in the size and number of capacitors used in a typical system. Power Dissipation (W) TCASE_BOTTOM(°C) Thermal Resistance Leads θINT-LEADS TLEADS(°C) Figure 23 — Top case and leads thermal model BCM® Bus Converter Page 26 of 30 TCASE_TOP(°C) Rev 1.4 10/2017 + – TCASE_TOP(°C) + – BCM6123xD1E5135yzz Figure 23 shows a scenario where there is no bottom side cooling. In this case, the heat flow path to the bottom is left open and the equations now simplify to: VPRI TINT – PD1 • θINT-TOP = TCASE_TOP ZIN_EQ1 BCM®1 ZOUT_EQ1 R0_1 VSEC TINT – PD3 • θINT-LEADS = TLEADS PDTOTAL = PD1+ PD3 ZIN_EQ2 BCM®2 ZOUT_EQ2 R0_2 + DC Thermal Resistance Top Load MAX INTERNAL TEMP θINT-TOP Thermal Resistance Bottom Thermal Resistance Leads θINT-BOTTOM Power Dissipation (W) TCASE_BOTTOM(°C) θINT-LEADS TLEADS(°C) TCASE_TOP(°C) ZIN_EQn + – Figure 25 — BCM module array Figure 24 shows a scenario where there is no bottom side and leads cooling. In this case, the heat flow paths to the bottom and leads are left open and the equations now simplify to: Fuse Selection In order to provide flexibility in configuring power systems ChiP modules are not internally fused. Input line fusing of ChiP products is recommended at system level to provide thermal protection in case of catastrophic failure. TINT – PD1 • θINT-TOP = TCASE_TOP PDTOTAL = PD1 Please note that Vicor has a suite of online tools, including a simulator and thermal estimator which greatly simplify the task of determining whether or not a BCM thermal configuration is valid for a given condition. These tools can be found at: http://www.vicorpower.com/powerbench.. The performance of the SAC™ topology is based on efficient transfer of energy through a transformer without the need of closed loop control. For this reason, the transfer characteristic can be approximated by an ideal transformer with a positive temperature coefficient series resistance. This type of characteristic is close to the impedance characteristic of a DC power distribution system both in dynamic (AC) behavior and for steady state (DC) operation. When multiple BCM modules of a given part number are connected in an array they will inherently share the load current according to the equivalent impedance divider that the system implements from the power source to the point of load. Some general recommendations to achieve matched array impedances include: nn Dedicate common copper planes within the PCB to deliver and return the current to the modules. nn Provide as symmetric a PCB layout as possible among modules nn An input filter is required for an array of BCMs in order to prevent circulating currents. The fuse shall be selected by closely matching system requirements with the following characteristics: nn Current rating (usually greater than maximum current of BCM module) nn Maximum voltage rating (usually greater than the maximum possible input voltage) nn Ambient temperature nn Nominal melting I2t nn Recommend fuse: See safety agency approvals. Reverse Operation BCM modules are capable of reverse power operation. Once the unit is started, energy will be transferred from the secondary back to the primary whenever the secondary voltage exceeds VPRI • K. The module will continue operation in this fashion for as long as no faults occur. Transient operation in reverse is expected in cases where there is significant energy storage on the output and transient voltages appear on the input. The BCM6123xD1E5135y0R and BCM6123xD1E5135y0P are both qualified for continuous operation in reverse power condition. A primary voltage of VPRI_DC > VPRI_UVLO+_R must be applied first to allow the primary reference controller and power train to start. Continuous operation in reverse is then possible after a successful startup. For further details see AN:016 Using BCM Bus Converters in High Power Arrays. BCM® Bus Converter Page 27 of 30 ZOUT_EQn R0_n Figure 24 — Top case thermal model Current Sharing BCM®n Rev 1.4 10/2017 BCM6123xD1E5135yzz BCM Module Through Hole Package Mechanical Drawing and Recommended Land Pattern 63.34±.38 2.494±.015 11.43 .450 31.67 1.247 0 1.52 .060 (2) PL. 11.40 .449 0 22.80±.13 .898±.005 0 1.52 .060 (4) PL. 0 1.02 .040 (3) PL. TOP VIEW (COMPONENT SIDE) .05 [.002] SEATING 7.21±.10 .284±.004 . PLANE .41 .016 (9) PL. 30.91 1.217 0 30.91 1.217 4.17 .164 (9) PL. 8.25 .325 2.75 .108 2.75 .108 8.00 .315 0 0 1.38 .054 1.38 .054 4.13 .162 8.00 .315 0 8.25 .325 BOTTOM VIEW 0 8.00±.08 .315±.003 4.13±.08 .162±.003 1.38±.08 .054±.003 8.00±.08 .315±.003 +VPRI 0 -VSEC TM / SER-OUT 0 EN VAUX / SER-IN -VPRI 2.03 .080 PLATED THRU .25 [.010] ANNULAR RING (2) PL. 2.75±.08 .108±.003 -VSEC 8.25±.08 .325±.003 RECOMMENDED HOLE PATTERN (COMPONENT SIDE) 1- RoHS COMPLIANT PER CST-0001 LATEST REVISION. 2- UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE MM / [INCH] Rev 1.4 10/2017 2.75±.08 .108±.003 +VSEC NOTES: BCM® Bus Converter Page 28 of 30 8.25±.08 .325±.003 +VSEC 0 1.38±.08 .054±.003 30.91±.08 1.217±.003 30.91±.08 1.217±.003 1.52 .060 PLATED THRU .25 [.010] ANNULAR RING (3) PL. 2.03 .080 PLATED THRU .38 [.015] ANNULAR RING (4) PL. BCM6123xD1E5135yzz Revision History Revision Date 1.0 08/4/16 Release of current data sheet with new part number 1.1 01/16/17 Updated the output resistance in the reverse direction 1.2 08/04/17 Updated height specification 1, 21, 28 1.3 09/15/17 Updated volume specification 21 1.4 10/10/17 Updated secondary to primary output resistance 9 BCM® Bus Converter Page 29 of 30 Description Rev 1.4 10/2017 Page Number(s) n/a 9 BCM6123xD1E5135yzz Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power systems. Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. 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All other trademarks, product names, logos and brands are property of their respective owners. BCM® Bus Converter Page 30 of 30 Rev 1.4 10/2017