UMS CHA3024-QGG 2-22ghz lna with agc Datasheet

CHA3024-QGG
2-22GHz LNA with AGC
UMS
A3667A
A3688A
YYWWG
SMU
A8
78
663A
GWWYY
GaAs Monolithic Microwave IC
Description
The CHA3024-QGG is a distributed Low
Noise Amplifier with Adjustable Gain Control
(AGC) that operates between 2 and 22GHz.
It is designed for a wide range of
applications, such as electronic warfare, X
and Ku Point to Point Radio, and test
instrumentation.
The circuit is manufactured using a 0.15µm
gate length pHEMT process, with via holes
through the substrate, air bridges and optical
gate lithography.
The part is supplied as 5x5 QFN package
with input and output RF accesses matched
to 50 ohms.
YYWWG
UMS
UMS
A3667A
A3688A
UMS
A3024
UMS
A3667A
A3688A
A3667A
A3688A
YYWW
YYWWG
YYWWG
UMS
3667A
3688A
YWWG
SMU
A8
78
663A
GWWYY
UMS
A3688A
A3667A
YYWWG
SMU
A878663
GWWY
Main Features
■ Broadband performances: 2-22GHz
■ Typical Linear Gain: 15dB
■ Up to 30dB AGC with Vg2
■ P1dB: 18dBm
■ Psat: 20dBm
■ OIP3: 28dBm
■ Typical Noise Figure: 3dB
■ DC bias: Vd=5V@Id=100mA, Vg1=-0.3V
and Vg2=1.7V.
■ 28L QFN 5x5
Linear Gain, Return Losses (dB)
20
Linear gain, Return Losses (dB)
UMS
15
10
5
0
S11(dB)
S22(dB)
S21(dB)
Noise (dB)
-5
-10
-15
-20
-25
-30
0
2
4
6
8
10 12 14 16
Frequency (GHz)
18
20
22
24
Main Electrical Characteristics
Tamb.= +25°C
Symbol
Parameter
Freq
Frequency range
Gain
Linear Gain
NF
Noise Figure
Pout
Output Power @1dB comp.
Ref. : DSCHA3024-QGG-4346 - 12 Dec 14
Min
2
Typ
Max
22
15
3
18
1/16
Unit
GHz
dB
dB
dBm
Specifications subject to change without notice
United Monolithic Semiconductors S.A.S.
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
2-22GHz LNA with AGC
CHA3024-QGG
Electrical Characteristics
Tamb.= +25°C,Vg1 to be set in order to have Idq=100mA, Vg2=1.7V
Symbol
Parameter
Min
Typ
Max
Unit
Freq
Frequency range
2
22
GHz
Gain
Linear Gain
15
dB
ΔG
Gain Control (with Vg2 variation)
30
dB
NF
Noise Figure
3
dB
IRL
Input Return Loss
17
dB
ORL
Output Return Loss
16
dB
P1dB
Output power for 1dB Gain Compression
18
dBm
Psat
Saturated output power
20
dBm
OIP3
Output Third Order Intercept
28
dBm
Idq
Quiescent current on Vd
100
mA
Vd
Supply voltage on Vd
4.5
5
5.5
V
Id
Drain current @3dB gain compression
125
mA
The values are representative of typical “test fixture” measurements as defined on the
drawing in paragraph “Proposed Evaluation Board”.
Typical Bias Conditions
Tamb.= +25°C
Symbol
Pin
Parameter
Values
Unit
Vg1
13
Gate control1 for the amplifier
-0.4
V
Vg2
1
Gate control2 for the amplifier
1.7
V
Vd
25
Drain Voltage
5
V
The associated drain current with no RF input power is Idq=100mA
This typical bias is recommended in order to get the best compromise between output
power, linearity and Noise Figure performance vs. Temperature.
Ref. : DSCHA3024-QGG-4346 - 12 Dec 14
2/16
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
2-22GHz LNA with AGC
CHA3024-QGG
Absolute Maximum Ratings (1)
Tamb.= +25°C
Symbol
Parameter
Values
Unit
Vd
Drain bias voltage
7V
V
Idq
Drain bias current
190
mA
Vg1
Gate bias voltage Vg1
-2 to 1
V
Vg2
Gate bias voltage Vg2
-2 to 2
V
Pin
Maximum CW input power overdrive
15
dBm
Ta
Operating temperature range (chip backside)
-40 to 85
°C
Tstg
Storage temperature range
-55 to +150
°C
(1)
Operation of this device above anyone of these parameters may cause permanent
damage: these maximum ratings parameters could not be cumulated.
These are stress ratings only, and functional operation of the device at these conditions is
not implied.
Ref. : DSCHA3024-QGG-4346 - 12 Dec 14
3/16
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
2-22GHz LNA with AGC
CHA3024-QGG
Device thermal performance
All the figures given in this section are obtained assuming that the QFN device is cooled
down only by conduction through the package thermal pad (no convection mode considered).
The temperature is monitored at the package back-side interface (Tcase) as shown below.
The system maximum temperature must be adjusted in order to guarantee that Tcase
remains below the maximum value specified in the next table. So, the system PCB must be
designed to comply with this requirement.
A derating must be applied on the dissipated power if the Tcase temperature cannot be
maintained below the maximum temperature specified (see the curve Pdiss. Max) in order to
guarantee the nominal device life time (MTTF).
The provided thermal information in the next chart is for nominal biasing point: Idq=100mA
and Vd=5V, without RF drive.
DEVICE THERMAL SPECIFICATION : Product name
Recommended max. junction temperature (Tj max)
:
114
Junction temperature absolute maximum rating
:
175
Max. continuous dissipated power (Pdiss. Max.)
:
0.5
=> Pdiss. Max. derating above Tcase(1)= 85
°C :
17
Junction-Case thermal resistance (Rth J-C)(2)
:
57.7
Minimum Tcase operating temperature(3)
:
-40
(3)
Maximum Tcase operating temperature
:
85
Minimum storage temperature
:
-55
Maximum storage temperature
:
150
°C
°C
W
mW/°C
°C/W
°C
°C
°C
°C
(1) Derating at junctio n temperature co nstant = Tj max.
(2) Rth J-C is calculated fo r a wo rst case co nsidering the ho t t e s t junc t io n o f the M M IC and all the devices biased.
(3) Tcase=P ackage back side temperature measured under the die-attach-pad (see the drawing belo w).
0.6
0.4
0.3
0.2
0.1
Pdiss. Max. @Tj <Tj max (W)
0
-50
-25
0
25
50
75
100
125
Pdiss. Max. @Tj <Tj max (W)
0.5
Tcase
Example: QFN 16L 3x3
Location of temperature
reference point (Tcase)
on package's bottom side
Tcase (°C)
6.5
Under RF drive, for Tcase=+85°C, with Vd=5V, Id=140mA, Pout=21.6 dBm , Pdiss=0.57W
then Tj max=117 °C.
Ref. : DSCHA3024-QGG-4346 - 12 Dec 14
4/16
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
2-22GHz LNA with AGC
CHA3024-QGG
Typical Board Measurements
Tamb.= +25°C, Vd=5V, Vg1 set in order to get Idq =100mA, Vg2=1.7V
Linear
Gain,
Return
(dB)
Linear
Gain and
Return
LossesLosses
versus Frequency
Linear gain, Return Losses (dB)
20
15
10
5
S11(dB)
0
S22(dB)
-5
S21(dB)
-10
-15
-20
-25
-30
0
2
4
6
8
10 12 14 16
Frequency (GHz)
18
20
22
24
26
18
20
22
24
26
Noise Figure
versus(dB)
frequency
Noise Figure
10
9
Noise Figure (dB)
8
7
6
5
4
3
2
1
0
0
2
4
6
Ref. : DSCHA3024-QGG-4346 - 12 Dec 14
8
10 12 14 16
Frequency (GHz)
5/16
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
2-22GHz LNA with AGC
CHA3024-QGG
Typical Board Measurements
Tamb.= +25°C, Vd =5V, Vg1 set in order to get Idq =100mA, Vg2=1.7V
Linear
Return
Losses
(dB)Frequency
Broadband
Linear Gain,
Gain and
Return Losses
versus
Linear gain, Return Losses (dB)
20
15
10
5
S11(dB)
0
S22(dB)
-5
S21(dB)
-10
-15
-20
-25
-30
0
5
10
15
20
25
Frequency (GHz)
30
35
40
S21 (dB)
vs.
Id (Vg2
control)
Gain tuning versus
Id (Vg2
variation)
with
Vd=5V and Vg1=-0.4V
20
15
S21 (dB)
10
Id=100mA
Id=83mA
Id=58mA
Id=50mA
Id=45mA
Id=38mA
Id=29mA
Id=18mA
Id=8mA
5
0
-5
-10
-15
-20
0
2
4
6
8
Ref. : DSCHA3024-QGG-4346 - 12 Dec 14
10 12 14 16 18 20 22 24 26
Frequency (GHz)
6/16
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
2-22GHz LNA with AGC
CHA3024-QGG
Typical Board Measurements
Tamb.= +25°C, +85°C,-40°C, Vd =5V, Vg1 set in order to get Idq =100mA, Vg2=1.7V
Vg1 and Vg2 remain constant versus temperature.
Linear gain (dB)
Linear
Gain Gain
vs Temperature
Linear
(dB)
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
S21(dB) @25 C
S21(dB) @85 C
S21(dB) @-40 C
0
2
4
6
8
10 12 14 16
Frequency (GHz)
18
20
22
24
26
18
20
22
24
26
(dB)
Noise Noise
FigureFigure
vs Temperature
10
9
Noise Figure (dB)
8
NF @Tc=25°C
7
NF @Tc=85°C
6
NF@Tc=-40°C
5
4
3
2
1
0
0
2
4
6
Ref. : DSCHA3024-QGG-4346 - 12 Dec 14
8
10 12 14 16
Frequency (GHz)
7/16
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
2-22GHz LNA with AGC
CHA3024-QGG
Typical Board Measurements
Tamb.= +25°C, Vd =5V, Vg1 set in order to get Idq =100/125 mA , Vg2=1.7V
Pout (dBm)
Output power
(dBm)compression
vs. compression
level
Pout versus
level
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
0
P1dB_Idq_100mA
P1dB_Idq_125mA
Psat_Idq_100mA
Psat_Idq_125mA
0
2
4
6
8
10 12 14 16
Frequency (GHz)
18
20
22
24
18
20
22
24
TOITOI
(dBm)
IdqIdq
Output
(dBm)vs.
versus
34
32
TOI (dBm)
30
28
26
24
Idq=100mA
22
Idq=125mA
20
18
16
0
2
4
6
Ref. : DSCHA3024-QGG-4346 - 12 Dec 14
8
10 12 14 16
Frequency (GHz)
8/16
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
2-22GHz LNA with AGC
CHA3024-QGG
Typical Board Measurements
Tamb.= +25°C, Vd =5V, Vg1 set in order to get Idq =100mA, Vg2=1.7V
Pout
(dBm), Gain
(dB),
(mA)@@12
GHzGHz
Main
Performance
versus
PinId
(dBm)
Freq=12
25
260
Pout
Id
20
220
15
180
10
140
5
100
0
60
-10
-8
-6
-4
-2
0
2
Pin (dBm)
4
6
8
10
Drain current (mA)
Pout (dBm), Gain (dB)
Gain
12
GainMain
(dB),Performance
P1dB (dBm),
PsatVg2
(dBm),
(mA) @12
versus
(V) @IdFreq=12
GHz GHz
20
200
Gain
P1dB
Psat
Id
160
15
120
10
80
5
40
0
0
-1 -0.75 -0.5 -0.25 0
Ref. : DSCHA3024-QGG-4346 - 12 Dec 14
0.25 0.5 0.75
Vg2 (V)
9/16
1
1.25 1.5 1.75
2
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
Drain current (mA) @ P1dB
Gain (dB), P1dB (dBm), Psat (dBm)
25
2-22GHz LNA with AGC
CHA3024-QGG
Package outline: 28 Leads 5x5 QFN (1)
Matte tin, Lead Free
Units :
From the standard :
(Green)
mm
JEDEC MO-220
(VHHD)
29- GND
12345678910-
VG2
Nc
Nc
RF in
GND(2)
Nc
Nc
Nc
Nc
Nc
11121314151617181920-
Nc
Nc
VG1
Nc
Nc
Nc
Nc
GND(2)
RF out
Nc
2122232425262728-
Nc
Nc
Nc
Nc
VD
Nc
Nc
Nc
(1)
The package outline drawing included to this data-sheet is given for indication. Refer to the
application note AN0017 (http://www.ums-gaas.com) for exact package dimensions.
(2)
It is strongly recommended to ground all pins marked “Gnd” through the PCB board.
Ensure that the PCB board is designed to provide the best possible ground to the package.
Ref. : DSCHA3024-QGG-4346 - 12 Dec 14
10/16
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
2-22GHz LNA with AGC
CHA3024-QGG
Application Circuit:
Vd
Vg2
10nF
100pF
10nF
100pF
RFIN
25
1
4
19
RFOUT
13
CHA3024-QGG
100pF
10nF
Vg1
Depending on the board, additional capacitors such as 1µF may be added on each biasing
access if necessary, for better low frequency decoupling.
Pin Description:
Pin
Symbol
Description
5,18, 29 (exposed PAD)
GND
2,3,6,7,8,9,10,11,12,14,15,
16,17,20,21,22,23,24,26,27,28
4
13
19
25
1
NC
Must be grounded properly, internal
connections to ground are made
No internal connections
RF IN
VG1
RF OUT
VD
VG2
RF input
Gate voltage, bias network required
RF output
Drain voltage, bias network required
Gate voltage bias network required
UMS recommends also to ground Pin 2,3,5,6,7,15,16,17,18,20,21 (see proposed footprint
p14).
Ref. : DSCHA3024-QGG-4346 - 12 Dec 14
11/16
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
2-22GHz LNA with AGC
CHA3024-QGG
Proposed Evaluation Board
Compatible with the proposed footprint on page p14.
Top dielectric material is Rogers 4003 / 8mils or equivalent substrate.
Decoupling capacitors at first level are 100pF.
Decoupling capacitors at second level are 10nF.
Additional capacitors such as 1µF may also be added on each DC access.
Ref. : DSCHA3024-QGG-4346 - 12 Dec 14
12/16
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
2-22GHz LNA with AGC
CHA3024-QGG
Device Operation
Device Power Up instructions:
1)
2)
3)
4)
5)
6)
Ground the device.
Set Vg1 to -1.5V.
Set Vd to 5V (nominal value for Vd).
Set Vg2 to 1.7V (nominal value for Vg2).
Set Vg1 in the range of -0.3V for having Idq=100mA.
Apply RF input power and adjust Vg2 to obtain desired gain.
Device Power Down instructions:
1)
2)
3)
4)
5)
6)
Set Vg2 to 1.7V.
Turn RF power supply off.
Set Vg1 to -1.5V in order to get Idq=0mA.
Set Vg2 to 0V.
Set Vd to 0V.
Set Vg1 to 0V.
DC Schematic
Vd=5V, Vg1=-0.3V, Vg2=1.7V, Idq=100mA
Vd
RF out
Vg2
150 ohms
50 ohms
RF in
Cell n
Cell 1
300 ohms
Vg1
Ref. : DSCHA3024-QGG-4346 - 12 Dec 14
13/16
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
2-22GHz LNA with AGC
CHA3024-QGG
Package footprint and Definition of the measurements planes
The reference planes used for the provided
measurements are symmetrical from the
symmetrical axis of the package (see
drawing beside). The input and output
reference planes are located at 3.65 mm
offset (input wise and output wise
respectively) from this axis.
From the edge of the QFN, the reference
planes are 1.15mm apart.
3.65 mm
3.65 mm
Package Information
Parameter
Package body material
Lead finish
MSL Rating
Ref. : DSCHA3024-QGG-4346 - 12 Dec 14
Value
RoHS-compliant
Low stress Injection Molded Plastic
100% matte tin (Sn)
MSL3
14/16
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
2-22GHz LNA with AGC
CHA3024-QGG
Note
Ref. : DSCHA3024-QGG-4346 - 12 Dec 14
15/16
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
2-22GHz LNA with AGC
CHA3024-QGG
Recommended package footprint
Refer to the application note AN0017 available at http://www.ums-gaas.com for package foot
print recommendations.
SMD mounting procedure
For the mounting process standard techniques involving solder paste and a suitable reflow
process can be used. For further details, see application note AN0017.
Recommended environmental management
UMS products are compliant with the regulation in particular with the directives RoHS
N°2011/65 and REACh N°1907/2006. More environmental data are available in the
application note AN0019 also available at http://www.ums-gaas.com.
Recommended ESD management
Refer to the application note AN0020 available at http://www.ums-gaas.com for ESD
sensitivity and handling recommendations for the UMS package products.
Ordering Information
QFN 28L 5x5 package:
CHA3024-QGG/XY
Stick: XY = 20
Tape & reel: XY = 21
Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors
S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of
patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use
as critical components in life support devices or systems without express written approval from United
Monolithic Semiconductors S.A.S.
Ref. : DSCHA3024-QGG-4346 - 12 Dec 14
16/16
Specifications subject to change without notice
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
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