DSC61XX Ultra-Small, Ultra-Low Power MEMS Oscillator Features General Description • Wide Frequency Range: 2 KHz to 100 MHz • Ultra–Low Power Consumption: 3 mA/12 A (Active/Standby) • Ultra-Small Footprints - 1.6 mm 1.2 mm - 2.0 mm 1.6 mm - 2.5 mm 2.0 mm - 3.2 mm 2.5 mm • Frequency Select Input Supports 2 Predefined Frequencies • High Stability: ±25, ±50 ppm • Wide Temperature Range - Industrial: –40°C to 85°C - Ext. Commercial: –20° to 70°C • Excellent Shock & Vibration Immunity - Qualified to MIL-STD-883 • High Reliability - 20x Better MTF Than Quartz Oscillators • Supply Range of 1.71V to 3.63V • Short Sample Lead Time: <2 weeks • Lead Free & RoHS Compliant The DSC61xx family of MEMS oscillators combines the industry leading low power consumption and ultra-small packages with exceptional frequency stability and jitter performance over temperature. The single-output DSC61xx MEMS oscillators are excellent choices for use as clock references in small, battery-powered devices such as wearable and Internet of Things (IoT) devices in which small size, low power consumption, and long-term reliability are paramount. They also meet the stringent mechanical durability and reliability requirements within Automotive Electronics Council standard Q100 (AEC-Q100), so they are well suited for under-hood applications as well. Applications • Low Power/portable Applications - IoT, Embedded/smart Devices • Consumer - Home Healthcare, Fitness Devices, Home Automation • Automotive - Rear View/surround View Cameras, Infotainment System • Industrial - Building/ Factory Automation, Surveillance Camera The DSC61xx family is available in ultra-small 1.6 mm x 1.2 mm and 2.0 mm x 1.6 mm packages. Other package sizes include: 2.5 mm x 2.0 mm and 3.2 mm x 2.5 mm. These packages are “drop-in” replacements for standard 4-pin CMOS quartz crystal oscillators. Package Types DSC61XX 3.2x2.5 DFN Top View DSC61XX 2.5x2.0 LGA Top View 4 3 1 2 DSC61XX 2.0x1.6 LGA Top View 4 4 3 1 2 DSC61XX 1.6x1.2 LGA Top View 3 4 1 1 2016 Microchip Technology Inc. 3 2 2 DS20005624A-page 1 DSC61XX Block Diagram DSC6101/02/11/12/21/22/41/42/51/52/61/62 DIGITAL CONTROL SUPPLY REGULATION VDD PIN 4 OE/STBY/FS PIN 1 MEMS RESONATOR GND PIN 2 TEMP SENSOR CONTROL & COMPENSATION PLL VCO OUTPUT DIVIDER DRIVER OUTPUT PIN 3 DSC6183 (kHz Output) P1 OUTPUT SUPPLY REGULATION DRIVER P4 VDD MEMS RESONATOR P2 GND DS20005624A-page 2 TEMP SENSOR CONTROL & COMPENSATION PLL VCO OUTPUT DIVIDER P3 DNC 2016 Microchip Technology Inc. DSC61XX 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Supply Voltage .......................................................................................................................................... –0.3V to +4.0V Input Voltage, VIN ............................................................................................................................... –0.3V to VDD+0.3V ESD Protection .......................................................................................................4000V HBM, 400V MM, 2000V CDM DSC61XX ELECTRICAL CHARACTERISTICS Electrical Characteristics: Unless otherwise indicated, VDD= 1.8V –5% to 3.3V +10%, TA= –40°C to 85°C. Parameters Sym. Min. Typ. Max. Units Conditions Supply Voltage, Note 1 VDD 1.71 — 3.63 V — Active Supply Current IDD — 3.0 — mA FOUT = 27 MHz, VDD = 1.8V, No Load — 12 — VDD = 1.8/2.5V — 80 — A — — ±25 ±50 ppm All temp ranges — — ±5 — — ±1 Standby Supply Current Note 2 ISTBY VDD = 3.3V Frequency Stability Note 3 Δf Aging Δf Startup Time tSU — — 1.3 ms Input Logic Levels Note 4 Input Logic High Input Logic Low VIH 0.7xVDD — — V VIL — — 0.3xVDD V Output Disable Time Note 5 tDA — — 200+Period ns — Output Enable Time Note 6 tEN — — 1 s — Enable Pull-up Resistor Note 7 — — 300 — k If configured VOH 0.8xVDD — — V I = 6mA VOL — — 0.2xVDD V I = –6mA Output Logic Levels Output Logic High Output Logic Low Note 1: 2: 3: 4: 5: 6: 7: ppm 1st year @25°C Per year after first year From 90% VDD to valid clock output, T = 25°C — Pin 4 VDD should be filtered with 0.1 uf capacitor. Not including current through pull-up resistor on EN pin (if configured). Higher standby current seen at >3.3V VDD. Includes frequency variations due to initial tolerance, temp. and power supply voltage. Input waveform must be monotonic with rise/fall time < 10 ms Output Disable time takes up to 1 Period of the output waveform + 200 ns. For parts configured with OE, not Standby. Output is enabled if pad is floated or not connected. 2016 Microchip Technology Inc. DS20005624A-page 3 DSC61XX DSC61XX ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: Unless otherwise indicated, VDD= 1.8V –5% to 3.3V +10%, TA= –40°C to 85°C. Parameters Sym. Min. Typ. Max. Units Conditions — 1 1.5 ns — 0.5 1.0 ns DSC61X2 VDD = 1.8V High Drive, 20% to 80% CL=15 pF VDD = 2.5V/3.3V — 1.2 2.0 ns — 1.5 2.2 ns DSC61X1 VDD = 1.8V Std Drive, 20% to 80% CL=10 pF VDD = 2.5V/3.3V f0 0.002 — 100 MHz Output on Pin 1 for < 1 MHz Output Duty Cycle SYM 45 — 55 % — Period Jitter, RMS JPER — 9.5 11 — 7.5 9 — 50 70 — 35 60 tRX/tFX Output Transition Time Rise Time/Fall Time tRY/tFY Frequency Cycle-to-Cycle Jitter (peak) Note 1: 2: 3: 4: 5: 6: 7: JCy–Cy psRMS FOUT = 27 MHz ps FOUT = 27 MHz VDD = 1.8V VDD = 2.5V/3.3V VDD = 1.8V VDD = 2.5V/3.3V Pin 4 VDD should be filtered with 0.1 uf capacitor. Not including current through pull-up resistor on EN pin (if configured). Higher standby current seen at >3.3V VDD. Includes frequency variations due to initial tolerance, temp. and power supply voltage. Input waveform must be monotonic with rise/fall time < 10 ms Output Disable time takes up to 1 Period of the output waveform + 200 ns. For parts configured with OE, not Standby. Output is enabled if pad is floated or not connected. DS20005624A-page 4 2016 Microchip Technology Inc. DSC61XX TEMPERATURE SPECIFICATIONS Parameters Sym. Min. Typ. Max. Units Conditions TJ — +150 — °C — Storage Temperature Range TA –55 — +150 °C — Soldering Temperature TS — +260 — °C 40 Sec. Max. Temperature Ranges Junction Operating Temperature 2016 Microchip Technology Inc. DS20005624A-page 5 DSC61XX 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1. TABLE 2-1: DSC6101/03/11/13/21/23/41/43/51/53/61/63 PIN FUNCTION TABLE (OUTPUT FREQUENCY ≥1MHZ) Pin Number Pin Name Pin Type Output Enable: H = Specified Frequency Output, Note 1 L = Output is high impedance OE 1 STDBY I 2 GND 3 Output O 4 VDD Power Power Power supply ground Oscillator clock output Power supply DSC610x/1x/2x has 300 kΩ internal pull-up resistor on pin1. DSC614x/5x/6x has no internal pull-up resistor on pin1 and needs external pull-up or being driven by other chip. Two pre-programmed frequencies can be configured at http://clockworks.microchip.com/timing/ Bypass with 0.1μF capacitor placed as close to VDD pin as possible. 2: 3: TABLE 2-2: DSC6183 PIN FUNCTION TABLE (OUTPUT FREQUENCY <1MHZ) Pin Number Pin Name Pin Type 1 Output O 2 GND Power 3 DNC DNC 4 VDD Power Note 1: Standby: H = Specified Frequency Output, Note 1 L = Output is high impedance. Device is in low power mode, supply current is at ISTBY Frequency Select: H = Output Frequency 1, Note 2 L = Output Frequency 2 FS Note 1: Description Description Kilohertz Oscillator clock output Power supply ground Do Not Connect Power supply, Note 1 Bypass with 0.1 μF capacitor placed as close to VDD pin as possible. DSC61xx family is available in multiple output driver configurations. The standard-drive (61x1) and high-drive (61x2) deliver respective output currents of greater than 3 mA and 6 mA at 20%/80% of the supply voltage. For heavy loads of 15 pF or higher, the high-drive option is recommended. DS20005624A-page 6 2016 Microchip Technology Inc. DSC61XX 3.0 OUTPUT WAVEFORM FIGURE 3-1: OUTPUT WAVEFORM tR tF VOH OUTPUT VOL tEN 1/fo tDA VIH ENABLE 2016 Microchip Technology Inc. VIL DS20005624A-page 7 DSC61XX 4.0 TEST CIRCUIT FIGURE 4-1: TEST CIRCUIT µ DS20005624A-page 8 4 3 1 2 CL 2016 Microchip Technology Inc. DSC61XX 5.0 BOARD LAYOUT (RECOMMENDED) FIGURE 5-1: BOARD LAYOUT (RECOMMENDED) 2016 Microchip Technology Inc. DS20005624A-page 9 DSC61XX 6.0 SOLDER REFLOW PROFILE FIGURE 6-1: SOLDER REFLOW 20-40 Sec Se ax cM Se 3C / Reflow Pre heat 8 min max x. 25°C 60-180 Sec Ma 150°C 60-150 Sec ec . 3C / 217°C 200°C S 6C/ Temperature (°C) cM ax . 260°C Cool Time MSL 1 @ 260°C refer to JSTD-020C Ramp-Up Rate (200°C to Peak Temp) 3°C/Sec Max. Preheat Time 150°C to 200°C 60-180 Sec Time maintained above 217°C 60-150 Sec Peak Temperature 255-260°C Time within 5°C of actual Peak Ramp-Down Rate Time 25°C to Peak Temperature DS20005624A-page 10 20-40 Sec 6°C/Sec Max. 8 min. Max. 2016 Microchip Technology Inc. DSC61XX 7.0 PACKAGING INFORMATION 4-Lead VFLGA 1.6 mm x 1.2 mm Package Outline 4-Lead Very Thin Fine Pitch Land Grid Array (ARA) - 1.6x1.2 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A B N (DATUM A) (DATUM B) NOTE 1 E 2X 0.05 C 1 2X 2 TOP VIEW 0.05 C 0.10 C A1 A C SEATING PLANE 4X (A3) 0.08 C SIDE VIEW b2 3X b1 CH 1 2 CH NOTE 1 0.07 0.03 C A B C e1 e1 2 4X L N e BOTTOM VIEW Microchip Technology Drawing C04-1199A Sheet 1 of 2 2016 Microchip Technology Inc. DS20005624A-page 11 DSC61XX 4-Lead VFLGA 1.6 mm x 1.2 mm Package Outline 4-Lead Very Thin Fine Pitch Land Grid Array (ARA) - 1.6x1.2 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits Number of Terminals N e Terminal Pitch Terminal Pitch e1 A Overall Height Standoff A1 Substrate Thickness (with Terminals) A3 Overall Length D E Overall Width b1 Terminal Width Terminal Width b2 L Terminal Length Terminal 1 Index Chamfer CH MILLIMETERS NOM MAX 4 1.20 BSC 0.75 BSC 0.79 0.89 0.84 0.00 0.05 0.02 0.20 REF 1.60 BSC 1.20 BSC 0.25 0.30 0.35 0.325 0.425 0.375 0.30 0.40 0.35 0.125 MIN Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package is saw singulated 3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-1199A Sheet 2 of 2 DS20005624A-page 12 2016 Microchip Technology Inc. DSC61XX 4-Lead VFLGA 1.6 mm x 1.2 mm Recommended Land Pattern 4-Lead Very Thin Fine Pitch Land Grid Array (ARA) - 1.6x1.2 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E1 X1 G1 4 Y C G2 1 2 (CH) SILK SCREEN X2 E2 RECOMMENDED LAND PATTERN Units Dimension Limits Contact Pitch E1 Contact Pitch E2 Contact Spacing C Contact Width (X3) X1 Contact Width X2 Contact Pad Length (X6) Y Space Between Contacts (X4) G1 Space Between Contacts (X3) G2 Contact 1 Index Chamfer CH MIN MILLIMETERS NOM 1.20 BSC 1.16 BSC 0.75 MAX 0.35 0.43 0.50 0.85 0.25 0.13 X 45° REF Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-3199A 2016 Microchip Technology Inc. DS20005624A-page 13 DSC61XX 4-Lead VLGA 2.0 mm x 1.6 mm Package Outline 4-Lead Very Thin Fine Pitch Land Grid Array (ASA) - 2.0x1.6 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A B N (DATUM A) (DATUM B) NOTE 1 E 2X 0.05 C 1 2X 2 TOP VIEW 0.05 C 0.10 C C A1 A SEATING PLANE 4X (A3) SIDE VIEW b2 3X b1 0.07 0.03 CH 1 0.08 C 2 CH NOTE 1 C A B C e1 e1 2 4X L N e BOTTOM VIEW Microchip Technology Drawing C04-1200A Sheet 1 of 2 DS20005624A-page 14 2016 Microchip Technology Inc. DSC61XX 4-Lead VLGA 2.0 mm x 1.6 mm Package Outline (Continued) 4-Lead Very Thin Fine Pitch Land Grid Array (ASA) - 2.0x1.6 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits Number of Terminals N e Terminal Pitch Terminal Pitch e1 Overall Height A Standoff A1 Substrate Thickness (with Terminals) A3 Overall Length D Overall Width E b1 Terminal Width Terminal Width b2 Terminal Length L Terminal 1 Index Chamfer CH MIN 0.79 0.00 0.30 0.40 0.50 - MILLIMETERS NOM 6 1.55 BSC 0.95 BSC 0.84 0.02 0.20 REF 2.00 BSC 1.60 BSC 0.35 0.45 0.55 0.15 MAX 0.89 0.05 0.40 0.50 0.60 - Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package is saw singulated 3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-1200A Sheet 2 of 2 2016 Microchip Technology Inc. DS20005624A-page 15 DSC61XX 4-Lead VFLGA 2.0 mm x 1.6 mm Package Outline 4-Lead Very Thin Fine Pitch Land Grid Array (ASA) - 2.0x1.6 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging X1 4 Y G2 C 1 2 (CH) G1 SILK SCREEN E RECOMMENDED LAND PATTERN Units Dimension Limits E Contact Pitch Contact Spacing C Contact Width (X4) X1 Contact Width (X2) X2 Contact Pad Length (X6) Y Space Between Contacts (X4) G1 Space Between Contacts (X3) G2 Contact 1 Index Chamfer CH MIN MILLIMETERS NOM 1.55 BSC 0.95 MAX 0.50 0.40 0.70 1.05 0.25 0.13 X 45° REF Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-3200A DS20005624A-page 16 2016 Microchip Technology Inc. DSC61XX 4-Lead VLGA 2.5 mm x 2.0 mm Package Outline 4-Lead Very Thin Land Grid Array (AUA) - 2.5x2.0 mm Body [VLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A B N (DATUM A) (DATUM B) NOTE 1 E 2X 0.05 C 1 2X 0.05 C 2 TOP VIEW 0.10 C A1 C A SEATING PLANE (A3) 4X SIDE VIEW 0.08 C 4X b1 CH 1 2 CH NOTE 1 0.07 0.03 C A B C e1 e1 2 4X L N e BOTTOM VIEW Microchip Technology Drawing C04-1202A Sheet 1 of 2 2016 Microchip Technology Inc. DS20005624A-page 17 DSC61XX 4-Lead VLGA 2.5 mm x 2.0 mm Package Outline (Continued) 4-Lead Very Thin Land Grid Array (AUA) - 2.5x2.0 mm Body [VLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits Number of Terminals N e Terminal Pitch e1 Terminal Pitch Overall Height A Standoff A1 Substrate Thickness (with Terminals) A3 Overall Length D Overall Width E Terminal Width b1 Terminal Length L Terminal 1 Index Chamfer CH MIN 0.79 0.00 0.60 0.60 - MILLIMETERS NOM 4 1.65 BSC 1.25 BSC 0.84 0.02 0.20 REF 2.50 BSC 2.00 BSC 0.65 0.65 0.225 MAX 0.89 0.05 0.70 0.70 - Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package is saw singulated 3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-1202A Sheet 2 of 2 DS20005624A-page 18 2016 Microchip Technology Inc. DSC61XX 4-Lead VLGA 2.5 mm x 2.0 mm Recommended Land Pattern 4-Lead Very Thin Land Grid Array (AUA) - 2.5x2.0 mm Body [VLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging X 4 Y C G2 1 2 (CH) G1 SILK SCREEN E RECOMMENDED LAND PATTERN Units Dimension Limits E Contact Pitch Contact Spacing C Contact Width (X4) X Contact Pad Length (X6) Y Space Between Contacts (X4) G1 Space Between Contacts (X3) G2 Contact 1 Index Chamfer CH MIN MILLIMETERS NOM 1.65 BSC 1.25 MAX 0.70 0.80 0.95 0.45 0.13 X 45° REF Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-3202A 2016 Microchip Technology Inc. DS20005624A-page 19 DSC61XX 4-Lead CDFN 3.2 mm x 2.5 mm Package Outline and Recommended Land Pattern Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging TITLE 4 LEAD CDFN 3.2x2.5mm COL PACKAGE OUTLINE & RECOMMENDED LAND PATTERN DRAWING # CDFN3225-4LD-PL-1 UNIT MM NOTE: 1. Green shaded rectangles in Recommended Land Pattern are solder stencil opening. DS20005624A-page 20 2016 Microchip Technology Inc. DSC61XX APPENDIX A: REVISION HISTORY Revision A (September 2016) • Initial release of DSC61XX Microchip data sheet DS20005624A. 2015 Microchip Technology Inc. DS20005624A-page 21 DSC61XX NOTES: DS20005624A-page 22 2015 Microchip Technology Inc. DSC61XX PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. PART NO. X Examples: X X X X X – XXX.XXXX X a) Device Pin 1 Output Package Temperature Frequency Revision Frequency Tape Definition Drive and Range Stability Strength Reel Device: DSC61XX: Pin Definition: Ultra-Low Power MEMS Oscillator Selection Pin 1 Internal Pull Register 0 OE Pull-up 1 STDBY Pull-up 2 FS Pull-up 4 OE None 5 STDBY None 6 FS None 8 KHz Output None Output Drive Strength: 1 2 Standard High Packages: C J M H = = = = 4-Lead 3.2 mm x 2.5 mm DFN 4-Lead 2.5 mm x 2.0 mm VFLGA 4-Lead 2.0 mm x 1.6 mm VFLGA 4-Lead 1.6 mm x 1.2 mm VFLGA Temperature Range: E I = = -20C to +70C (Extended Commercial) -40C to +85C (Industrial) Frequency Stability: 1 2 = = ± 50 ppm ± 25 ppm Revision: A = Revision A Frequency: xxx.xxxx = User-Defined Frequency between 001.0000 MHz and 100.0000 MHz xxxkxxx = User-Defined Frequency between 002.000 kHz and 999.999 kHz xxxx = Frequency configuration code when pin 1 = FS. Configure the part online through ClockWorks b) c) d) DSC6112JI2A-100.0000: Ultra–Low Power MEMS Oscillator, Pin1= Standby with internal Pull–Up, High Output Drive Strength, 4-Lead 2.5 mm x 2.0 mm VFLGA, Industrial Temperature (–40°C to +85°C), ±25 ppm, Revision A, 100 MHz Frequency, Bulk. DSC6101HE1A-016.0000T: Ultra–Low Power MEMS Oscillator, Pin1= OE with Internal Pull–Up, Standard Output Drive Strength, 4-Lead 1.6 mm x1.2 mm VFLGA, Extended Commercial Temperature (–20°C to +70°C), ±50 ppm, Revision A, 16 MHz Frequency, Tape and Reel. DSC6183ME1A-032k768: Ultra–Low Power MEMS Oscillator, Pin1= 32.768 KHz Clock Output, Low Output Drive Strength, 4-Lead 2.0 mm x1.6 mm VFLGA, Extended Commercial Temperature (–20°C to +70°C), ±50 ppm, Revision A, Bulk DSC6121CI2A-001A: Ultra–Low Power MEMS Oscillator, Pin1= FS with internal Pull-up, Standard Output Drive Strength, 4Lead 3.2 mm x 2.5 mm CDFN, Industrial Temperature (-40 to 85 C), ±25 ppm, Revision A, Frequency code = 001A (configured through ClockWorks), Bulk Note 1: Tape and Reel: Note 1: Blank T = = Bulk Tape and Reel Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. Please visit Microchip ClockWorks® Configurator Website to configure the part number for customized frequency. http://clockworks.microchip.com/timing/. 2016 Microchip Technology Inc. DS20005624A-page 23 DSC61XX NOTES: DS20005624A-page 24 2016 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, ETHERSYNCH, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker, Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2016, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 978-1-5224-0961-8 2016 Microchip Technology Inc. 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