ON NCP3334DADJR2G High accuracy, ultra low iq, 500 ma adjustable low dropout regulator Datasheet

NCP3334
High Accuracy,
Ultra Low Iq, 500 mA
Adjustable Low Dropout
Regulator
The NCP3334 is a high performance, low dropout regulator. With
accuracy of ±0.9% over line and load and ultra−low quiescent current
and noise it encompasses all of the necessary features required by
today’s consumer electronics. This unique device is guaranteed to be
stable without a minimum load current requirement and stable with
any type of capacitor as small as 1.0 mF. The NCP3334 offers reverse
bias protection.
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MARKING
DIAGRAM
8
3334
ALYW
G
SOIC−8
CASE 751
8
1
1
Features
•
•
•
•
•
•
•
•
•
•
•
•
High Accuracy Over Line and Load (±0.9% at 25°C)
Ultra−Low Dropout Voltage
Low Noise
Low Shutdown Current (0.07 mA)
Reverse Bias Protected
2.6 V to 12 V Supply Range
Thermal Shutdown Protection
Current Limitation
Requires Only 1.0 mF Output Capacitance for Stability
Stable with Any Type of Capacitor (including MLCC)
No Minimum Output Current Required for Stability
This is a Pb−Free Device
A
L
Y
W
G
PIN CONNECTIONS
1
GND
SD
IN
IN
April, 2006 − Rev. 2
NC
FB
OUT
OUT
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
PCMCIA Card
Cellular Phones
Camcoders and Cameras
Networking Systems, DSL/Cable Modems
Cable Set−Top Box
MP3/CD Players
DSP Supply
Displays and Monitors
© Semiconductor Components Industries, LLC, 2006
8
ORDERING INFORMATION
Applications
•
•
•
•
•
•
•
•
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
1
Publication Order Number:
NCP3334/D
NCP3334
OUT
3
OUT
IN
4
Vin
FB
IN
6
5
7
CADJ
68 pF
R1
+
Cin
1.0 mF
Cout
1.0 mF
R2
GND
SD
2
Vout
+
1
ON
OFF
Figure 1. Typical Adjustable Version Application Schematic
PIN FUNCTION DESCRIPTION
Pin No.
Pin Name
Description
1
GND
2
SD
Shutdown pin. When not in use, this pin should be connected to the input pin.
3, 4
IN
Power Supply Input Voltage
5, 6
OUT
7
FB
Feedback pin; reference voltage = 1.25 V.
8
NC
Not Connected
Power Supply Ground
Regulated output voltage. Bypass to ground with Cout w 1.0 mF.
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Input Voltage
Vin
−0.3 to +16
V
Output Voltage
Vout
−0.3 to Vin +0.3 or 10 V*
V
Shutdown Pin Voltage
Vsh
−0.3 to +16
V
Thermal Characteristics
Thermal Resistance, Junction−to−Air
RqJA
238
°C/W
Operating Junction Temperature Range
TJ
−40 to +150
°C
Storage Temperature Range
Tstg
−50 to+150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
NOTE: This device series contains ESD protection and exceeds the following tests:
Human Body Model (HBM) JESD 22−A114−B
Machine Model (MM) JESD 22−A115−A
*Whichever is less. Reverse bias protection feature valid only if Vout − Vin ≤ 7.0 V.
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NCP3334
ELECTRICAL CHARACTERISTICS (Vout = 1.25 V (Vref) typical, Vin = 2.9 V, TA = −40°C to +85°C, unless otherwise noted.)
Symbol
Min
Typ
Max
Unit
Reference Voltage Accuracy
Vin = 2.9 V to Vout + 4.0 V, IL = 0.1 mA to 500 mA, TA = 25°C
Characteristic
VREF
−0.9%
1.239
1.25
+0.9%
1.261
V
Reference Voltage Accuracy
Vin = 2.9 V to Vout + 4.0 V, IL = 0.1 mA to 500 mA, TA = 0°C to +85°C
VREF
−1.4%
1.233
1.25
+1.4%
1.268
V
Reference Voltage Accuracy (Note 1)
Vin = 2.9 V to Vout + 4.0 V, IL = 0.1 mA to 500 mA, TA = −40°C to +150°C
VREF
−1.5%
1.231
1.25
+1.5%
1.269
V
Line Regulation
Vin = 2.9 V to 12 V, IL = 0.1 mA
LineReg
0.04
mV/V
Load Regulation
Vin = 2.9 V, IL = 0.1 mA to 500 mA
LoadReg
0.04
mV/mA
Dropout Voltage, Vout = 2.5 V to 10 V
IL = 500 mA (Note 2)
IL = 300 mA
IL = 50 mA
IL = 0.1 mA
VDrop
mV
340
230
110
10
Peak Output Current (Notes 1 and 2) (See Figure 6)
Ipk
Vout ≤ 3.3 V
Vout > 3.3 V
Short Output Current (See Figure 6)
500
860
mA
900
1300
mA
990
Isc
Thermal Shutdown
TJSD
Ground Current
In Regulation
IL = 500 mA (Note 2)
IL = 300 mA (Note 2)
IL = 50 mA
IL = 0.1 mA
IGND
IGNDsh
Output Noise
IL = 500 mA, f = 10 Hz to 100 kHz, Cout = 10 mF
Vnoise
Shutdown
Threshold Voltage ON
Threshold Voltage OFF
VTHSD
°C
160
In Dropout
Vin = Vout −0.1 V, IL = 0.1 mA
In Shutdown
VSD = 0 V
700
9.0
4.6
0.8
−
14
7.5
2.5
190
mA
−
500
mA
0.07
1.0
mA
mVrms
38
2.0
0.4
Vin ≤ 5.4 V
Vin > 5.4 V
mA
V
V
ISD
0.07
1.0
5.0
mA
Output Current In Shutdown Mode, Vout = 0 V
IOSD
0.07
1.0
mA
Reverse Bias Protection, Current Flowing from the Output Pin to GND
(Vin = 0 V, Vout_forced = Vout (nom) ≤ 7 V) (Note 3)
IOUTR
1.0
SD Input Current, VSD = 0 V to 0.4 V or VSD = 2.0 V to Vin
mA
RECOMMENDED OPERATING CONDITIONS
Input Voltage
VIN
1. For output current capability for TJ < 0°C, please refer to Figure 8.
2. TA must be greater than 0°C.
3. Reverse bias protection feature valid only if Vout − Vin ≤ 7.0 V.
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3
2.6
12
V
NCP3334
400
12
350
250
200
150
6
300 mA
4
50 mA
100
2
50
50 mA
0
0
0
20
40
60
80
100
120
140
TJ (°C)
0
80
TJ (°C)
Figure 2. Dropout Voltage vs. Temperature
Figure 3. Ground Current vs. Temperature
1.275
1000
1.270
900
1.265
800
1.260
700
Ipk (mA), Isc (mA)
VOUT (V)
500 mA
8
300 mA
IGND (mA)
VDO (mV)
10
500 mA
300
1.255
1.250
1.245
1.240
40
60
100
120
140
Isc
Ipk
600
500
400
300
1.235
200
1.230
100
1.225
−40 −20
20
0
0
20
40
60
80
100
120
0
140
20
40
60
80
100
120
TJ (°C)
TJ (°C)
Figure 4. Output Voltage vs. Temperature
Figure 5. Peak and Short Current
vs. Temperature
140
100
Vout (V)
RR, RIPPLE REJECTION (dB)
0.97
Vout
90
80
70
50
500 mA
40
30
20
10
Vout = 2.5 V
Cout = 10 mF
TJ = 25°C
0
0.01
Ipk
Isc
Iout (mA)
(For specific values of Ipk and Isc, please refer to Figure 5)
50 mA
250 mA
60
0.1
1.0
10
F, FREQUENCY (kHz)
Figure 6. Output Voltage vs. Output Current
Figure 7. Ripple Rejection vs. Frequency
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100
NCP3334
0.8
15
0.7
Vin at Data Sheet Test Conditions,
25°C, 1 mF Capacitance
−10°C
0°C
0.5
MAXIMUM ESR (W)
IOUT, (A)
0.6
−40°C
0.4
−30°C
0.3
−20°C
0.2
10
Unstable Area
5.0
0.1
Stable Area
0
0
3.5 3.4
3.3
3.2
3.1
3.0
2.9
2.8
2.7
2.6 2.5
0
100
200
300
400
VIN, (V)
OUTPUT CURRENT (mA)
Figure 8. Output Current Capability when set
at 2.5 V Vout
Figure 9. Stability with ESR vs. Iout
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5
500
NCP3334
APPLICATIONS INFORMATION
Reverse Bias Protection
Adjustable Operation
Reverse bias is a condition caused when the input voltage
goes to zero, but the output voltage is kept high either by a
large output capacitor or another source in the application
which feeds the output pin.
Normally in a bipolar LDO all the current will flow from
the output pin to input pin through the PN junction with
limited current capability and with the potential to destroy
the IC.
Due to an improved architecture, the NCP3334 can
withstand up to 7.0 V on the output pin with virtually no
current flowing from output pin to input pin, and only
negligible amount of current (tens of mA) flowing from the
output pin to ground for infinite duration.
Operation with output voltages in the range of 7 to 10 volts
requires that the output to input voltage differential be less
than 7 volts.
The output voltage can be set by using a resistor divider
as shown in Figure 1 with a range of 1.25 to 10 V. The
appropriate resistor divider can be found by solving the
equation below. The recommended current through the
resistor divider is from 10 mA to 100 mA. This can be
accomplished by selecting resistors in the kW range. As
result, the Iadj*R2 becomes negligible in the equation and
can be ignored.
Input Capacitor
The voltage dropout is measured at 97% of the nominal
output voltage.
ǒ
Ǔ
Vout + 1.25 * 1 ) R1 ) Iadj * R2
R2
(eq. 1)
Example:
For Vout = 2.9 V, can use R1 = 36 kW and R2 = 27 kW.
ǒ
Ǔ
1.25 * 1 ) 36 kW + 2.91 V
27 kW
(eq. 2)
Dropout Voltage
An input capacitor of at least 1.0 mF, any type, is
recommended to improve the transient response of the
regulator and/or if the regulator is located more than a few
inches from the power source. It will also reduce the circuit’s
sensitivity to the input line impedance at high frequencies.
The capacitor should be mounted with the shortest possible
track length directly across the regulator’s input terminals.
Thermal Considerations
Internal thermal limiting circuitry is provided to protect the
integrated circuit in the event that the maximum junction
temperature is exceeded. This feature provides protection
from a catastrophic device failure due to accidental
overheating. This protection feature is not intended to be used
as a substitute to heat sinking. The maximum power that can
be dissipated, can be calculated with the equation below:
Output Capacitor
The NCP3334 remains stable with any type of capacitor
as long as it fulfills its 1.0 mF requirement. There are no
constraints on the minimum ESR and it will remain stable up
to an ESR of 5.0 W. Larger capacitor values will improve the
noise rejection and load transient response.
PD +
TJ(max) * TA
RqJA
(eq. 3)
For improved thermal performance, contact the factory
for the DFN package option. The DFN package includes an
exposed metal pad that is specifically designed to reduce the
junction to air thermal resistance, RqJA.
Noise Reduction
A 68 pF capacitor connected in parallel with R1 (see
Figure 1) is recommended to reduce output noise and
improve stability.
ORDERING INFORMATION
Package
Shipping †
NCP3334DADJG
SO−8
(Pb−Free)
98 Units / Rail
NCP3334DADJR2G
SO−8
(Pb−Free)
2500 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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6
NCP3334
PACKAGE DIMENSIONS
SOIC−8
CASE 751−07
ISSUE AH
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
−X−
A
8
5
0.25 (0.010)
S
B
1
M
Y
M
4
K
−Y−
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
The products described herein NCP3334, may be covered by one or more of the following U.S. patents; 5,920,184, 5,966,004, and 5,834,926. There may be
other patents pending.
Micro8 is a trademark of International Rectifier.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
Literature Distribution Center for ON Semiconductor
USA/Canada
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Phone: 81−3−5773−3850
Email: [email protected]
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ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
NCP3334/D
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